With Koji's help, I was able to get the PD working today. Yesterday, I was having trouble getting the DC readout to work. We traced it back to the conical inductor to ground from the PD anode, which was open for some reason (I later broke it when removing it from the board, but it wasn't obviously broken before that --- I am trying to fix it). I replaced it with a normal coil for the moment.

After this, things worked fine. There was a strange ~75 kHz oscillation in the DC signal, but Rana postulated that this could be from the less-than-stellar lab supplies. I decided to move on to the RF output. I hooked it up to the Jenne Laser rig and swept it. Below is a log-scale plot and a linear close-up. I am still working on the calibration and making it match up with the model, but I have to have another look at the measurement setup and measure some component values tomorrow.

Essentially, though, it looks like what we expect:

• AC coupled
• "Resonant" spike at 33 MHz for the REFL readout (the actual peak is at a higher frequency, but the transimpedance at 33 MHz is at a point where it is very weakly sensitive to diode capacitance fluctuations
• Notch at 66 MHz, for 2f rejection
• Roll-off at higher frequency

More details and comparison with the model to follow.

Problem 1

Disk sdc was full.  See below list of files, showing that it stopped at 05:43:

-rw-r--r--  1 controls controls 19126210 Feb  8 05:40 C-R-981207616-32.gwf
-rw-r--r--  1 controls controls 19126385 Feb  8 05:41 C-R-981207648-32.gwf
-rw-r--r--  1 controls controls 19104189 Feb  8 05:41 C-R-981207680-32.gwf
-rw-r--r--  1 controls controls  2629632 Feb  8 05:42 .C-R-981207712-32.gwf
-rw-r--r--  1 controls controls        0 Feb  8 05:43 .C-R-981207776-32.gwf
-rw-r--r--  1 controls controls        0 Feb  8 05:44 .C-R-981207840-32.gwf
-rw-r--r--  1 controls controls        0 Feb  8 05:45 .C-R-981207904-32.gwf
-rw-r--r--  1 controls controls        0 Feb  8 05:46 .C-R-981207968-32.gwf

The wiper was running, and was set to 95%:

[controls@fb0 fb]# more wiper.log

Tue Feb  8 20:27:01 PST 2011

Directory disk usage:
/frames/full 912389612k
Combined 912389612k or 891005m or 870Gb

/frames/full size 961432072k at 94.90%
/frames/full is below keep value of 95.00%
Will not delete any files
df reported usage 94.92%

However the disk was full:

[controls@fb0 fb]# df
Filesystem           1K-blocks      Used Available Use% Mounted on
/dev/mapper/VolGroup00-LogVol00
                     234476168  24758300 197615008  12% /
/dev/sda1               101086     28296     67571  30% /boot
tmpfs                  1029676         0   1029676   0% /dev/shm
/dev/sdd1            1442145212 149825928 1292319284  11% /frames/trend
/dev/sdc1            961432072 912594164         0 100% /frames/full
fb1:/cvs             961432032 108480608 852951424  12% /cvs

Something is screwed up with the way that wiper calculates how full the disk is.  We changed the value down to 90%, and the disk is now at 91%.  The wiper script says it's at 85%, so it's still getting the wrong value, but the disk is no longer full and we are recording frames again.

______________________________________________________________

Problem 2

Now that the frame data is being taken again, we can see the realtime data in dataviewer.  However, we cannot get any frame data from the past.  Dataviewer throws up the following error.  The frame data is definitely there, is owned by controls, and we are definitely acquiring the channel whose data we are trying to retrieve.  There is something wrong here that I cannot work out.

Connecting to NDS Server fb0 (TCP port 8088)
Connecting.... done
read(); errno=0
LONG: DataRead = -1
No data found

read(); errno=9
read(); errno=9
T0=11-02-08-04-59-52; Length=60 (s)
No data output.

I think this is going to be a problem we need to get Alex to take a look at.

• [Lines] OK. I will make the tracks bigger for the majority of the board (signal path, power management, etc). I will leave it the same for the RF path (I think 10mil on this board thickness is the correct impedance characteristic), as well as for the comparator-to-transistor-switch for the boost control. The latter is because I need to run all 4 of them underneath the IC, and a thicker track just won't work. I expect that the current here will be fairly low...
• [Chip directions] I understand why this generally a good practice. However, I did not place them randomly in different directions, and I rather like the signal-oriented layout of the board. Unless you think this is a disastrous idea, I would kind of like to keep it. FYI, the boards I was talking about are things like our PD and the universal PDH box, not some generic mass-produced board.
• [Connectors] The connectors are mounted to the edge of the board, and they poke through holes in the front panel of the box. The connectors have threads and will be fixed to the front panel as well as to the board. This is for all connectors (and the potentiometers) EXCEPT for the internal RF connections that we will not generally need access to. The 2 RF connections we will need access to---the RF IN from the RFPD and the LO IN from the oscillator---will be connected from the panel to the board via a small coax cable that goes from SMA->SMP, as will the internal connection from mixer IF -> servo IN. Does this make sense?
• [Extra pads] I see. So, you think I should put in another one or two filter stages (that we will set to unity gain?), as well as a second summing amp stage near the output? I still don't really see what functionality this will add, given that we already have an excitation input and extra pads on the input stage to do things like whitening. This reminds me, though, that I have to do something about being able to disconnect the EXC input when we don't want it so as not to inject noise (as you mentioned before).
• [Component values] I understand this philosophy, and I agree with you that it is a shame to not utilize the AD829's low noise fully. However, Rana mentioned that the servo should have < 10 deg of phase lag @ 300 kHz. A gain of 10 at the input stage adds 3 degrees all by itself; a gain of 100 misses the requirement without even considering the later stages. We might get away with slightly higher gain if we use faster op amps for the switching stages, but we simply can't use some very high gain for the input stage if we want our bandwidth to be this high. I am curious to hear your and Rana's suggestions as to a compromise on this.
• [TP7-10] You are right; they are misplaced. I meant to put them before the resistors between the stages, not after. Will fix.
• [+/-15V supply] I will make certain that we can do this, but it may be a better idea to use 15V anyway, since we have to use the 24V supply from the NIM crate and we can dissipate less waste power.
• [Chattering] Is this really a common problem? I admit that I know nothing about it, so I will do some research, but I find it hard to believe that the DAC is so noisy that the comparator would flip so many times. My intuition is that even if this were true, the mechanical transfer function of the relays would be such that the chattering is filtered out (like you say). That is just a guess---I will actually figure it out.
• [Vref] OK.
• [More boards] I will!

To clarify what was done, I actually changed some boot up settings for the ethernet on fb0.

I went to /etc/sysconfig/network-scripts/ and modified the ifcfg-eth1 and ifcfg-eth3 files. I basically changed "ONBOOT=yes" to "ONBOOT=no" in each file. This was in addition to the "sudo ifconfig eth1 down" for shutting them down while the computer was running.

Similar results can be achieved with the network GUI, which can be run with "sudo system-config-network"

I was going to continue stuffing board #2 this evening, but I got the urge to take another stab at the problem with the first board. I removed some other components and was able to make the short go away. 

It went something like this:

• I realized that even though I had removed all capacitors and diodes touching the -15V supply, I hadn't removed the AD620 itself, which was powered by it. Once I did this (and replaced it with a new one), the resistance between -15 V and GND was Mohms.
• I plugged everything back in and turned on the power, but the lab supply still current limited the negative voltage.
• Knowing that the AD620 was at least part of the problem opened the playing field to a much wider part of the board. I found that the 4.7uF capacitor in the bias path had failed, so I removed it. This was a polar tantalum cap that I had made very sure to put in facing the right way (which I did). I'm not sure what caused it to fail.
• Again I plugged everything back in and turned on the power. This time, the current was below the limit, but still way too high (~250 mA). I found that the LMH6624 was getting pretty toasty, so I replaced this one too.
• Finally, the board was acting normally. I replaced the +/-15 V regulators, as well as the -5 V one (during the tests I was just supplying +/-15 V to the test points) with new ones. I also replaced the bypass capacitors. I did not yet replace the tantalum cap, which I don't think is crucial at the moment.

So, we have a working board that is ready for (real) testing.

That's what can be found on the web:   Overstrained Read/Write heads of WD's Green Power 

The Read/Write heads are run on energy saving mode if there hasn't been an activity for about eight seconds. Several Linux distributions access the hard drive in regular patterns - sometimes in a 10 seconds rhythm - and thus unnecessarily use the hard drive. The affected hard drives can be recognized by a high load/unload cycle; via SMART. Some Green Power hard drives are supposed to have exceeded their specified 300,000 cycles in less than a year.  There is a new firmware for Western Digital's Green Power hard drives that is supposed to solve problems related to the combination of energy saving mode and certain programs. 

Here are the important smart attributes for the drives installed in fb1. The tool i used is "smartmontools" written by Bruce Allen. The first two disks don't have this parameter as they are old(er).


SDA:
ID# ATTRIBUTE_NAME          FLAG     VALUE WORST THRESH TYPE      UPDATED  WHEN_FAILED RAW_VALUE
  4  Start_Stop_Count        0x0032   100   100   000    Old_age   Always       -       45
  9  Power_On_Hours          0x0032   052   051   000    Old_age   Always       -       35686
 12 Power_Cycle_Count       0x0032   100   100   000    Old_age   Always       -       45

SDB:
ID# ATTRIBUTE_NAME          FLAG     VALUE WORST THRESH TYPE      UPDATED  WHEN_FAILED RAW_VALUE
  4 Start_Stop_Count        0x0032   100   100   000    Old_age   Always       -       39
  9 Power_On_Hours          0x0032   045   045   000    Old_age   Always       -       40385
 12 Power_Cycle_Count       0x0032   100   100   000    Old_age   Always       -       39

SDC:
ID# ATTRIBUTE_NAME          FLAG     VALUE WORST THRESH TYPE      UPDATED  WHEN_FAILED RAW_VALUE
  4 Start_Stop_Count        0x0032   100   100   000    Old_age   Always       -       19
  9 Power_On_Hours          0x0032   087   087   000    Old_age   Always       -       9587
 12 Power_Cycle_Count       0x0032   100   100   000    Old_age   Always       -       17
193 Load_Cycle_Count        0x0032   200   200   000    Old_age   Always       -       19

SDD:
ID# ATTRIBUTE_NAME          FLAG     VALUE WORST THRESH TYPE      UPDATED  WHEN_FAILED RAW_VALUE
  4 Start_Stop_Count        0x0032   100   100   000    Old_age   Always       -       13
  9 Power_On_Hours          0x0032   087   087   000    Old_age   Always       -       9521
 12 Power_Cycle_Count       0x0032   100   100   000    Old_age   Always       -       12
193 Load_Cycle_Count        0x0032   200   200   000    Old_age   Always       -       13

So for fb1 everything is fine but i didn't check fb0 as i'm not allowed to install anything there.

• [About the thin lines] Thin lines are not so immune to heat. They may peel off from the board if someone put too much heat on the soldering. Probably 10mil is ok as you are going to ask a company to make resist-coated PC boards. Also, we always modify the circuit in some unknown reasons. If the lines are thicker, we can patch the stages in a flexible ways. Of course, the
   
• [Chip directions] You will know if you build 20 of different circuits with the chips arranged randomly. The board made by industries are fine as their components are put on the board by a machine and use paste solder and an oven. Our board is made by ourselves. Also we test the board by ourselves. It is always good to have the chips in a single direction. This helps the debugging a lot.

• [Connectors on the panel] I could not get whether the connectors are mechanically fixed on the front panel or not. We don't want to put strain by the cables to the board because it may crack the soldering of the connectors SOME YEARS LATER. If you have threads on the connectors and fix them on the panels that is nice, but we will have some trouble to fix the board in the box in this case.
   
• [Extra pads / Extra pattern] There was some confusion because of my short explanation. What I wanted to say was that if you have one or two opamps extra stages which is not connected anywhere, we can use them as a universal board for some unknown purpose in future. i.e. Someone wants to put some signal goes into the loop ==> insert a summing amplifier somewhere in between the stages. Someone needs whitening stage for DAQ. Etc.
   
• [Components values] This is the philosophie of the low noise circuit: The input stage should decide the input referred noise level of the circuit. It is VERY sad too see the performance of AD829 is spolied by the misuse of the high resistance with low gain at the first stage. The shot-noise level may be higher than 10nV/rtHz, it is good to know the basic rule that the first stage should decide the input referred noise.
   
• [TP7-TP10] They must be misplaced. You will not be able to measure any sensible transfer functions. Review the schematic and replace the TPs.
   
• [+/-15V power supply] Review the data sheet. If you can exploit full +/-10V range of the ADC by +/-12V supply, that is still good.
   
• [Pull up / Pull down] If you pull down the port, we can't turn on/off by plugging a short plug there. Pull up is the way.
   
• [Chattering] Between the steps the control voltage acrosses the thresholds. If the comparator is enough fast (I suspect so), the comparator switches multiple times. That may cause the multiple switchings of the relays. The relay may be enough slow to remove the chattering. I have no experience of relays.
   
• [Vref] It is always nice to have Vref on the board.
   
• [Final remark] Don't forget to make the extra oards for the purpose of the others as the board will be very useful to everyone!

Summary:

1. Frames were not being written. This was because of disk full conditions. We deleted old files and restarted everything.
2. FB0 network setup wasn't good. Joe fixed this with ifconfig.

The script which cleans up the frame files (so that the disk doesn't become overful) was set to only delete files when the /frames/full directory was getting up to 99.7% of the full capacity. This is ridiculously close to the edge. We set it instead to be 95%. Here's the diff in the /target/fb/wiper.pl script:

fb0:fb>diff wiper.pl wiper.pl~
26c26
< $full_frames_percent_keep = 95;
---
> $full_frames_percent_keep = 99.7;
32c32
< $minute_frames_percent_keep = 0.2;
---
> $minute_frames_percent_keep = 0.005;

The DAQD process was spitting out core files and had also filled up the / partition on FB0. After deleting this the regular system processes were able to run. To check the disk space you can use 'df -h':

fb0:fb>df -h
Filesystem            Size  Used Avail Use% Mounted on
/dev/mapper/VolGroup00-LogVol00
                      224G   24G  189G  12% /
/dev/sda1              99M   28M   66M  30% /boot
tmpfs                1006M     0 1006M   0% /dev/shm
/dev/sdd1             1.4T  142G  1.3T  11% /frames/trend
/dev/sdc1             917G  707G  165G  82% /frames/full
fb1:/cvs              917G  104G  814G  12% /cvs

We found that although NTPD was running on FB0, it had been configured in some really screwy way. We used /sbin/ifconfig to remove the configuration for the other network devices (eth1, eth2, eth3) and set it so that FB0 only talks to the ATF martian network and the router. The router is now configured to NOT filter out the requests from FB0. Now the NTPD works and seems to be correctly fixing the computer's system time. There's still the issue that the ATF FE will change this time as long as the FE is running, but I guess the system clock will once in awhile get fixed when we restart the FE and NTP takes over.

Along the way, I also restored the Xinerama dual-head display on ws1. Alastair somehow believed that it had never been dual-head before, but in fact I elogged the procedure in September. Please don't do any auto-updates on any of these machines unless you know what you're doing. and are willing to fix things after breaking them.

I attached an image showing that I can, indeed, get real time data from one of the _DAQ channels of the gyro.

 Here is the data from our Rb clock frequency noise measurement that was on the 40m elog here.

Thanks for the comments. Here are my replies:

Board

• The lines are too thin. I used 10mil track, when I should probably use 20mil. I can change this for the signal pathway without much problem. Is it terrible if things like the comparator are still done in 10mil?
• Why? The board is laid out in a sort of compartmentalized functional area kind of way. The signal enters at top left and progresses left through the filter chain. Once this is done, it is directed to the "output area" to be buffered and sent to the output ports. This area has its chips upside-down relative to the filter chain chips for the obvious reason that pin 6 faces the front panel. Every example circuit I am using in Altium has instances of multi-directional chipping. I am not arguing, but wondering if there is a deep reason why they should be in the same direction?
• They are. The potentiometers for the gain adjust and the phase shift are on opposite sides of the front panel. All connectors we will need access to externally will be on the front panel. The phase shifter in/out is board-mounted for the following reason(s):
  • The output is board-mounted (and SMA) because it will go to a standalone mixer that will be on the board, as well (like in the universal box).
  • The input is board-mounted because we will have a flying coaxial cable from the board to the second level of our double-height NIM module. There is just not enough room to fit two SMA connectors on the edge of the board. In any case, we will need a double-height for our double stacked BNCs, so we will have plenty of room to fit the SMA connectors on the second level and patch to them via SMP or whatever.
  • While on this topic, I thought I would mention what the input/outputs will be.
    • The signal will come in via SMA from the RFPD. It will go into a throughput on the top of the front panel, where an SMA patch cable will take it to the mixer. There, it will meet the LO signal, which has come into the box in the same way and then passed through the phase shifter in the way described above. At the output of the mixer we will have an inline SMA LPF and then an SMA->SMP patch to take the LF signal to the servo input (This SMP connector is not yet on the board).
    • The BNC connectors on the box will be:
      • Input monitor
      • Pre-injection monitor
      • Post-injection monitor
      • Local sweep
      • DAC EXC
      • Boost control
    • Switches control the inversion function of the output stage and the manual local sweep.
• I added some pads to the input stage for future modification at Rana's suggestion. I am not sure where else we're likely to want them. Without considering the input's flexibility, we have four independently-placeable poles and zeros. Any specific suggestions?
• By this you mean for a future modification of the board (i.e. redesign) correct? If this is the case, then I think the board's layout lends itself very nicely to future modifications. Stages U2-U5 are essentially identical in footprint, so this could be carried on indefinitely with little thought, so long as you connect the final stage to K5, as I have done. Of course, more than 4 stages will require a more complicated switching scheme, but that will be for future work.

Schematic diagram:

• All component values were chosen after the analysis in my previous elog post. The total input-referred voltage noise at the PDH2 output is below the expected shot noise level between 100 mHz and a few kHz. I believe that within a decade in either direction it is still below the requirement curve. The basic reason is that the optical gain will be much higher now, so we need less servo gain in order to keep the loop stable. Although it is counter-intuitive, it is better to place the low-frequency gain on the filter stages because they roll off at high frequency; putting any appreciable gain on the first two AD829 stages results in too much phase lag at high frequency since they have a flat response. Of course, the pads are all there, so we can change this as we aim for a higher UGF (once we have designed the notch filters).
• TP7-10 are there so that we can check the transfer functions of the individual filter stages.
• The wiring around U3 was a mistake that I must have made while I was trying to print the schematic. It is fixed.
• No big reason for this except that it is the choice of the universal box. This is probably because the power input for that box is +/-15 V, so they want to regulate to 12. We will use the +/-24 V supply of the NIM crate, so it may be better to use +/-15 V. I can change this.
• See first bullet.
• Ok--will do.
• This is a good idea. I was actually thinking recently that it's not great to have to supply a voltage to keep the thing in the 0 state. Shouldn't we actually pull it down, though?
• OK
• The incremental steps of the stages are 2 V, and I have staggered them so that they are always 1 V away from the switching point. I can't imagine that we will have enough noise in this channel to cause the relays to switch.
• I am not sure. The universal board just uses the +12 supply, but I guess this could add phase noise. I will consider adding a reference.

I will try to make the changes above quickly. Please let me know if my rebuttals are sound.

Board

• The lines looks too thin
• The chips should always be the same direction
• The connectors / the potentiometer should be on the panel. Not on the board.
• There is no extra pads for future modification of the TF
• Have a universal pattern for future expansion

Schematic diagram

• Increase the gain of the 1st stage for the low input noise
• What's the purpose of TP7-10? They only shows 0V when their are correctly working...
• Strange wiring at around U3
• Are +/-12V power intentional choice? Why not +/-15V?
• Why U7 is an attenuator in stead of an amplifier?

• Use 7805 in stead of using the voltage divider for the power supply.
  The current consumed by the comparator changes the divided voltage. This changes the reference level of the comparator.
  In the worst case this causes the oscillation.
• Is it a good idea to pull up the boost input with the +5V source through a reasonably high resistance?
  This will allow us to use a terminator plug (or a potentiometer) to control the boosts.
• Write the threshold voltages of the comparators on the schematic diagram for the easy understanding of the boost control.
• The comparators have no hysteresis (positive feedback). What do you do about chattering of the comparators?

• Is it OK to get the phase shift ctrl form the voltage division of the +12V supply? Don't we need a reference voltage?

 I've made a first draft of the PDH2 PCB layout. Attached is a PDF of the board and the schematic. The blank space in the middle is for the mixer. More details when I'm not so tired.

SDC and SDD are both brand new disks, less than a year old!

The local disk on FB was full because there was ~200 GB of core files in the root directory. This was breaking everything.

I have now started fixing the start_daqd.inittab so that it can run as controls as in the 40m. Please don't allow Frank to change the shell back to bash no matter how much he cries.

All computers will be using tcsh from now on.

When I rebooted FB it complained about some disk problem and started a check on sdd1. We should punish whoever scrounged up these old unreliable disks and purchase a few new and good ones. Then we can just install something reasonable and remove the cardboard box of old hard drive junk from the lab forever.

Along the way, the FE was running, but the DAQD process complained about not being able to connect to the AWGTPMAN. Let's see how the reboot helps and if the disk will recover or not.

I traced the problem back to the -15 V regulator. There appears to be 25 ohms between the output terminal and ground.

I checked each of the capacitors between these two nets (i.e. I removed them and then measured their capacitances) and everything checked out.

Finally, I removed all components between these nets. The 25 ohms remained. I did other things like removing nearby diodes and also the 9-pin D-sub, all to no avail.

I checked one of unstuffed PCBs and it did not have the same issue. I started stuffing it (just the power management), and it was able to regulate to +/-15 V with no problem. This suggests that there is something wrong with the first board internally.

Tomorrow, I will finish stuffing the second board with fresh parts. I will check for shorts along the way to see if I can catch the demon in the act.

 I finished stuffing the first RFPD board today, so that we can begin with the testing. Unfortunately, it seems to have failed its first test, as something shorted when I powered it up. Rich and I traced it back to one of the 15 V regulators, and we are going to use that as a starting place tomorrow.

There was nothing obviously wrong with the board as checked by measuring resistances between terminals that should not be shorted (and vice versa), so we hope that there was just a bad regulator.

Besides that, the board looks sweet!

[Alastair, Zach] 

Here is the (hopefully) final draft of the RFPD box. Alastair is currently drafting a design for the base, so any comments must come quickly.

For the front face, the idea is to mill a hole and cavity in a circular copper plate that fits snugly around the diode. The diode will then be held in place between the front of the box and this ring once it is screwed on. This will also serve as a thermal contact between the diode and the box, and we can make the contact better by applying some thermal compound between them. There are three 4-40 taps around the PD hole so that we can screw the plate on from the front.

As I mentioned before, I have spaced out the 1/4-20 taps in the bottom, 1-cm panel so that one of the holes is directly beneath the PD. This is so that we don't rotate the diode out of the beam path when we initially use a simple post to mount it to the table (while we wait for the solid bases).

 I have done some thinking about the mGyro locking setup, and I think I have found a way to make it shot noise limited.

• Photodetection

The REFL diodes for the gyro should be set up in the aLIGO configuration (i.e. resonant notch readout). We will use an LMH6624 as the MAX4107 is obsolete. Since we are operating at 33 MHz here, the GBW of this amplifier is not as much of an issue as it is for the transmission setup, and we can use it in a higher-gain setting. I have chosen 4.5k/50 -> G = 91 for its gain at the moment, though this can be adjusted slightly without much issue. The notch is a 31-pF cap in series with a 750-nH inductor, where the non-inverting input of the LMH6624 is between them. This gives a transimpedance gain of ~75 dB V/A @ 33 MHz. Here is a transfer function and a closeup

:

The responsivity of the 2-mm diodes (Perkin-Elmer C30642) we will be using is ~0.8 A/W @ 1064nm, and the Cougar adds an additional 10 dB of gain to give a total optical response of 1.4 x 10⁴ V/W.

The aLIGO design is such that the resonant transimpedance is first-order insensitive to fluctuations in the diode capacitance from things like bias voltage fluctuations.

The maximum current rating of the C30642 is 100 mA, meaning that we can now use the full available optical power of ~50 mW per direction. This is a huge improvement from the < 1 mW we were able to use with the broadband PDs.

Below is the input-referred noise spectrum of this photodetector. At 50 mW incident power, given optimum modulation---which should be in reach now, given the 20-dB increase in available modulation depth from the EOM resonant circuit---the expected shot noise current from the RF sidebands alone (i.e. zero contrast defect) is ~4.6 x 10^-11 A/rHz. The PD beats that at and around 33 MHz.

• Servo

When designing the frequency response of the new servo, an obvious starting place was to ensure that the overall OLTF had a gain of unity at our current UGF of ~15 kHz. This is because we know the bandwidth is currently limited by PZT resonances which we will have to tailor notch filters for in order to progress further. From here, the idea is to increase the low-frequency gain as much as possible without eating up phase margin at the UGF.

In order to estimate what the gain of the new servo has to be at 15 kHz, we can multiply together all the individual improvements in the optical response:

We have eta: 0.7 -> 0.8, Z_PD: 10000 V/A -> 18000 V/A, P: ~0.5 mW -> 50 mW, and G_SB is the improvement in optical gain from the larger modulation depth (~ a few). This isn't exact, but a good estimate is about 43-46 dB.

Below is the magnitude response of PDH box #1437 in the configuration when our UGF was 15 kHz, showing a servo gain of about unity. This means that we can't go too wrong by aiming for a gain of ~-40 dB @ 15 kHz with the new servo.

Below is the current "PDH2" board schematic, which now has the correct filter stage components filled in. It has 4 poles at 50 Hz (switchable to DC), two zeros at 960 Hz, one zero at 9.6 kHz, and one zero at 96 kHz. This last one hands the 1/f off to the cavity pole. I am now remembering that the cavity pole is supposed to be at 98 kHz, not 96 kHz, so we should change this. We should get a more precise measurement of it before we do, though.

Here is the transfer function in the "0" state with no boosts, showing a gain of ~-40 dB @ 15 kHz. The circuit in this configuration has less than 9 degrees of phase lag @ 300 kHz; at 100 kHz, it is less than 3 degrees.

Here is the noise curve of the PDH2 (I have included only op amp noise, as the resistor noise is drowned by it). I pinpointed the major low-frequency contribution to "U7", the second, variable-gain stage (second plot).

Multiplying the expected shot noise current from above by the PD transimpedance ( 85 dB V/A ), we get a shot noise voltage of 5.8 x 10^-7 V/rHz. The PDH2 beats this from a few kHz down to 100 mHz.

So, the above outline gives a way to minimize electronics noise in the locking scheme over a reasonable band. This shot noise level corresponds to ~1.8 x 10^-11 (rad/s)/rHz, well below the requirement curve at the three frequencies for which it is defined. To improve further this we could:

1. Use quieter op amps
2. Increase the input power
3. Increase the finesse (right now it is about 450)

For completeness, here is the PDH2 TF in mode "4" with all four boosts engaged:

 Also, I'm not sure I understand how the boost is implemented in the MC servo. It seems like there are no true integrators at all! Instead, the boost switches seem to flip from flat response (up to a few kHz) to a particular pole/zero pair as indicated above that stage on the schematic. What gives?

EDIT (ZK): After playing around in LISO for a little bit, I'm fairly convinced that we will have no problem using the OPA604s for the switchable stages. We will want the high-flatband ranges of each of the filter stages to be at a gain of substantially less than unity (say -20 or -40 dB), since we will do most of the amplification at the input AD829 stage. This still allows for 40-60 dB of amplification at 10 Hz per stage with the boost on. In this regime, the phase lag accumulated per OPA604 stage at 300 kHz is less than a degree (when compared to the AD829, which is essentially still ideal in this configuration).

Below is the servo before any of the modifications Rana suggested. I have replaced the LF356s with OPA604s at Koji's suggestion, and I have replaced the linear-in-dB gain stage with another OPA604 with a 100K trimpot in the feedback path.

Regarding Rana's comments:

Using OPA604s instead of LF356s, and considering that we will not be using them with any serious gain (err--except for in the variable gain stage), shouldn't we expect the phase lag to be less than 10 degrees? If you still think this isn't the way to go, then you are suggesting we go with AD829s and MAX333As for the switching? In that case, we can still use the single-channel sequential boost control that I have set up with the comparator, correct? I just think it's nice not to have a different signal channel for every stage since we are likely to only apply them sequentially.

1) & 2) OK

3) I guess I was imagining shifting the LO, not the PD RF. There will be SMA inputs for each on the front of the box and how we connect them to the mixer will be our choice.

This seems too hokey to me. Just use the AD829 and the switching techniques that are in the Sigg electronics. Using this relay/LF crap will leave us with a lot of phase lag. The board should have less than 10 deg. of phase lag at 300 kHz.

1) For the regulators, you should use bigger caps in parallel with the little caps. Big means > 50 uF.

2) Since this is quasi generic, you ought to have more pads around the input opamp and some of the others. Look at the layout of the generic stages in the Sigg MC board.

3) For the RF, we don't want to put the PD signal through a noisy phase shifter. The LO signal shoudl be the one getting phase shifted.

Some good news at last.  I just went down to the machine shop, and the flanges were in the process of being tapped.  It's a two stage process, starting with a machine to begin the tapped hole, and then switching to a bottom tap to finish the thread.  They don't seem to want to go too far in using the machine in case the tap breaks.  At the moment all three remaining flanges have been tapped with the machine and are waiting to be bottom tapped.

The LF356 is what is in the universal box for the switchable stage. I assume that we are limited by the OP27s, not by the LF356, since we only use it for a maximum gain of 10. We are not likely to do much different in the switchable stages of this design, but maybe we should put in the OPA604 anyway just in case.

About the variable gain, I will put in the linear stage with an OPA604.

 I bypassed Techmart completely and ordered the boards myself.  The company has given us a shipping date of  1st Feb, and I've asked for next day delivery.  I have emailed Gina to ask her to cancel the techmart order.

- LF356 is too slow. GBW is lower than that of OP27 (8MHz). We don't want to have the phase retardation by the opamps.
- LF357 is not unity-gain stable. You have to use it with the gain larger than 5. i.e. this is not for us.
- OPA604 is a good alternative. This is a JFET opamp with vin=10nV/rtHz, GBW=20MHz and made by BurrBrown!

We had an unreasonable behaviour of AD8336. i.e. increasing the gain increased the input reffered noise, though I did not understand what was happened.
I definitely like the linear gain inverter. Maybe with OPA604 in stead of AD829 to avoid possible oscillation?

 I've updated the box model to have D-holes instead of flange mounts for the BNC and SMA outputs. We will make short patch cables that go from SMP->SMA and SMP->BNC inside the box. The D-sub-9 in on the board will likely have a ribbon cable connecting it to the back panel of the box where there will be a through connector. Since our initial PCB order didn't go through, we may have one last chance to revise this, but it certainly won't be the end of the world if we can't.

I have changed the spacing of the 1/4-20 taps in the bottom panel so that one of the outer ones is directly below the PD. This doesn't sacrifice the integrity of the design and it makes it so that we don't have to worry about rotating the PD out of the beam path during the initial phase when we just use posts to mount the boxes to the table.

We should start thinking about how we want our mounts to look. They will probably be blocks of brass or something that have holes countersunk from the bottom so that we can screw them to the bottom of the PD boxes. In between the base and the box, we should have an insulating layer thick enough to avoid capacitative ground loop coupling. I'm not sure what kind of screws we'll use to avoid DIRECT coupling...

  I have updated the PDH servo schematic to include:

• LF356's instead of AD829's for the switchable stages. Rich said it was a good idea to have FET input op amps in this case (like on the universal board). The LF356's have a relatively low GBW of 5 MHz. This shouldn't be a problem since we don't use them at high gain, but in any case we can switch to the LF357 which has a GBW of 20 MHz.
• External compensation capacitors for the AD829's, which we will still use for the input, output, and buffered monitor stages.
• Buffered monitors before and after the EXC injection (for TF purposes)
• RF phase shifter with independent +12 supply (not exactly sure why that is there, but that's the way it is on the universal board)
• LED indicators for
  • +12
  • -12
  • +12a (RF)
  • Boosts 1-4
• Test points for
  • +12
  • -12
  • +12a
  • +5 (comparator supply)
  • various places around the circuit we might want them

I hope to be able to position all the BNC/SMA/LEDs on one edge of the board so that we can have them sticking out the face of the NIM module. We can use Front Panel Express to make a fancy face.

We still need to talk about the variable gain stage. Koji doesn't like the linear-in-dB unit, so the other alternative is to have an amplifier with a pot in the feedback path. Does anyone else have any feelings for/against this?

 I'm afraid it's bad news on the flanges.  Still no sign of them getting finished.  I'll go back in tomorrow and if we can't get a sensible amount of action then we'll take them back and pass them to Mike Gerfin.

I also followed up our PD boards.  I put through an order using Techmart that was sent out on the 19th Jan according to the Techmart system.  When I called the company the only information they could find was the quote that I generated online for our board, and there was nothing that came in for Caltech on the 19th, or that matched the description of our order.  My main concern was to make sure they had received the correct files for the PCB, but it seems they didn't even receive the order at all.  I'm going over to find Gina to see if I can sort this out.  Luckily the PCB process is fast.  I may just need to find someone with a p-card to order this.

Gotcha!

The EXC input for the digital injection is indeed an equal-ratio summing amplifier; it adds the excitation in along with the loop signal (admittedly, I'm not quite sure how it works when the invert is flipped, but this is how it is set up with Rana's modification to the current box, also). The input resistance for each of the inputs is 10K.

(By the way, the connections to the inversion relay on the first schematic I posted were wrong. They are right now.)

What I meant was that in addition to having this summing injection it would be nice to have a local sweep for driving the PZT while we are doing things like optimizing the error signal (with the loop open). This is actually the only "sweep" functionality that the universal box has by design, and Rana modified the box to enable the sweep input to go through even when the switch was off. I am just proposing that we implement these two things separately so that we don't see a weird effect when we switch the invert on and off (like we do now). Of course, we can always just drive the PZT or VCO directly with a FG, so I can understand your point that we don't really need to have the local sweep option. I guess we should talk about this some more and then decide if it's worth it or not.

About the AD829, I will read the data sheet in detail and figure out where we need room for more components.

I don't see any particular reason to disconnect the loop for the sweeping.

I rather like to have a summing amplifier stage for the excitation so that we can use it to measure the open loop TF.
The input impedance of the summing stage should be high enough (~10K) such that we don't have the calibration
error between 0ohm and 50ohm signal sources.

AD829 may get unstable when the gain is small. Read the data sheet carefully, and put additional pads
so that we can put additional compensation components as described in the data sheet.

  I've gotten started. (Koji: I didn't read your comments until a few minutes ago, so I haven't taken them into account yet). Attached is a first pass of the servo. It is missing some peripherals like the voltage supply and regulations, and I haven't even looked at the PCB layout yet, but it has the essentials of the design.

There is an input stage, followed by a linear-in-dB variable gain stage (which in light of Koji's comments might soon turn into a purely linear stage), then four independently switched filter stages, and finally an output stage, which can be inverted with a local switch. Between the last filter stage and the output stage are both a locally-switchable SWEEP input and a permanently connected EXC input. Koji suggests that we also make the EXC input switchable, though this should be done via remote. Note that the filter stage component values are currently just placeholders.

The boosts are all individually controlled via relay. The block of stuff in the middle of the schematic is one 4-channel analog comparator which will take our single analog "Boost Ctrl" input and resolve it into one of 5 possible scenarios (i.e. no boost, single, double, triple, quadruple). The comparator inputs have a range of -5 V to +3.9 V, so I've chosen the setting voltages to be -5, -3, -1, +1, +3 V. The outputs are 0 V or +5 V, so when the logic is 1, a voltage is applied to the base of the output's transistor and therefore to the relay. This is exactly how the remote boost is done on the universal servo, only now we can control 4 with one channel.

Please have a look and let me have your comments.

EDIT: I added the voltage regulators and the switch for the local sweep. Also, one of the connections to the inversion relay was wrong. I fixed it.

1. I don't like the logarithmic variable gain. I like the dial on the box which indicates the number proportional to the gain. This means that the variable gain stage is to be an inverting amplifier with the potentiometer in the feedback path. I recommend it as far as AD829 does not get screwed up by the stray reactances of the potentiometer.

2. Let's put buffered test points before and after the excitation input. These test points should be connected to the panel connector. There should be a manual (or remote?) switch that disconnect the exc input such that we can avoid the noise injection through it.

 I have been thinking about how the dedicated PDH servo for the gyro should look. Here is a cartoon.

It is essentially the same basic setup as the universal box, but with four switchable true integrator stages, so that we can turn the boost up to f^-4 at low frequencies. Following the lead of the MC servo, I am planning to use AD829s instead of the slower OP27s.

For the variable gain stage, I'm not sure if we want to do something fancy like the multiplexer deal that the MC servo has (so that we can switch between several gain setting remotely) or if a local gain adjust will be enough. My guess is that a multiplexer and an additional set of 6-8 op amps is a bit overkill, since we'll probably not change the gain setting that often anyways. What's more, we will probably want to have finer control of the gain so that we can increase it just up to the point before the servo becomes unstable, which is easier to do with a potentiometer anyhow.

For the integrator switches, I imagined putting a relay on each one so that we can switch between flat DC response all the way up to f^-4 with EPICS, and eventually write an autolock script to do this for us. We might want to use something like a multiplexer for this so that we can specify the frequency response with one DAC channel.

We will also probably like to have a way to remotely engage the sweep input and inject excitation signals from the digital system. I think this should be implemented separately from a local sweep option (which will disconnect the signal pathway) that we will use in an open-loop configuration for things like signal optimization. Maybe we can just have it so that there is an "EXC" input that is always live (which we will hook up to the DAC) and a "SWEEP" input that must be engaged and that will kill the signal loop.

For the inverter, I think we can afford to just have a local switch.

I am working on the basics of the servo in Altium and I will wait for some input regarding the more advanced stuff. Remember that the current idea is to just make a board that we will mount into a NIM module and directly into our crate. The REFL PD signals will be sent to the crate where they will be mixed and then put into the servo. The PZT actuation signal will go back to the laser from here via BNC. There will be BNC inputs for the remote boost control, EXC, and local SWEEP.

IN PROGRESS

[ Notes about my paper and the current questions I am pondering - comments welcome ]

The current semi open (or at least not-quite-closed) question regarding my paper is how exactly to compare it to the other results in a way which is not (unintentionally) scientifically dishonest. More below:

Most results from other groups which contain either direct or indirect bounds on doubling noise are in Allan Deviation (sqrt(Allan Variance)). This is related to the PSD we are familiar with as follows:

1. Take the PSD of a time series of frequency deviations (or make a phase noise PSD and convert it to frequency noise PSD)
2. Apply this filter: 2*pi*sin^4(pi*tau*f)/(pi*tau*f)^2 - this is a very ripply bandpass filter which dies as f^-2 (Wikipedia has this formula under Time and Frequency Filter Properties - this is the correct formula)
3. Take the total rms (integral from zero to measurement BW)
4. This is sigma (Allan Variance) of tau.

Here are some obvious problems that come up when you want to compare Allan Variances

1. If my measurement bandwidth is different than yours, then we can measure different Allan Variances for the same physical process. This becomes a problem because most people don't seem to report their measurement bandwidth when they publish their Allan Variances.
2. Depending on the shape of your PSD, then the above difference might not be very large at all: If your noise is flat or goes down at high frequency then the above difference is negligible
3. If your noise is NOT flat in frequency at high frequency (specifically, if you have a white phase noise floor at high frequency, as with the doubling noise Mach Zehnder), then the rippling bandpass described above flat ripples - and thus the total rms scales ~ linearly with measurement bandwidth - so the Allan Variance scales with measurement bandwidth. (For non white noise such as high frequency features a similar analysis shows how they sample into each Allan Variance point)

The above "problem" can be summarize as: "If you have a frequency noise measurement which has features in it, or increases at high frequencies, the Allan Variance at a particular tau becomes increasingly less dependant on what is going on at 1/tau in the power spectrum." To me this just means it's a bad idea to use Allan Variance for my purpose, as it no longer represents what we intuitively want it to represent.

On comparing with other experiments: The bounds on doubling noise from the clock people are all in Allan Variance. They have some unreported bandwidth which they use for their measurement, and don't actually take frequency PSDs (they use a <machine name here> which generates Allan Variance on the fly). I think they might have measurement bandwidths of up to ~1 GHz (because of the particular heterodyne signals they are capturing). If I scale MY measurement up that high, and extend my white phase noise out to 1 GHz, my Allan Variance would go up by up to (1 GHz/128 Hz) = 8*10^6.

My actual frequency noise at low frequency is LOW, it is likely better than what many (and maybe all) have done before when trying to measure this. My Allan variance is better than them as measured, but I have a smaller measurement bandwidth, which means it might not be "honest" to compare my Allan Variance with theirs.

All frequency noise PSDs I could find were significantly above mine.

 cool.

You are right about the side panels in the figure from the manual will actually be the top and bottom panels; I did it this way so that the un-tappable side profiles will not be on the top or bottom (where we will mount the PD to the base). The dimensions will be in a different ratio to what is seen there. If you are facing the PD so that the diode is looking at you, it will be 120 mm wide x 70 mm tall x 42 mm deep, something like an old digital camera.

About the PD not being centered, I did it this was to minimize the size of the box (since the PD is not centered on the PCB). I could move one of the mounting holes to be directly below it, but I guess I imagined that we will---at least eventually---use a solid base instead of a post, so we will be rotating the entire block and then clamping it down with dogclamps or something.

I am of course open to suggestions about this, but I think Rana didn't like the idea of using posts.

I could not get how the PD is mounted to a pedestal.

The PD should not move back and forth by the rotation so that the beam can not be defocussed.
Horizontal translation of the PD by the rotation is barely tolerable if the tilting of the PD by ~20deg makes the translation of the center by several mm.
Otherwise, the PD may escape from the range of the steering mirror everytime when we tilt the diode against the beam.
This naturally limit the distance of the diode surface from the rotation axis to ~10mm.

But the rotation axis should not be too much distant from the center of mass so that the PD can stably stand without a fork.

Considering the density of the optics on the table, a slim, thin, and tall (but not too much tall) PD which is left-right symmetric is the natural choice.

Then, we may need some amount of compromise in the above conditions.

Ed: I opened the PDF and got that the PD is actually skinny and tall. I was a bit confused by the page 5 as the side panels at P.5 is actually the top and bottom plates
as far as I understand. The only improvement I can thing about is that the PD is not at the symmetric location with regard to the mounting hole at the bottom.

Yeah, I was imagining that this would be a box for any such PD. I thought we would order some and have them sitting on the shelf next to the boards. In any case, we could have 4-5 of them made special for the gyro; that sounds like fun.

Nice!

Maybe we can have a different name than "Generic PD" on the box though.  I only called the files that because the board is designed to be generic until it is stuffed.

 I've used Front Panel Express's design program to build a box for the RFPD. The attached PDF has 4 panels (front, back, top, bottom). The other two sides are fixed-width (42mm) side panels that are made by FPE. I have attached one page of their enclosure design manual so that you can get a rough idea of how it is put together.

The overall dimensions are 120 mm x 70 mm x 42 mm. All panels except for the bottom are 4 mm thick anodized blue, while the bottom is 1 cm thick (for rigidity) with natural finish.

The PCB that Alastair designed and has ordered will mount onto the front face of the box (where the PD will emerge from the bottom of the board), with the voltage regulator contacts mounting to the top of the box.

I am fairly sure that I've done it correctly, but the one thing I am not sure about is the SMA flange mount, which was not built in as a macro so I had to do it myself. In building it I realized that it is not really clear how we will connect the SMP ports on the board (for DC & RF Out) with the BNC and SMA outs on the back of the box. I assume that there are adapters for just this purpose, but we should double-check this before we put out the order.

As it stands now, the total quote (including the panels and hardware but not including the connector flanges which they don't sell) is $172. That seems a bit pricey, but we might be able to trim a little off by changing the design slightly. For example, they charge $10 for each of the panels on which they have to mill the bottom side. They have to do this for the front and back panels so that the edges fit into the side profiles. Presumably, the entire panel is anodized, so we can just have the edges milled out on the front side when we don't have to have anything written on it (like the front panel where the PD sticks through). All I would have to do is reposition the hole for the PD accordingly. Of course, the price goes down slightly if we order 5+.

Click on the picture to open the multi-page PDF.

By adding a trimpot at the input of the circuit (1 - 100 ohm, 10 turn was the smallest I could find), I was able to tune the resonant impedance to very nearly 50 ohms. The resistance I measure across the trimpot at this setting is 4.6 ohms, so the resonant circuit is still getting >90% of the power. I was wondering if adding resistance at the input would decrease the Q of the circuit and thus lower the resonant impedance instead of raising it, but I guess it makes sense that it doesn't because it is not in the path of the resonant current (which just circulates between the inductor and the EOM). It is also interesting that the resistance I added is more than the difference I had before (i.e. 4.6 > 50 - 45.9). I guess this could be due to some parallel capacitance in the trimpot or due to a change in the Q of the resonant circuit from things like fine-tuning the resonant frequency.

 About the RTV, I am hesitant to do it at this stage because we may want the freedom of trimming the impedance or resonant frequency in the future. It will be hard to access the tunable components if they are buried in goo. I think this can probably wait until we are sure of the final configuration. Also, since we are now PCB experts it may be worth designing a simple resonant circuit board that can be used for this type of application. Then, we could solder things in so that there isn't much rattle.

Here is a plot. I am not sure what the junk is at just below the resonance, but it is real (or at least reproducible). My guess is that the oscillator linewidth is sufficiently small for this not to matter.

We're still waiting for 3 of the flanges to come back from the machine shop.  I went down today and they think we may have another 2 back tomorrow late in the day.  

I started putting the vacuum parts we have together yesterday and did some more today.  I'm not very impressed with the company in question to be honest (since this website is open to public view, they shall remain anonymous here).  A lot of parts were dirty, badly packed, badly made.  Comments in full below:

• Main chambers were badly packed.  While all the other flanges were properly protected, the main conflat flange on the bottom was packed directly against a piece of cardboard - not exactly the cleanest way to package UHV flanges.
• I've only opened one of the flexi-hoses, but when I was wiping the mating surface with a clean-cloth, I found the inside of the pipe to be dirty.  This is despite both ends having proper caps, and it being packaged in a plastic wrapper.  I've no idea how you're supposed to clean inside one of these.
• Two of the view ports have marks on the CF knife-edge.  I have attached a couple of pictures of these below (there are more marks than just the ones shown, but these are the worst).  I don't know if they are bad enough to affect the vacuum since we are not aiming for ultra high vacuum.  Because of this I have put them on just now.
• The inside and outside of the viewports were very dusty - definitely not as clean as a CF part should be.
• Two of the rubber KF gaskets for the top flanges are loose.  The outer part actually falls off the rubber inner part because it's not as tight as it should be.
• Even the screws we bought aren't very good.  A couple of threads wouldn't work and one of the washers is missing part of the edge.  I know this is a kind of minor point, but it shows the lack of quality across all their parts.  If you were using these screws with a torque wrench to get the correct tightness on the flange then I expect it would not be at all accurate (which is usually the main reason for buying screw kits from the vacuum companies).

In short, they might be the cheapest company, but they are certainly not the best.

After looking at the impedances seen in all the different configurations, I decided that the most recent result just didn't make any sense. So I re-took the measurement, and the impedance magically came out to 46 ohms (see below).

What I think happened was that I changed the frequency range of the sweep after I had completed the calibration of the impedance test kit, so the analyzer was extrapolating out to where I was measuring. Another thing I noticed was that the results were different depending on whether I used single shot or continuous triggering. This final result was done with proper calibration and using single shot the way I was shown to do it the first time.

Finally this business can be put to rest (unless there is reason to believe that 46 ohms is not close enough to 50 ohms---I'm not sure what sort of reflected power we are likely to be able to handle.)

RA: 46 Ohms is OK, but not too hot. How about trying out some trimmable components too? When you finish, I recommend filling the box with some kind of goo (like RTV) so that it doesn't all rattle around. That's what the professionals seem to do.

 [Alastair, Zach]

We moved fb0 from its limbo on the floor back into the rack. Instead of putting it in its inane previous location (wedged into the very bottom and not fitting in all the way), we put it a little higher up and properly mounted it in. We didn't want to support the back with cable ties, so we found some random Bosch parts that served as pretty good supports. We should look into getting little supports that can screw into the backside of the rack to hold up the longer modules.

We also did some other reasonable things like screwing the lid back on the big blue ADC/DAC module so that the heavy power supply that someone put on top of it didn't crash through it when it was brushed against.

Picture:

 I finally got around to re-modifying the EOM resonant circuit. Since adding a parallel resistance at the input didn't seem to work when I tried it before the holidays, I decided to try Solution 1 of Koji's suggestions from this elog post. Below is a picture of the circuit once I was done modifying it. It has 3 cascaded RF transformers at the input followed by an inductor (actually two in series) which is in parallel with the EOM to ground. The transformers are 1:16, 1:4, and 1:2, giving an impedance division of 16*4*2 = 128. Since (as explained in the linked post), the resonant impedance of the circuit without the transformers is estimated to be around 6 kohms, their addition should result in an input impedance on resonance of ~50 ohms. The plot below the picture shows that this is not the case; the result is closer to 140 ohms.

I assume that the problem here is the various stray losses from series resistances (e.g. in the transformers). I am going to take a look at all the data points we have from the various impedances measured using the various circuits and try and come up with a solution that will work.

 I submitted the PD board design for manufacture today.  I didn't know what was the best way to do this, so I've put it in through Techmart by attaching the .zip file.  I'll call the company in a couple of days to check that they received the order.  It should take 4days to manufacture so we should have them soon.  I'll update the svn folder with the current design and put the files on the DCC.

 I got one of the four vacuum flanges back from the shop today.  They've done a good job on it, but it is taking a very long time.  Hopefully now they know how to tap them the speed will increase.  It is so difficult to get a delivery date out of them, and even when I've forced them to give me a date previously they haven't delivered on it.

I took the flange over to Bob's place to start cleaning it.  Daphen has offered to do it, and we should have it back tomorrow.  We can make this the corner that has the gauges, valve and pump on it (ie the more complex corner) so we can get started putting this stuff together.

We're also getting silvered 1/4-20 bolts that have vent holes, to attach the parts inside the tanks since the bases are steel.

 We still haven't got the baseplates back from the machine shop.  As of 2pm it still didn't look like any of them had been tapped.  I'm going back down at 4pm to see what further lack of progress there has been on this simple job.