i think i have a loose connection on the timing pcb in the blue chassis in the psl lab. I had this "no sync" problem the day before i left too and after i checked all connections and wiggled all the cables everything was fine when i checked again. So try to do that with the 1Hz BNC sync cable connected at the back of the chassis. The psl model uses only the first card in the chassis and was working. I will replace the board beginning next week. If one of the models doesn't sync the framebuilder doesn't start.
Another option: Because we need both systems running in order to work with it i will try to use the bad frontend computer at a lower sampling rate. The spikes in the timing are about 280us. If the model is running at 2k we have about 480us cycle time, so it shouldn't matter anymore. I've mounted everything in the rack already to try that but had no time to look into details...
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The front end (fb0) was freezing at "Starting udev" every time I tried to boot it. I googled a tad and found some people somewhere said that this happened to them when some cables were loose, so I wiggled all the cables and rebooted.
FB0 now boots.
I think something may have been jiggled loose from the back of fb0 when the rack was manhandled, possibly during the fixing of the ceiling leaks.
- I sshed into fb0
- I did "startatf" and "startpsl"
- I set both burtrestores to 1 -
- Nothing worked yet - framebuilder kept respawing at 5 minute intervals
- I checked the log files and noticed nothing obvious
- I added a channel in the C2ATF.ini because I wasn't sure there was one
- I restarted both processes again
- The ATF model up with both ADC and DAC channels started working
- I am unsure if the PSL model is working, the GDS_TP screen says "NO SYNC" under sync source.
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