40m QIL Cryo_Lab CTN SUS_Lab TCS_Lab OMC_Lab CRIME_Lab FEA ENG_Labs OptContFac Mariner WBEEShop
  Cryo Lab eLog  Not logged in ELOG logo
Entry  Tue Feb 2 09:52:19 2021, aaron, Computing, DAQ, cymac to Debian buster 
    Reply  Wed Feb 3 08:23:12 2021, Chris, Computing, DAQ, cymac to Debian buster 
       Reply  Tue Feb 9 16:33:31 2021, aaron, Computing, DAQ, cymac to Debian buster 
          Reply  Thu Feb 11 18:51:39 2021, aaron, Computing, DAQ, cymac to Debian buster Screen_Shot_2021-02-11_at_19.27.21.png
             Reply  Mon Feb 15 18:25:19 2021, Chris, Computing, DAQ, cymac to Debian buster 
                Reply  Tue Feb 16 14:29:04 2021, aaron, Computing, DAQ, cymac to Debian buster 55B5D301-4243-45DA-9B03-45EF87B2A684.jpeg4C7FE7DC-E8A0-4770-9A49-14EB491F76E2.jpeg13D67AB6-5A77-4C94-A2A4-FE7FDF065B01.jpegC84B3054-269B-4969-817F-1429BB671C7A.jpeg
                   Reply  Thu Feb 18 16:16:38 2021, aaron, Computing, DAQ, cymac to Debian buster 15A01777-A1C5-4710-8180-28C8B68A07AE.jpegF90CD5EF-1A26-4C4A-9C84-046E49642545.jpeg
                      Reply  Fri Feb 19 14:43:09 2021, aaron, Computing, DAQ, AI chassis diagnosis 
                   Reply  Tue Mar 9 14:03:12 2021, aaron, Computing, DAQ, oma model 
Message ID: 2648     Entry time: Tue Feb 16 14:29:04 2021     In reply to: 2644     Reply to this: 2654   2679
Author: aaron 
Type: Computing 
Category: DAQ 
Subject: cymac to Debian buster 
rtcds start --all

works to start the models, though FIFO status light is still red.  There is also still an offset on DAC outputs, but not the same as the previously noted offset (-740 mV, down from -2.2 V).

The RCG runtime diagnostics guide (p18) suggests this bit indicates either FIFO is empty (DAC module clocking more often than it should, or IOP code running too long), or FIFO contains too many samples (DC not clocking properly or at all).  It also suggests this error should manifest as an "errant, noisy, DAC output or... complete loss of DAC output signal," which doesn't sound like the fixed offset I'm seeing. Nonetheless, the IOP shouldn't be running long (we've run these models together before), so I check the timing cables to DAC and ADC.

The ADC (but not DAC) haphazardly connected (attachment 1 is the ADC cable). After reseating the DAC cable and rebooting cymac1, the FIFO error is resolved but I no longer get any signal when driving the DAC. I don't see any change in status if I unplug the DAC, so perhaps there just isn't an indicator for 'DAC is unplugged.'

Reseating the ADC cables caused the FE to crash (predictably), but restarting the FE with rtcds restart --all (or stop followed by start) left timing errors. I tried to rmmod the x1iop kernel after stopping the models, but rmmod was not a recognized command. I installed kmod (the package containing rmmod), but the command was still not recognized; when I uninstalled kmod, several rts packages were also uninstalled (odd, since kmod couldn't have been a dependency before it was installed). Fortunately, simply reinstalling advligorts-cymac recovered the state with FIFO status light red. Not sure why the FIFO error returned, but I re-reseated the cables through this so maybe it is just flaky connectors. 

In the end, I left the system as it was before, but mounted the ADC+timing breakout board inside cymac1 next to the DAC+timing board. (attachment 2).

I also checked that the timing signals looked OK (attachment 3 shows the DAC clock on trace 1, ADC clock on trace 2; attachment 4 is zoomed in near 0V, where you can see a slight difference in decay to 0 on the two clocks).

Attachment 1: 55B5D301-4243-45DA-9B03-45EF87B2A684.jpeg  2.967 MB  Uploaded Tue Feb 16 17:11:08 2021  | Hide | Hide all
Attachment 2: 4C7FE7DC-E8A0-4770-9A49-14EB491F76E2.jpeg  3.709 MB  Uploaded Tue Feb 16 17:11:21 2021  | Hide | Hide all
Attachment 3: 13D67AB6-5A77-4C94-A2A4-FE7FDF065B01.jpeg  2.776 MB  Uploaded Tue Feb 16 17:11:39 2021  | Hide | Hide all
Attachment 4: C84B3054-269B-4969-817F-1429BB671C7A.jpeg  3.046 MB  Uploaded Tue Feb 16 17:11:52 2021  | Hide | Hide all
ELOG V3.1.3-