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ID Date Author Type Category Subject
  1951   Mon Oct 16 20:16:15 2017 Craig, awadeDailyProgressBEATPrecav Beatnote Dirty Spectra Facts

Total power on precav PD - 643 µW

South power on precav PD - 173 µW

North Power on precav PD - 470 µW

When both PZT paths for the FSS boxes are plugged in, we see 5 MHz sidebands on our transmission beatnote.  When either path is unplugged from the laser PZT, the 5 MHz sidebands go away.  This is weird because the PZT shouldn't be that fast...

We also have sidebands around 430 kHz.  We opened the loop to the lasers and still see this modulation on DC...

Tried grounding all power supplies together to avoid ground loops.  Found out that our negative high voltage supply was shorted to ground.  Spent day making new cords.  Will test tomorrow.

  1950   Mon Oct 16 12:57:43 2017 Craig, awadeDailyProgressBEATPicture of beatnote off of HP

We need to figure out GPIB for the HP8560E so we can directly get data off of there.  In the meantime here is a picture of our transmission beatnote and the messy spectrum around it.

 

Attachment 1: 2017Oct16_TransmissionSpectrum.jpg
2017Oct16_TransmissionSpectrum.jpg
  1949   Thu Oct 12 16:57:51 2017 Craig, awadeDailyProgressBEATTransmission Beatnote Recovered

Just a quick update.  We recovered our beatnote and (maybe?) lowered ringing in our FSS boxes with some specific gain values.

South Laser Slow Control Voltage: -6.13 V

North Laser Slow Control Voltage: 3.54 V

North Cavity Temperature Control Power Supply Voltage: 11.25 V  (This swings our beatnote by about 250 MHz/V.  Also this setup is terrible, we need to remove all clipdoodles from the main setup.)

Slow PID Loop Time Step: 0.1 seconds

South Common Gain Slider: -3.5

South Fast Gain Slider: 2.28 (This one is very sensitive... moving it slightly causes ringing)

North Common Gain Slider: -3.13

North Fast Gain Slider: -1.29

The peak is still moving since we recently changed the North Cavity Temperature by 0.75 volts to put the locked region of the two cavities within 125 MHz of each other.  The cavity has a time constant of ~1 hour... we can and should measure this sometime.

Next step is to watch the slow control voltages over a long period of time along with the vac can temperature sensors to see if vac can temperature flucutations are still affecting our lock to the PLL.

Attachment 1: October12Beatnote.jpg
October12Beatnote.jpg
  1948   Wed Oct 11 20:49:48 2017 CraigDailyProgressLaserCalibration of Slow Volts into Laser Frequency Hertz

I made a script called SlowVoltageToHertzCalibration.py in the ctn_labdata/scripts/ Git repo.  It takes in a cavity scan like those found in ctn_labdata/data/20170817_LaserSlowFreqScan_RefCavResonances, with Laser Slow Control Voltage in the first column and Cavity Transmission DCPD Voltage in the second column.  The cavity scan changes the slow voltage between -10 V and 10 V.  Transmission light peaks with each FSR, and for the higher order modes... The script sorts out which peaks are the carrier peaks, finds the average slow voltage difference between peaks, and compares it to the FSR to generate a calibration.

The North Path laser slow control calibration is 3480.89915798  3480 MHz / SlowVolt

The South Path laser slow control calibration is 3644.56423675  3640 MHz / SlowVolt

The FSR for both cavities is 4069.94919902 4070 MHz for a cavity of length 3.683 cm.  The laser frequency is 281 THz.  (1 THz = 1000 GHz)

Cavity scans are shown below for convenience (except that I used a linear y-scale, so its not actually very convenient).

Attachment 1: Aug-17-2017_120200_NorthLaserSlowControlVoltageVsTransPower.pdf
Aug-17-2017_120200_NorthLaserSlowControlVoltageVsTransPower.pdf
Attachment 2: Aug-17-2017_115409_SouthLaserSlowControlVoltageVsTransPower.pdf
Aug-17-2017_115409_SouthLaserSlowControlVoltageVsTransPower.pdf
  1947   Tue Oct 10 00:49:34 2017 awade, CraigSummaryFSSReplacing U3 on north path (2010:005) FSS servo board.

I had another look at the common path gain stage of the FSS field boxes (LIGO-D040105).  In modifications to the two field boxes in the PSL lab a switch with capacitor in series had been added to U7 for intergrator boost.  A gain killing switch, with 10 Ω in series, had also been added to U3 to manually kill gain while engauging the intergrator.  We suspect this -- along with only 100 Ω to ground on the out2 test point -- may have degrated the U3 AD829 chips. 

A transfer function from TP2 to TP5 of the north servo board (LIGO-D040105) was taken.  An excitation was put into the Test2 SMA (on RF board LIGO-D0901894) and a pair of HP 41800a active probes were used to take the TF accross the test points. Also, for comparison, I did the same for the FSS field box procured from the 40m (2010:006).  The data are plotted below: Ser5 is the north path serial numbered #5 board and Ser6 is the #6 board of the 40m unit.  Between the north path (2010:005) and 40m (2010:006) boxes there is a overall gain difference (due to changes in the feedback resistor) but the slope is very different.

I then replaced U3 (an AD829) on the servo board (LIGO-D040105) and retook the transfer function (also plotted below). With a new op amp the slopes of the magnitude and phase of the bode plots now match between (presumably working) 40m box and the north path FSS box. This is good.

One thing I don't understand is why there is a roll off starting at or below 1 kHz.  I used a 300 Hz resolution BW on the TF so below 600 Hz is bad.  But I've probably done something stupid in the way I've gone about this measurment.  I wanted something quick and easly repeatable, I'll probably realize tommorrow what I've done wrong.  Craig measured this about two weeks ago and it looks much flatter. What he sent me is attached below, it includes a LISO model. From the info on the AD829 datasheet we expected it to be flatter out to 1 MHz for a gain of 4.

So these seems replacing U3 on LIGO-D040105 board is a slight win but we (really just me) still don't understand why it has a sloped TF below 1 MHz.

---

I also took the opportunity to replace the R1 and R2 resistors with their design value of 453 Ω. I had used 470 Ω in a previous rework of the board (PSL:1918), but these were the wrong pitch and I did a messy job of it.  I found these 453 Ω taped to the inside of the north box.

 

Attachment 1: 20171009_220549_Ser6_ComPathTP1toTP5_09-10-2017_175407.pdf
20171009_220549_Ser6_ComPathTP1toTP5_09-10-2017_175407.pdf
Attachment 2: fmoenfipkniealnd.png
fmoenfipkniealnd.png
Attachment 3: 20171009_DebuggingNorthPathServoBoard.tar.gz
  1946   Fri Oct 6 21:18:19 2017 awadeDailyProgressFSSRepairs to FSS interface boxes.

The North and South path FSS field boxes have been connected and HV powered up.  

North locks and the cavity has very good absolute frequency stability with the vaccan temperature PID controls on. Its remained locked and well within the PZT actuator range for well over an hour. However, even with very low gains set, the PZT fast monitor is going into oscillations as it hits the rail.  I powered down the HV to disable the EOM and locked just with PZT and it was possible to turn the gain down and get a well behaved locking error signal.  My suspicion is that the EOM is fighting the PZT and there is some kind of sign error between the two. We can only flip the sign of the fast path. Maybe it is possible that PZT is correct and EOM is the wrong sign. We have a phase adjuster box, this is something to try: flip the overall sign of the error signal and then the field box switch.

We need to take a transfer function to see what is really going on, but this will only be possible if the error signal isn't entering into wild oscillations. 

The south path has some issues.  It is very likely that the alignment was bumped as I can't find a TEM00 mode anywhere. This needs to be aligned over the weekend.


In the previous setup I had put LP filters on the output of the FSS fast monitor before feeding into the acromag slow channels.  I'm now not sure if this is the right thing to do, re ADC noise.  Previously the slow channels fed into differential voltage channels on the acromag X1221 cards had not been grounded relative to the card ground return.  This had lead to a bunch of junk noise and pickup. The acromag manual recommends making a link to return from minus or plus terminal of each channel.  I suspect putting the LP filters in effectively filtered this with the capacitor of the LP across those terminals.  Still, without LP filtering the PID slow controls for the laser temperature bump the PDH lock off lock whenever the loop starts to ring. With the LP filters in, it just rides over the oscillations (giving just the average I guess) and lets the PID pull PZT to the center of its range.  Not sure if it is the 'right' thing to do to just put the LP filters back in?

The south FastMon in is properly linked to ground on the negative terminal, but it looks the North FastMon is still floating.

  1945   Fri Oct 6 14:07:20 2017 awade, CraigDailyProgressComputersLag in the PSL/ATF networks

I've restarted the FSS autolockers with a larger search range; the vaccan is now set to 30 C so laser frequency will have changed.

I'm finding the PSL/ATF network is now very laggy. This is for accessing to/from the outside world and for accessing things like screen forwarding within the network.  There have been changes over the last month to some of the configuration, but nothing major.  Its a pain to access EPICS screens now from laptops and other front ends as the delay to forward screens is now seconds.  We need to do a little debugging to find out what the issue is.

EDIT Fri Oct 6 20:48:44 2017

It appears that the cause of the problem was a bad DHCP setting on the top level router.  It had been set to start issuing IP addresses at 2 or above. So the Linksys BEFSR41 router (10.0.1.1) was dishing out IP addresses over the top of many of the other routers and devices with manuually set IP addresses in the range 10.0.1.1-150.  After fixing this by setting the starting point as 10.0.1.150 and above for DHCP, X11 forwarding sped up and intermitant dropping of EPICS channels seemed to stop.

  1944   Thu Oct 5 23:19:56 2017 awade, CraigDailyProgressFSSRepairs to FSS interface boxes.

Both units (2001:001 and 2001:005, North and South) has issues with the HCT157 multiplexer chips (U3).  U3 has been replaced on both interface main boards LIGO-D040423

Three of the four channels outputs were working to switch the full excitation voltage on the north unit (2001:001). However, the ramp engage output (pin 9) was only reaching an on-state value of 4.86 V (compared to >5 V on all other channels). This was probably enough to transmit logic state to the field box but leaves open the possibility that there are undiagnosed issues with the unit: the best option was just to replace.

There was also a power issue on the north interface box (2001:001).  I first replaced Q1, a high power PNP transistor D45H11, on the Low Noise Power Module (LIGO-D0901846-v4, rev C on version).  This wasn't the issue. I then replaced U3 on the same board, a AD829 op amp, that was used a -10 V reference voltage to control a -15 V output (buffered by the transistor).  This solved the dead negative voltage supply issue.  It looks like this had been reworked before, there was some damage to the pin 1 and 8 pads on this sub circuit.  However, these are not connected to anything. Its not clear what went wrong, its very possible that voltage polarity had been switched. Great care should be taken orienting the DC supply plugs the right way up with these boxes. It appears cheaper connectors have been used, either for the box or the plugs that go into it, that allow the sub-d connector to be forced in the wrong way up.  At least the damage doesn't seem to cascade through the rest of the unit.

I tested all voltages and the logic on all the digital chips and the two units in the PSL lab appear to be back to normal operation. The interface units are back in the rack and plugged in.  We are ready to turn lasers on and re aquire lock. 

The vacuum can stabilization is also up and running.  I've been tweaking parameters for the PID every time I walk past; mainly turning down the integration term that was too high. Either Craig or I should sit down with Kira tomrrow and debug her python logging code (it looks like it should work, just some python/EPICS quirk).

I took photographs of the repairs, but they are still on the SLR which I don't have at the time of writing.


At the end of assembling the FSS interface boxes I had this screw left over:

Unknown screw
Unknown FSS interface box screw

I will put it in a box with a question mark on it so that whoever find it in 5 years will know where it is from.

  1943   Tue Oct 3 17:53:32 2017 awade, CraigDailyProgressFSSDamage to the south interface board logic and debugging FSS north interface box power issues

Addressing issues with south interface box digital logic

Some time last week when we reconnected the FSS boxes to the slow channel controls we realized that I had accidentally routed 24 V into the binary engage channels from the Acromag cards. The Acromag cards were ok, but the binary multiplexer chip U3 (HCT157) on the interface board ('south' serial number 2010:005) were not ok.  Pin three on U3 did not go low (0.6V) when the driving excitation voltage was off; when toggling the excitation voltage it went from about 3.6 V to 5 V (instead of 0.6 V to 5 V).  This meant that the following board logic was inoperable. Some repair work is in order.

I've ordered another SN74HCT157 SOIC chip from mouser to replace the likely fried chip.  It arrived on campus yesterday and is still working its way through Caltech logistics.

For rework jobs, like replacing this surface mount component, I also ordered a hot air iron and low melt solder flux and alloy to assist.

The north path (serial number 2010:001) logic has not been tested due to power issues detailed below.


North interface box low noise power board issues (D0901846, rev C, serial 2010:001)

Yesterday Craig and I also looked at the north FSS interface box. After a bit of poking around we found that there were no negative supplies to the chips on the north interface board. The low noise power LIGO-(D0901846-v4, revision C) generates a ±15 V from a 10V precision reference IC (LT1021-10) that is buffered and also separately inverted for driving the negative rail.  The LT1021-10 (U4) was fine and the inverted stage was also producing -10 V.  

I've traced the issue back to somewhere around U3 (an AD829 op amp) and Q1 (a PNP transistor D45H11). All voltages seem to be supplied appropriately to these sub-circuits but the output voltage is -1.77 V instead of -15 V. Its not clear what the mode of failure is here, but at least it is localized.  It also looks like there has been a little rework done before on U3. Koji tells me that he and Tara did some diagnostics of a power issue when it was previously hooked up with the wrong polarity. I can't find this in the elog either by searching the DCC number or any combination of {Low,noise,power,board} but I may be missing it.

I will have a bit more or a poke around and a think about how to point point the exact failure but will get a AD829 and and D45H11 ready to drop in as replacements.


3rd FSS box

I've also tracked down the third set of TTFSS interface + field boxes that was at the 40m.  This will be useful as a temporary replacement and reference for what the working version should do. 

  1942   Tue Oct 3 09:33:01 2017 Kira, CraigDailyProgressTempCtrlheating/cooling data fitting

Yeah, that's what I'm using.

Quote:

What model are you using to fit this?  What is p0, popt, or pcov? 

I looked at the curve_fit tutorial, so it seems like your model is:

$M(x, \alpha, \beta, \gamma) = \alpha \exp{(-\beta x)} + \gamma$

where x is your data,  \alpha, \beta, and \gamma are your model parameters, p0 are your initial parameter values, popt are you optimal model fit values, and pcov is your covariance matrix.

Quote:

I fit the data that Kevin and I gathered a while ago for the heating/cooling test we performed.

 

 

  1941   Mon Oct 2 19:24:27 2017 Kira, CraigDailyProgressTempCtrlheating/cooling data fitting

What model are you using to fit this?  What is p0, popt, or pcov? 

I looked at the curve_fit tutorial, so it seems like your model is:

$M(x, \alpha, \beta, \gamma) = \alpha \exp{(-\beta x)} + \gamma$

where x is your data,  \alpha, \beta, and \gamma are your model parameters, p0 are your initial parameter values, popt are you optimal model fit values, and pcov is your covariance matrix.

Quote:

I fit the data that Kevin and I gathered a while ago for the heating/cooling test we performed.

 

  1940   Mon Oct 2 17:37:46 2017 KiraDailyProgressTempCtrlheating/cooling data fitting

I fit the data that Kevin and I gathered a while ago for the heating/cooling test we performed. For cooling, I used curve_fit with an initial value of p0=(1,1e-6,1) (just copied these values from an online tutorial) to get the graph shown below. I also attached the whole program as well.

The popt value was 

array([  6.86500209e+00,   1.61740923e-04,   2.13686294e+01])

and the pcov value was

array([[  3.81451668e-04,   9.42870109e-09,   5.48247926e-06],
       [  9.42870109e-09,   1.17596815e-12,   9.28431073e-09],
       [  5.48247926e-06,   9.28431073e-09,   1.05408165e-04]])

The heating data has a break in the middle which I am not sure how to deal with, so I just took the data before the break. The program is similar to the cooling one. (used p0=(-1,1e-6,1) instead)

popt:

array([ -8.35340372e+00,   2.01869270e-04,   2.83287046e+01])

pcov:

array([[  9.83759992e-04,   5.09067460e-08,  -1.10929039e-03],
       [  5.09067460e-08,   3.47323122e-12,  -6.77130920e-08],
       [ -1.10929039e-03,  -6.77130920e-08,   1.38998816e-03]])
Attachment 1: temp_down_plot.png
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Attachment 2: temp_up_plot.png
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Attachment 3: fit.tar.gz
  1939   Mon Oct 2 12:30:15 2017 ranaSummaryFSSLISO & mfil

When using LISO to simulate your circuits, you may want to plot a few different cases on top of each other. For this purpose, there is the perl script 'mfil' in the LISO GIT repo:

https://git.ligo.org/40m/LISO/tree/master/filter

Although eventually someone with some free time may write a python version, for now it might be best if we could just use it as is or potentially make a modified pyKAT to run it.

  1938   Sun Oct 1 15:59:57 2017 ranaMiscComputersBURT

This is very similar to the BURT and autoBURT system that we usually run with EPICS. It does hourly snapshots of all settings and restores them on boot up. You can also make safe snaps and there is a program 'burtgooey' which allows you to select which time to restore from for manual save/restore. Its been running at the 40 since 1998; seems reliable. Maybe Jon also has something like this running in TCS lab?

Quote:

Craig has written a python script called channelDumper.py that trawls the modbus/db/ folder, parses the .db files to find all the EPICS channel names and writes them to

  1937   Sat Sep 30 17:09:03 2017 awadeDailyProgressVacuumCleaning refcav Au coated heat shields

Refcav heat shield tubes removed from vacuum can.  End caps were placed into baking rig, heat was turned on after pumpdown at Sat Sep 30 16:25 2017.

For reference variostat was set to 40% of 110V, which seemed to be about right for 100 C yesterday.

Quote:

Parts are now cleaned and ready to bake.  I've put them in a UHV foil lined box with a TX1010 wipe in the bottom to stop scratching. Its a very small vacuum can so I'm baking the two tubes first and will do the end caps and misc parts in the next cycle.  I started a bake cycle at 7:45 pm for just the shields and will let it go for a few hours at 100 C.

This time I wrapped the vacuum can initially in copper foil, then the heater strap followed by a generous amount of food grade aluminum foil.  Its heating up much faster in this configuration.  I wasn't sure how the cloth wipes would fair under baking so the shields were very gently placed directly on an aluminum lining inside the can.  

Pictures attached. 

 

  1936   Sat Sep 30 17:05:10 2017 awade, CraigMiscComputersCrontab job added to acromag1 to log system state

Craig has written a python script called channelDumper.py that trawls the modbus/db/ folder, parses the .db files to find all the EPICS channel names and writes them to disk. A complimentary function channelWriter.py grabs these system state files and reinstates channel values from previous channel dumps on demand. Both work great for recovering system states quickly when cycling modbusApp EPICS server when we are changing channels around.

I have now placed a hourly job in the crontab (command crontab -e) that dumps the state of all channels.  These are stored in /CTNWS/data/ directory on acromag1. This should help us track changes and recover quickly from system failures.

 

This is the job placed on the crontab task list:

* */1 * * * bash /home/controls/scripts/cronlauncher_channelDumper.sh

 

cronlauncher_channelDumper.sh is a bash wrapper script so that all the necessary environment variables (ussually in .bashrc) are avaliable to the task. All these scripts are in the CTN directory of the 40m SVN.

  1935   Fri Sep 29 20:06:21 2017 awadeDailyProgressVacuumCleaning refcav Au coated heat shields

Parts are now cleaned and ready to bake.  I've put them in a UHV foil lined box with a TX1010 wipe in the bottom to stop scratching. Its a very small vacuum can so I'm baking the two tubes first and will do the end caps and misc parts in the next cycle.  I started a bake cycle at 7:45 pm for just the shields and will let it go for a few hours at 100 C.

This time I wrapped the vacuum can initially in copper foil, then the heater strap followed by a generous amount of food grade aluminum foil.  Its heating up much faster in this configuration.  I wasn't sure how the cloth wipes would fair under baking so the shields were very gently placed directly on an aluminum lining inside the can.  

Pictures attached. 

Attachment 1: 2017-09-29_19.36.57.jpg
2017-09-29_19.36.57.jpg
Attachment 2: 2017-09-29_19.33.34.jpg
2017-09-29_19.33.34.jpg
  1934   Thu Sep 28 21:15:12 2017 awadeDailyProgressVacuumCleaning refcav Au coated heat shields

Its time to clean parts to go into vacuum. I tested the Branson EC ultrasonic cleaning solution on a couple of gold coated DC connector pins.  Close visual inspection shows that doesn't seem to be any damage, pitting or dulling of the surface quality from 90 minutes at 60 C with the alkaline (12.5 pH) 2-3 % solution (by volume).  Pictures are attached below of the pins, left is pre clean examples and right is post clean examples.

I've unwrapped the gold coated shields and caps and inspected them.  Photos of one of the shields (loaded in front of bath). There were some minor scratch imperfections from the original manufacture and it isn't blindingly shiny (i.e. polished) but is otherwise in a good state.  Similar to aluminum foil we probably don't want a super shiny surface for room temperature emissivity at ~10 µm. According to RaNA the dull side of Aluminum foil has a lower emissivity at 10 µm than the shiny side. He may have a reference to add.


The sonic bath has been cleaned. I've made a tray holder to suspend beakers in the main bath (pictures attached). These beakers have clean DI water and Branson EC detergent to loosen any dirt and oil.  The main sonic bath is filled with regular tap water and some general use surfactant to improve the transfer of mechanical energy.  Usually surfactant is recommended to lower surface tension. This improves cavitation in and around the parts to be cleaned. Although it may not be necessary the main bath.  I found that the standing wave pattern on the surface was much stronger once I added a bit of general purpose non-foaming surfactant. It seems to be doing a better job so this is probably the way to go.

The shields were suspend from thin wire, small pins for crimping and connecting are just directly in the small beakers.  I was unable to fit the end caps into this cycle so they will have to be done tomorrow.

The shields were put in for 90 minutes at 60 C with ~ 3% solution of Branson EC surfactant.  Once the time is up I will pull them out, wash them down thoroughly with deionized water and then with isopropanol/methanol.  They'll be left in the flow bench overnight to air dry and I'll put them in for a bake cycle tomorrow.

Quote:

I'm now preparing the bake rig for baking the ref cavity shields.  

I've cleaned out the inside of the bake rig vacuum chamber with some clean fabric wipes and methanol.  The setup is out in the hall to avoid stinking out the lab.  The vacuum pump has been hooked up and is pumping.  I've used a AC heating strap wrapped around the chamber and used cooking grade aluminum foil as crude insulation to help with heat build up. To control temperature I have a variac salvaged from the EE workshop broken pile (only thing wrong was a loose knob). To monitor temperature a thermocouple is taped on with Kapton tape to sense temperature.

The rig has reached 120 C in 15 minutes and I'm now adjusting the variac percentage of total power to give something stable around 100 C.   

Will bake for a few hours and then let cool overnight.

 

Attachment 1: 2017-09-28_20.36.31.jpg
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  1933   Fri Sep 22 18:38:15 2017 awadeDailyProgressVacuumBaking bake chamber

I'm now preparing the bake rig for baking the ref cavity shields.  

I've cleaned out the inside of the bake rig vacuum chamber with some clean fabric wipes and methanol.  The setup is out in the hall to avoid stinking out the lab.  The vacuum pump has been hooked up and is pumping.  I've used a AC heating strap wrapped around the chamber and used cooking grade aluminum foil as crude insulation to help with heat build up. To control temperature I have a variac salvaged from the EE workshop broken pile (only thing wrong was a loose knob). To monitor temperature a thermocouple is taped on with Kapton tape to sense temperature.

The rig has reached 120 C in 15 minutes and I'm now adjusting the variac percentage of total power to give something stable around 100 C.   

Will bake for a few hours and then let cool overnight.

Attachment 1: 2017-09-22_18.16.42.jpg
2017-09-22_18.16.42.jpg
  1932   Wed Sep 20 22:22:37 2017 awadeNotesVacuumPreparing for shield bake

I pulled the ultrasonic cleaner out from under the bench. The reservoir and most of the gear is pretty dirty.  

I filled with water and ran it at 60 C for 30 min with just water which seems to have dislodge most of the stuff.  There was a slight burning smell initially, I think this was dust burning off: it seems to be working fine now, but I wouldn't leave it in the lab unattended.

The plan is to suspend parts in Pyrex beakers in a clean detergent solution. We have a box of the Branson EC, this is an alkaline low foaming detergent.  The bottle doesn't list pH. We don't want to mess up our shiny surfaces. I'm not sure how this will interact with the gold coated copper parts.  I'll do a little googling and test out some goal platted contacts used in connectors.  


I've also located the baking rig in the OMC lab.  I just need to wrap it with some heater wires, give it a clean inside and do a prebake.  raNa suggests in the hallway to not stink up the lab.

 

Attachment 1: 2017-09-20_20.51.34.jpg
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  1931   Wed Sep 20 11:26:25 2017 KiraDailyProgressTempCtrlheater time constant

Kevin and I set up a measurement for the heater in the lab. I have attached some pictures of the setup. The power comes from a 24V voltage supply which will later be swapped for a 24V cable. We connected the DAC to the circuit and set the voltage to 0.8V. To connect up the heater, we had to use a terminal block to connect the wires from the heater to the wires of the Lemo connector. We will eventually attach the wires of the heater to a Lemo connector as well to avoid having to do this. We attached the temperature sensors using a breakout board, since the connectors weren't the same. I'll be building a box later today to be able to connect it without using a breakout board. Also, when connecting the DAC to the circuit, I made a D9 to BNC connector, but I wired the ground and signal backwards, so we also needed a polarity changer to attach it correctly to the DAC channel. I will fix this today as well.

We measured the temperature of this setup using one of the sensors for a few hours, then turned off the voltage and let it cool down again. Kevin made plots with the data. I then calculated the approximate time constants for heating and cooling. For heating, it was about 1.67hr, and for cooling it was about 2.22hr. Since we didn't reach the asymptotic value completely, I assumed the maximum value it could reach was about 29C.

Edit: attached photos of the setup and Kevin's plots

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  1930   Tue Sep 19 01:06:36 2017 CraigDailyProgressElectronics EquipmentRack is Powered

The rack has been powered.

I made, installed, and powered the +/- 24V and +/- 18V LIGO DC power rails today. 

The 24 V rail is powered by the Kepco power supplies.  The australian scavenged some Sorensen power supplies for the 18 V rail.

Our Kepco power supplies are 1/4 rack single sided supplies. (Serial number: ATE-25-2M F54459 R21)  In picture two, you'll see that two of the power supplies are missing, 'cause I took 'em out because they weren't working. 

I took a quick look and found they aren't broken (one rattles when turned on -_-).  They just don't have the 50 pin jumper program card in the back (pictures 4, 5, 6).  I looked very extensively in our downstairs labs but was unable to find anything like this.  I also checked the Kepco website for what this connector is called, they called it a PCA 25-1 but apparently this isn't the real name of the connector according to google.  If anyone knows the name of this connector we can buy two and have two additional good variable power supplies, or just buy some from Kepco themselves.

The next step is to create good LIGO DC connectors for our FSS panels.  Then we can turn on the lasers, power the PDs, connect the FSS boxes, and lock again.


K and K assembled the temperature sensor box.  We want to put this on the rack ASAP, which means they'll have to make 4 long two pin LEMO connectors.  The vac can heater is in a rack panel already, all we have to do is attach it.  Soon (tomorrow?) we will be able to close the loop on vac can temperature stabilization.

Attachment 1: RackIsAlive.pdf
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  1929   Mon Sep 18 19:45:04 2017 awade, CraigDailyProgressElectronics Equipmentacromag1 reboot

Acromag1 and ws3 have both been reconnected to the network and booted. 

New ModbusApp session is started in tmux and all channels look accessable. 

No access to outside world, external IP address seems to be down ATF:2178.

Access to the network is now restored ATF:2179.

  1928   Mon Sep 18 16:09:55 2017 johannesNotesEquipment loanBeam'R2-DD to 40m

Relocated dual slit scan beam profiler Beam'R2-DD to 40m lab. Anticipated time needed ~1 week.

  1927   Mon Sep 18 15:08:35 2017 ranaNotesVacuumSolder in vacuum for Kapton heaters

In vacuum circuit practices: https://dcc.ligo.org/T060280

  1926   Mon Sep 18 13:34:13 2017 awadeSummaryFSSFSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105

Yes, this is bad. I thought maybe it was an issue but didn't address it as was working off the original design schematics. Also, originally I was using the SR785 to start with.

Information on all the changes made is spread thinly over the elog. It hard to search as terms used and catagories change over time: I just need to do a more detailed search. I've made a ATF wiki summary page HERE to bring together and summerize what we do know. Future changes should be document cronologically and in detail on the elog and ALSO as a live summary on the wiki.  I will add a section at the bottom of that page for a change-log where description, date and elog entries can be linked. 

Quote:

Ugh - no, plugging in the network analyzer should not change the gain of the servo. This seems quite bad. Lets discuss and fix.

In addition to Frank's fixes, Tara also did some patches with advice from Koji. We should make sure you have the right version of schematic.

  1925   Mon Sep 18 00:46:08 2017 ranaSummaryFSSFSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105

Ugh - no, plugging in the network analyzer should not change the gain of the servo. This seems quite bad. Lets discuss and fix.

In addition to Frank's fixes, Tara also did some patches with advice from Koji. We should make sure you have the right version of schematic.

Quote:

 

I switched the R1 and R2 50 Ω (on D040105-C) out for something higher again, this time 470 Ω.  I could only find 470 Ω in the EE workshop (which is close enough to the design value of 453 Ω).

Now plugging 50 Ω loads into the OUT1 and OUT1 common monitor points lowers the common path OLG by 7.8 dB and 10.8 dB respectively.  This still seems like a big change to me but I'm not sure if I should increase series resistance any higher.

Let me know if this is dumb and I'll change it back.

In any case, once you have R1 and R2 at 450-500 Ohms, the circuit should not change behavior just by adding 50 Ohms onto EXC or OUT2. You should be able to do the TF without OUT1.

  1924   Mon Sep 18 00:00:02 2017 Craig, awadeDailyProgressElectronics EquipmentRack Resurrection

Andrew and I have disassembled our electronics rack.

It will rise again in three days, in fulfillment of the scriptures.

Gone is the messy wire rail with Phoenix Contact fuses.  Gone is the VME circuit card holder.  Gone is the desktop computer acromag1 (10.0.1.33).  Gone is the oscilloscope 360noscope (10.0.1.71).  Gone are the two HP variable power supplies.

Still there are the KEPCO power supplies, the quiet APC laser power supply, the crappy acromag card panel (soon to be replaced thnx 2 awade), the two TTFSS panels (D0902048), the 36.0 and 37.0 MHz crystal oscillators panel (D1600008), and a nice BNC breakout panel.

To be added are new Sorenson power supplies, nice +/- 24 V and +/- 18 V LIGO DC power rails, and more supports custom made by awade as I write this.

While removing the messy wire rail, I noticed some broken connections.  In the RackResurrection.pdf attached, the broken connections are shown in pictures 9 and 12.  Picture 9 shows the + 24 V power supply with two ground wires detached.  Picture 12 shows a wire from the + 17 V rail to one of the TTFSS panels detached from the wire rail.  Unclear if these broken connections are causing our FSS box issues, it surely can't help.  The broken connection in Picture 12 could have happened during disassembly, but the + 24 V power supply one was there when I started.

The LIGO DC power rail shovel connectors are not compatible with the KEPCO power supplies, they are too big.  I have requested assistance from Gautam in locating the correct shovels.


In addition to the rack's demise, the ceiling cable ladder has been purged.  Any long cable that can be rerouted has been rerouted.  I added a plastic bridge for wiring BCNs to the cable ladder from the middle of the optics bench.

The power surge protectors on the underside of the table supports have been completely unplugged, moved, and reattached.  The rails on the north side have been daisy chained together, and then plugged into the APC power supply.  The same was down for the south.  The north surge protectors have the lasers plugged into them, so quiet, low intensity fluctuation power is necessary there.

The desktop computer acromag1 has been placed underneath the clean bench for the time being.  We have acquired an extra monitor, so soon we will have acromag1, ws3, and awade's raspberry pi running in our lab (LAN party).

The laser mains supply box has been removed from the cable ladder and placed underneath the optics bench.  Safety expert awade has arranged things such that the emergency laser stop button and laser safety lights will be properly connected and actually work to keep us safe.

The PLL equipment is sitting on the rolling shelf.  We want to put the Marconi and preamp on top of the rack eventually.

We also must redo the crappy photodiode connectors and crappy temperature sensor wire mess.  The temperature sensor box must replace this whole clipdoodle power supply nonsense we had. 


The first thing we did this afternoon was take down all the wrapping and turn on the HEPA filters, the clean bench, and the ion pump.  The ion pump power supply has been placed where the PLL electronics used to be, above the transmission PDs.  We removed all electronics from under the bench, cleaned the floor with awades robot, and cleaned the top of the rack from dust.

Finishing the rack electronics will be a week of effort, but at the end of the week we want to have everything relocked with a beatnote, with vac can thermal controls on the rack and working.

Attachment 1: RackResurrection.pdf
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  1923   Fri Sep 15 20:42:55 2017 Craig's left brainSummaryNoiseBudgetText wrapping

The text wrapping issues is back, PSL:1919 post had a line of *** unbroken without spaces that forced a super wide page.  Use the horizontal line button next to the smiley faces to make breaks in text.

PSL:1745, shifts returns were removed as well as zipping the attachment

PSL:1644, text only attachement was zipped and reuploaded

PSL:1641, text only attachement was zipped and reuploaded

PSL:1100, shrink-rayed ludicrously large image

PSL:160, fixed shift return, text copy-pasted from non-text wrap source

The purge is complete. 

 

 

  1922   Fri Sep 15 19:32:10 2017 awadeNotesVacuumSolder in vacuum for Kapton heaters

I looks like the only feasible way to attach wires to our Kapton heaters in vacuum is to solder them on. I can't find any suitable clips/crimps.  There are two issues. First, I and Yinzi both found it hard to form a reliable solder joint to the Kapton pads in our initial tests: the surface type and the fact it is thin and holds no heat means that the solder beads onto the wire and doesn't wet to the flat surface of the heater electrical contact.  Secondly, solder has rosin and other contaminants that are potentially bad for outgassing and redepositing on optics in vacuum. Furthermore, it is difficult to bake because it has such a low melting point.

I did a quick search for UHV compatible solder, this is what I found

  • Accuglass UHV solder part 110796.  I believe the MIT people used this for some squeezer parts for their setup and stuff going into LIGO vacuum (although I can't find it on their elog).  The website lists this as $39 per inch of solder (not including Isopropyl soluble flux).  Its an 85% gold alloy, which might explain the price. Max bake temperature 250 C, melt point 280 C, contains no rosin or flux (this is applied separately). 
  • German company Allectra sells an Sn/Cu/Ag UHV solder part 315-SOLDER.  From their catalog 0.5 m is 32 Euro ($US 38) and comes with the flux solution, melting point is 225 C.  There is also a  Pb/Ag non-lead-free version that is 35 Euro with a higher melting point of 300 C, this one is bakeable at 250 C.
  • Lake Shore also sell some soldering materials. They sell a 'high temperature' Pb90Sn10 that goes to 227 C, this may not be good for the reasons listed below. Also they have Indium, presumably used for mechanical joints, although it does have an ok conductivity. Frank used indium for mechanical attachment for parts in the past (see PSL:786). One issue, as rana has pointed out, is that it can be a little unreliable for good mechanical contacts. Its very ductile which means that it sticks like stiff chewing gum, but also peels off too easily.  Lake Shore also sells something called Ostalloy 158 solder, melting point is 70 C, so only for cryo stuff.

From general reading, apparently lead based solders tend to outgas and should be possibly be ruled out. This has something to do with the vapor pressure of lead.  Antimony has similar issues. That said, other sources seem to have no issue with it. The tin-silver solder alloys tend to be a better choice and ones like Sn95Ag5 have melting points of order 230 C so can be baked up to 200 C.  Rosen free is better with a separately applied flux that is Isopropyl soluble.

I also wrote to Rich Abbott to see what they did for other LIGO.  He said they regularly use Kester 37/63 rosin core solder for a small joints within the LIGO vacuum envelope.  This solder is Sn63Pb37  and has a melting point of 183 C and has a 44 Resin RA activated rosin core.  The low melting point puts an upper bound on bake temperatures.  There is residue from the flux that can be cleaned away with isopropyl.  They made a technical note on using these Sn63Pb37 solders with rosin cores in vacuum along with cleaning procedures at LIGO-T1300040.  According to Rich there was also an experiment conducted to test its UHV suitability (see LIGO-T1200491) but he didn't have the outcome/results on hand.

So for our heater wire soldering attachment we might be able to get away with using Kester37/63 style solder, if we do a good job cleaning it. Or, we might like to opt for something that is silver/tin based and apply a separate soluble flux at the time of soldering.  

 

  1921   Fri Sep 15 14:45:54 2017 ranaSummaryNoiseBudgetNoise Budget Summary

good, but please no LDAS links in this elog; we don't want to be tied down to ligo.org and their mercurial ways

Quote:

 

 spent a bunch of time making an interactive noise budget bokeh plot.  HERE IT IS. 

for things which require permanence, you can just make a directory in the elog directory on nodus and put your Bokeh stuff in there

  1920   Fri Sep 15 14:33:06 2017 AidanSummaryOtherCTN lab preparation for the plumbing work

[Aidan, Gabriele, Eric]

We turned off and covered the clean flow bench by the west wall. We also removed the items from off the top on the half closest to that wall. We removed all the cables hanging below the pipe and lay them on the floor.

 

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  1919   Fri Sep 15 02:05:46 2017 CraigSummaryNoiseBudgetNoise Budget Summary

The noise budget posted in the previous noisebudget elog has been described by experts as "bunk".  I am here to right the ship with a more correct noise budget.  I have committed the corrected noisebudget code in the CTN_noisebudget git under /CTN_noisebudget/noisebudget/noisebudget.ipynb.

In particular, the pink curve in the new noise budget is the real COATING THERMO-OPTIC NOISE.  It is far lower than before.  This is why the optimized coating layers were created in the first place: to strategically cancel coating thermoelastic and coating thermorefractive noise.  Recall that thermo-optic = thermoelastic + thermorefractive, and they can cancel if their phases are carefully controlled.

With lowered COATING THERMO-OPTIC NOISE, we can now think about measuring COATING BROWNIAN NOISE for the AlGaAs coatings. 

I have included a new trace: the SEPT 2017 BEAT MEAS.  These are just some preliminary PLL noise limited spectra to keep you excited for great low noise measurements to come.

***


I spent a bunch of time making an interactive noise budget bokeh plot.  HERE IT IS. 

Advantages: You can scroll over and see exact numbers at whatever frequency you want.  You can pan and zoom.  You can click the legend to remove lines you don't want to see.  It looks nice.  We can host these on our 40m server soon (I'm hosting this on the ldas cluster, so you have to login).

Disadvantages: File is huge (~20 Mb) and takes a long time to load.  Interactivity is choppy.  Panning causes lines to disappear.  Tick labels are cancerous.  The dark background is good only if I can figure out how to make the entire background dark, this means making custom CSS files and I'm no html expert.

 

Quote:

This is an overview of the old noise budget made by Evan and Tara.  The plot is the result of noisebudgetQWL.ipynb written by Evan.  QWL stands for quarter wavelength, referring to the coating layers' thickness (see Fig 2 of Evan's paper).

Each curve is given an brief statement about it's origin.  Here is a link to Tara's paper on the PSL Lab setupHere is a link to Evan's paper.  These papers have convenient tables with parameter values for the setup and reference cavities. 

The x axis is frequency in Hz, the y axis is the ASD in Hz / rtHz, aka frequency noise.  Many of the thermal noises are reported as length noise.  To convert from length to frequency noise, use Delta f / Delta L = c / (L * lambda)

COATINGS THERMAL NOISE BUDGET

TOTAL EXPECTED (blue):  Sum of all expected noises.  This does not equal the actual measurement in red, meaning not all sources of noise are accounted for in this plot.  One suspicious missing noise source is scattering.  Not much has been done to mitigate scattering in the PSL Lab setup.

MEASUREMENT (red): Actual beatnote measurement measured using a phase locked loop with the cavities' transmission radio-frequency photodetector (See Fig 2).  The two lasers are locked to their respective cavities to reduce the free-running laser noise via PDH control loop gain.  By suppressing laser noise, we can reveal the residual cavity length noise, hopefully dominated by broadband thermal noise.

COATING BROWNIAN (green): Theory curve of the estimated coating brownian noise.  Brownian noise magnitude is governed by a material's mechanical loss.  "Mechanical loss" refers to rate at which kinetic energy in a material is "lost" to thermal energy.  Unclear why Equation 8 in Tara's paper and Equation 3 in Evan's paper are different, I think it has to do with assumptions about the coating and substrate Young's modulus and Poisson ratio being the same.  In the noisebudgetQWL.ipynb, Tara's coating brownian noise equation is used.

COATING THERMO-OPTIC (pink): Theory curve of the estimated thermo-optic noise.  Thermo-optic noise comes from temperature fluctuations in a material causing cavity length changes.  This seems to be the key curve to all Tara and Evan's work.  The idea here, originated by Evans et al., seems to be that thermoelastic noise and thermorefractive noise can cancel one another in thin enough coatings.  Given by Equation 9 in Tara's paper and Equation 4 in Evan's. 

SUBSTRATE BROWNIAN (yellow): Theory curve of the estimated substrate brownian noise.  Like the coating brownian, but refers to noise originating from the fused silica making up most of the mirror.  Equation 5 in Tara's paper.

SUBSTRATE THERMOELASTIC (teal): Theory curve of the estimated substrate thermoelastic noise.  Thermoelastic noise refers to how temperature fluctuations cause a material to modulate its length.  Governed by the coefficient of thermoelasticity alpha = 1/L(dL/dT)  Equation 6 in Tara's paper. 

Incidentally, I will mention THERMOREFRACTIVE noise here since there is no curve dedicated directly to it, but it is important to thermo-optic noise.  Thermorefractive noise comes from temperature fluctuations changing the refractive index n of a material light is passing through.  Governed by the coefficient of thermorefractivity beta = dn/dT

POUND DREVER HALL SHOT NOISE (orange): Theory curve of shot noise.  Shot noise refers to the Poisson statistics of fluctuations in the number of photons incident on a photodetector.  This noise PSD is flat in frequency, but falls as 1/f^2 in power.  To convert from the power PSD to frequency PSD, multiply the power PSD by (1 + f^2/fc^2)/(2 P0 Gamma/fc)^2 where fc is the cavity pole, Gamma is the modulation depth, and P0 is the incident power on the cavity. Equation 20 of Tara's paper.

PHASE LOCKED LOOP OSCILLATOR NOISE (grey):  Measured noise from the PLL, presumably originating from the voltage-controlled oscillator (VCO).  Figure 5 in Tara's paper shows the PLL and the various noises found in it, including photocurrent shot noise, photodiode amplifier noise, and VCO frequency noise.  Unclear what the 707 Hz/V means, probably is the VCO control slope (i.e. if I want to change my VCO freq 707 Hz, I raise the control voltage by 1 V).

PHASE LOCKED LOOP READOUT (purple): Theory curve of the PLL readout noise.  The PSD for this noise rises as f^2, due to the fact that the PLL is a phase detector but the noise budget is in units of Hz/rtHz.  This curve is poorly documented compared to the rest of them (Evan calls it a "magic number" curve).  To convert from phase noise to frequency noise, multiply the phase PSD by f^2.

SEISMIC COUPLING (black): Measured curve of the seismic coupling into the experiment.  The raw data taken appears to be seismic velocity in units of m / (s * rtHz) as a function of frequency.  Then, seismic acceleration is obtained by multiplying the raw seismic velocity data by 2*pi*f.  Then the two stacks (?) and a spring (??) TF are modeled with hard-coded resonant frequencies and Q's and multiplied together to give a final seismic TF falling as 1/f^6.  The final seismic PSD is found by squaring the product of seismic acceleration, the 1/f^6 seismic TF, and an additional hard-coded seismic coupling factor dependent on the cavity length with units  m/(m s**-2).

PHOTOTHERMAL NOISE, ISS ON (brown):  Measured curve of the photothermal noise.  Photothermal noise originates from fluctuations in laser intensity causing changes in the amount of laser power absorbed by the coatings, which causes coating temperature fluctuations.  Seems to be the expected limiting noise at low frequency.  The raw measurement was of relative intensity noise from both lasers.  To get the photothermal noise PSDs for each path, the RINs from each path are multiplied by the absolute laser power absorbed by the coatings squared, a "total photothermal TF" squared, and converted from length PSDs in units of m^2/Hz to frequency PSDs Hz^2/Hz.  The "total photothermal TF" is the sum of the coatings photothermal thermoelastic TF, coatings photothermal thermorefractive TF, and subtrate photothermal thermoelastic TF.  Each of these photothermalTFs are from units of transmitted cavity power to beatnote frequency fluctuations, (i.e. Hz/W).  The process of measuring these three TFs is explained in Evan's paper, section VI, subsection A.  It seems that the successful cancellation of expected photothermal noise was the main success of Evan's paper.

RESIDUAL NPRO NOISE (dark green): Theory curve for the residual NonPlanar Ring Oscillator (NPRO) laser noise.  The freerunning ASD of the NPRO is reported to by 10**4/f with units of Hz/rtHz.  This is then divided by the PDH control loop gain for both paths, squared into a PSD, and summed together into a final NPRO residual PSD. 

 

 

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  1918   Thu Sep 14 21:54:26 2017 awadeSummaryFSSFSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105

Edit (awade, Mon Sep 18 13:39:59 2017): These are modifications to the North path field box

Craig has been working on active probing the FSS boxes to work out what is going on there.  He came up against some unexplainably low gains and stuff that didn't quite match up with what we should expect when measuring transfer functions between TEST2 EXC (the common path excitation point) and TP5 and later test points in the box.  

A while ago I had found that measuring and tuning out1/out2 OLG with the Agilent plugged in would get to a stable loop, but as soon as I unplugged the Agilent it would be unstable.  I assumed that the monitor points needed to be 50 Ω loaded when not being measured: which is what I did as a default.  

The open loop gain from common EXC to TP5 on the servo board was -3.15 dB.  With common OUT1 terminated with 50 Ω this TP5 dropped to -17.8 dB or with OUT2 it dropped to -25.75 dB. Bad. This was a clue that maybe the series resistance to the monitor outputs was selected too low.

Now looking at the changes that Frank made to the schematic (PSL:893), he had changed the series resistors R1 and R2 from 453 Ω to 50 Ω saying that the monitors were limited by thermal noise.  I don't know if I believe that. We should have plenty signal to noise. Also, with 50 Ω to monitors a 50 Ω load of the network analyzer will have 100 Ω to ground. I have a feeling that this is causing the op amp to be over drawn in current. The AD829 datasheet says max current 32 mA.  I don't know if the servo signal at the point gets to 3.2 V offset but it might. It seems like it would be better to have higher load impedance to avoid overdrawing current out of the op amp output. 

I switched the R1 and R2 50 Ω (on D040105-C) out for something higher again, this time 470 Ω.  I could only find 470 Ω in the EE workshop (which is close enough to the design value of 453 Ω).

Now plugging 50 Ω loads into the OUT1 and OUT1 common monitor points lowers the common path OLG by 7.8 dB and 10.8 dB respectively.  This still seems like a big change to me but I'm not sure if I should increase series resistance any higher.

Let me know if this is dumb and I'll change it back.

  1917   Thu Sep 14 17:56:47 2017 KiraDailyProgressTempCtrlRe: Heater Circuit noise

Made a python script that makes the DAC output a sine wave voltage with an amplitude of 0.1V and a frequency of 0.1Hz (I used the same values as Yinzi did in her elog here). Hoping to run the test tomorrow for a few hours and measuring the noise. Thanks to Andrew and Craig for helping me set this up.

Quote:

Edit (awade Wed Sep 13 17:40:35 2017): Gautam may also have suggestions on how to do this better

Great!

We might also want to characterizing the input DAC noise into your circuit.  I think Yinzi and I did this a while ago, I think she made a post to the elog.  Maybe you'd like to re do this.  It basically amounts to outputting a slow (10- 100 mHz) sine wave to tickly the bits from the DAC and measuring the voltage noise (directly from the DAC) with the SR785.  We need to understand this noise in order to understand how much noise the heater driver is adding and how much is due to our DAC.

You might also want to compute the total rms noise in the band of interest by integrating the PSD (ASD?) down from high frequency down to low. From this you can work out the uncertainty/noise in the heat actually delivered. 

---

As a bonus, it can be a good idea to zip or  tar your data and the scripts used to plot it and attach to posts. Its a little more work at the time but it means you can easily work out what is going on in 6 months time.

Craig and I can also give you access to the ctn_labdata git to commit it to our data repository. 

 

 

Quote:

Kevin and I took measurements of the heater circuit noise using a spectrum analyzer. The heater was attached to it by both ends using BNC cables clipped to the ends of the heater. We used 600mV for the DAC voltage and +24V/-24V for the input. The temperature of the metal block changed from 34.1C to 34.7C as we took the measurement, which took about 13 minutes. We took an RMS average of 25 measurements in total to get the spectrum, shown in the first attachment. The setup is shown in the second attachment.

We first took a range of 0-200Hz for our measurement, but it was not accurate enough to see the dependence of the ASD and the frequency as the lower frequencies didn't have enough data points to accurately plot it. We then took 0-50Hz and got the result shown.

We also mounted the heater circuit box to the rack.

 

 

  1916   Wed Sep 13 14:17:20 2017 awadeDailyProgressTempCtrlRe: Heater Circuit noise

Edit (awade Wed Sep 13 17:40:35 2017): Gautam may also have suggestions on how to do this better

Great!

We might also want to characterizing the input DAC noise into your circuit.  I think Yinzi and I did this a while ago, I think she made a post to the elog.  Maybe you'd like to re do this.  It basically amounts to outputting a slow (10- 100 mHz) sine wave to tickly the bits from the DAC and measuring the voltage noise (directly from the DAC) with the SR785.  We need to understand this noise in order to understand how much noise the heater driver is adding and how much is due to our DAC.

You might also want to compute the total rms noise in the band of interest by integrating the PSD (ASD?) down from high frequency down to low. From this you can work out the uncertainty/noise in the heat actually delivered. 

---

As a bonus, it can be a good idea to zip or  tar your data and the scripts used to plot it and attach to posts. Its a little more work at the time but it means you can easily work out what is going on in 6 months time.

Craig and I can also give you access to the ctn_labdata git to commit it to our data repository. 

 

 

Quote:

Kevin and I took measurements of the heater circuit noise using a spectrum analyzer. The heater was attached to it by both ends using BNC cables clipped to the ends of the heater. We used 600mV for the DAC voltage and +24V/-24V for the input. The temperature of the metal block changed from 34.1C to 34.7C as we took the measurement, which took about 13 minutes. We took an RMS average of 25 measurements in total to get the spectrum, shown in the first attachment. The setup is shown in the second attachment.

We first took a range of 0-200Hz for our measurement, but it was not accurate enough to see the dependence of the ASD and the frequency as the lower frequencies didn't have enough data points to accurately plot it. We then took 0-50Hz and got the result shown.

We also mounted the heater circuit box to the rack.

 

  1915   Wed Sep 13 13:59:04 2017 awadeMiscDrawingsFour channel BNC breakout for Acromag front panel and other general use

I ordered BNC PCB breakout board parts yesterday. Purple.

Expect a 12 day turn around.

Quote:

The BNC keyed holes punched in the front of the Acromag crate (LIGO-D1600135) are all 0.5".  This means that none of the standard insulated panel BNC feed through fit (the in-line types are all 9.7 mm), I seem to only be able to find the 0.5" in the PCB mounted right angle BNC receptacles. Right now all that is holding the current BNCs in from rotating are lock washers and almost INHUMAN TORQUE FORCES.

Johannes had a 4-channel BNC to Sub-D 9 that he had procured from Downs (Old DCC D090415).

However, this part is now obsoleted and they have run out.  I made a quick board layout in Eagle (attached below with all of the Gerbers files).  I added male and female sub d receptacles and included an optional screw terminal breakout.  We often need quick break outs for multiple BNCs and end up making dangly octopus creations.  We might as well have a bunch of properly made breakouts.  

If there are no objections I will order a small batch some time next week.

 

 

  1914   Wed Sep 13 13:55:39 2017 awadeDailyProgressFSSFront and rear panels for FSS computer controls

I ordered FSS controler box front and back panels yesterday.

Can build as soon as they arive.

  1913   Wed Sep 13 11:25:03 2017 awadeDailyProgressComputersTesting X1111 card

Unrelated to yesterdays issues, I commented out all channels but our new acromag XT1111 16 BIO card (IP 10.0.1.46).  I've been trying to get the binary out channels working so that we can use these slightly cheaper cards in our FSS remote controls. It also frees up analog output channels for other uses. This is the block added to the .cmd startup file for the acromag server thing:

#### TEST XT1111 ####
drvAsynIPPortConfigure("c3BIN","10.0.1.46:502",0,0,1)
modbusInterposeConfig("c3BIN",0,5000,0)
drvModbusAsynConfigure("BIO_Reg_BINTEST","c3BIN",0,5,1,4,0,0,"Acromag")
###########################

I get no errors when I launch 'startAcromag' in a tmux session. However, when I try to configure a channel with the binary channel write out used for the XT1541 cards (8 analog out and 4 binary) a bunch of error 2s are thrown; this has something to do with the wrong register being accessed.  The reason for a choice of 4 rather than sixteen for the number of channels is that, as Bram Slagmolen pointed out to us, the channels are single bits of a 16 bit word. This means that there are four register addresses each with four channels encoded in each word.  In the setup we should therefore expect to define four drvModbusAsynConfigure commands for the XT1111 (or XT1112) cards each at a slightly different starting address.  

I defined a binary out channel in the usual way

record(bo, "C3:PSL-BIN1_EN")
{
  field(DTYP,"asynUInt32Digital")
  field(OUT,"@asynMask(BIO_Reg_BINTEST, 0, 0x1)")
  field(ZNAM,"OFF")
  field(ONAM,"ON")
  field(VAL,1)
  field(SCAN, ".1 second")
}

but I get error 2 when I launch the startAcromag. 

Problem not solved. I'm dropping this from my task list.

  1912   Tue Sep 12 17:40:14 2017 CraigDailyProgressComputersNew Workstation to Acromag Communications Restored

For some reason the new workstation we have in the lab was not communication with our acromag cards, leading to hours of confusion about why pressing buttons did nothing.  We have restarted the acromag communications and everything works now, but we aren't sure what went wrong in the first place.  We proceed characterizing the FSS box with this spectre haunting us.

  1911   Mon Sep 11 21:02:46 2017 awadeDailyProgressComputersws3: fixing ligo cds tools and moving IP address

For some reason medm and striptool were unable to access channels on ws3.  At the time I built the computer last week I didn't test any of the LIGO tools.  

After a bit of fiddling with the network settings we moved ws3 back from 10.0.1.23 to 10.0.1.33 and we were able to access channels again. It is not clear exactly why this worked.  We should debug it, but we'll leave it for now.

---

Before we found the IP address fix I purged all the ligo cds tools, updated apt-get and installed again. This time around I was able to install the cds-workstation package.

Jamie et al have a standard install with a couple of lines for all the ligo cds tools: https://git.ligo.org/cds-packaging/docs/wikis/home. These were the instructions I followed, last week it was throwing a bunch of errors about not being able to retrieve things.

I activated superuser and purged all the ligo related packages out of the system with

apt-get purge lscsoft-archive-keyring cds-unstable-archive-keyring etc

I then ran 

apt-get update

apt-get -y --force-yes install lscsoft-archive-keyring cds-unstable-archive-keyring

apt-get update

The packages were then re downloaded and up to date.  After that I ran 

apt-get install cds-workstation

which actually worked this time (first). A blue screen popped up asking me about kerbose servers or something. I just left it blank and hit enter, hopefully this is ok.

All good for now although the mystery IP issue is unresolved.

  1910   Mon Sep 11 12:47:51 2017 KiraDailyProgressTempCtrlepics channel calibration

Craig helped me with the epics channel calibration. I made a conversion formula for voltage to Celcius by setting the room temperature to the measured voltage of -8.63V which is what the channel had as its output. I used a linear conversion of T=V*(-34)-273, similar to the one I had for my initial sensor. T is temp in C and V is voltage in V. Since the AD590 outputs a current proportional to the temperature, we can just have a direct relationship between the temperature (in K) and voltage since the resistance in the circuit remains constant, and subtract off 273 to get Celcius. The output of this when applying it to sensor 4 was about 20C, which means this is working properly.

  1909   Mon Sep 11 12:30:19 2017 awadeDailyProgressScheduleTask list Sep 11 2017

Task list for this week:

Copy paste these check/cross marks for completed/dropped items: ___ ✓ ___ /___ ✗ ___

Kevin/Kira:

  • Calibrate epics channels to Celsius (just using math)
  • Create medm screen, db file and implement PID
  • Design a front and rear panel for the 1U box with the Front Panel Express software (use LIGO-D1700425 and LIGO-D1700426 as templates)
  • Look into good resistive sensor designs for the in vacuum shields controls, talk to Aaron, he's also doing something like this. We have PT100 sensors and REF200 chips, but maybe also look at wheatstone bridges and sensors with higher resistivity.  Make liso files and look at making a noise budget

The PID will be very slow to tune, you may want to ssh into the lab and check periodically.  Also, Yinzi wrote an auto tuning script. You might want to look at that and test it on a smaller thermal mass.

CraIG:

  • FSS LISO PLOTS! TODAY + pdf schematics with "stages" labeled
  • component check and transfer functions of powered up FSS box, we want to be switching out caps and resistors by the end of the week
  • debug of the PSL Frequency Reference Card (21.5 MHz RF for mode cleaners) power regulator issues so we can get this packaged up and working. Make post summarizing failiers so we can keep track of what is broken 
  • check RF power of the 21.5 MHz Ref Card and work out if we need to amplify (because its been splittered), if true then we should package card, mini circuits amplifier, splitters etc into contained 1U box with controls in.  The card has phase control and binary switches on board, so you might work out if you need to come up with a Sub D 9 connector scheme for controlling it.
  • (also awade) gut DC out of back of rack and replace with standard LIGO connector scheme, we can do this while moving the rack

awade:

  • gather quotes on thermal epoxies + specs; masterbond, arctic silver, circuitworks, Lakeshore 7031. Veto non-vacuum compatible ones, want to buy this week
  • Clip for thermal sensors also test soldering methods for kapton heaters, see if flux improves contact, if not examine chemical roughing techniques
  • help craig with FSS box probing and modding
  • package up PMC servo cards in 1u boxes and debug the binary engauge issues that aidan was having
  • ✗ work out how to configure XT1111 16 BIO acromag unit to free up other cards currently being used to drive binary channels
  • debug why startAcromag is not launching as a service, environement variable in .conf script or make a bash wrapper
  • ✓ Order 1u box panels for TTFSS channel controls (remember to add a 5 V indicator to the panel)
  • ✓ Order PCBs for Acromag crate BNC breakouts
  • poke fb1 atf frame builder again and see if living
  • Update LP filters on DAC -> laser input from first order to second order

We also have to find out what needs doing for the pipe repair.

 

  1908   Sat Sep 9 23:21:04 2017 awadeNotesVacuumNew shield installation planning

We need to get going on planning for the Au shield switch.

This will involve removing the old shields (with teflon caps) from around the reference cavities and replacing them with the new gold coated shields with Platinum (PT100, 100 Ω @ 25 C) sensors properly affixed, kapton heaters stuck to the inside and shiny (also gold coated) end caps.  We also need to line the inside of the can with reflective aluminium foil to lower the emissivity pointing in towards the cavities. CRaIg and I were also musing on the idea of putting an additional layer of thickish copper foil between vacuum can and aluminum foil to increase transfer around the edges of the tank and lower the differential drifts across otherwise poorly conducting steel.

So the process will involve

  1. (4 days + lead time) Gathering tools and supplies
  2. (2 days) Cleaning and baking the shields and any additional screws and parts to go in vacuum;
  3. (3 days) Gluing and clamping sensors to new shields, crimping them to  26-30 AWG vacuum compatible wire, put some teflon or peak jacked around the exposed parts, putting sensible strain relieve as most of the previous sensors seemed to have failed after pump down;
  4. (2 days) Find a way to solder or crimp contacts of the kapton heaters to 26-30 AWG vacuum compatible wires.  There is more than one kapton heater so we will need to come up with a scheme for stringing them together in a very tight space. Soldering seems bad, but options for crimping are limited. If we can find a better quality solder with no flux in it then maybe that is the way to go; 
  5. (1 day) Venting the tank and temporarily removing the the PLL board, we will need to find a roughing + turbo pump to get back down, something with a pressure gauge so we know what is going on;
  6. (1 day) Removing the stack from the chamber to to the flow bench where shilds will be removed from cavities and new ones put in place
  7. (2 days) Do a thorougher inspection of the state of cavity coatings.  We may need some bright touches and an SLR camera to document. We also want to know why the heaters and sensors failed last time. Documentation;
  8. (2 days) Reinstall cavity shields with wiring ready to attach to feed through wires
  9. (4 days) Reinstall and pump down, followed by realignment

I checked through the lab to get an idea of what we have. We have a full set of pliers, screwdrivers, wrenches etc. all ready and clean to go.  We also have all the gloves masks etc. We do NOT have a crimping tool, I will check with cryo people if they have one, also maybe the 40m. We also don't have high quality solder for the Kapton heater wire attachment.

We have some barrels and pins (pictures attached at bottom) that go into sub d connectors for the feed throughs. We also have one spare in vacuum sub d 9 that could be pre-wired for speeding up things once the tank is open. We should be connecting lengths of wire to the shields once the stack ensemble is half inserted back into the can. We have about 20 barrels and 20 pins as well as some accuglass Female Contacts, Type-T1 that could be used as wire connectors.  We might want to reorder but there are probably enough around campus that we will be ok. We will need to order insulating jackets for the exposed conducting surfaces in tight spaces.  I saw some clearish heat shrinky looking stuff that the MIT people were using for in vacuum squeezer, that might be what we need.

We need to clear some space on the flow bench to work.  There is some stuff left over from one of the SURFs (Adele) doing some first contact and attempted optical contacting with silicon.  I have move this to above the bench.  Someone from cryo will need to come and collect this. We also  need to find a clean space to move the PLL raised optical breadboard.  This would probably be the south side of the optical table.  We should move the population of mounted optics to elsewhere on the table to give us space to work.

We need to have a neat solution for strain relieve of sensor wires. These have historically broken a LOT. Maneuvering the full stack ensemble into the tank is heavy (>9 kg?) and awkward and so we need to make sure the wires are not easily bent causing strain related failure later. Kapton tape or some kind of clippy things onto the shields? 

Buy list:

  • 26-30 AWG wire good for vacuum (we have none)
  • insulating jackets (Teflon), to prevent shorts in vacuum
  • Any copper gadgets we don't have two sets of
  • Thermally conductive epoxy (masterbond $$$ maybe)
  • Fitting for temp sensor clip
  • Any remaining Kapton heaters (check if Aidan has them)

 

Things we need to find out:

  • Full list of all the screws needed to fix the shields in place (so we know we have them in handy)
  • A good source of vacuum compatible thermally conductive epoxy
  • How to solder to Kapton heaters.  All our attempts so far have been mediocre.

Other thoughts:

  • Kevin and Kira should think about circuitry that can potentially sense failure of load and shut down. Could be something as simple as a current limit on supply or fancy like sensing voltage drop and having a comparator to input and shut down if there is a mismatch. We just don't want shorts in vacuum doing crazy things. The new beefier drivers can potentially source a lot of current and we need a way to crimp this.
  • Are 100 Ω @ 25 C platinum RTDs the correct choice? 1000Ω is also an option and there are also 10 kΩ thermistors. We need some liso models and back of the envelope calculations to work out pros and cons.
Attachment 1: 2017-09-09_22.15.05.jpg
2017-09-09_22.15.05.jpg
  1907   Sat Sep 9 18:20:38 2017 awadeMiscDrawingsFour channel BNC breakout for Acromag front panel and other general use

The BNC keyed holes punched in the front of the Acromag crate (LIGO-D1600135) are all 0.5".  This means that none of the standard insulated panel BNC feed through fit (the in-line types are all 9.7 mm), I seem to only be able to find the 0.5" in the PCB mounted right angle BNC receptacles. Right now all that is holding the current BNCs in from rotating are lock washers and almost INHUMAN TORQUE FORCES.

Johannes had a 4-channel BNC to Sub-D 9 that he had procured from Downs (Old DCC D090415).

However, this part is now obsoleted and they have run out.  I made a quick board layout in Eagle (attached below with all of the Gerbers files).  I added male and female sub d receptacles and included an optional screw terminal breakout.  We often need quick break outs for multiple BNCs and end up making dangly octopus creations.  We might as well have a bunch of properly made breakouts.  

If there are no objections I will order a small batch some time next week.

 

Attachment 3: BNC_Front_Pannel_Connectors.zip
  1906   Fri Sep 8 23:54:18 2017 awadeDailyProgressFSSFront and rear panels for FSS computer controls

I've made up some panels for a new 1U chassis to house the acromag controls of the two TTFSS boxes.  It makes sense to mount them in a separate 1U chassis. The D25 connectors into the FSS interface boxes have enough binary engage and analog channels to take up all the inputs and outputs of an XT1221 and an XT1541 card. The whole experiment needs to be taken down while someone modifies the main crate, this way we modularize it a bit.

This will neatly package all the computer controls together with the two rack interface boxes and remove some of the clutter from the front panel.  The package will take standard 24 V plug, along with a panel mounted Ethernet and a pair of  Sub D 25s. I've also included some standard 9.7 mm D holes (NOT THE 0.5", PCB STYLE) for general purpose slow monitor channels for the autolocker. These are optionally on the back or front.  

The panels are the only part we need. Everything else is in stock.

---

Aidan had a good way of mounting the Acromags in the standard 1U boxes.  He put a DIN rail vertically, bolted into the sides. From there we can just manually wire everything up.  

We will also need a 5 V source to excite the binary channels. It doesn't need to be clean, its driving a binary comparator.  An LM7805 would maybe work off the 24 V line. There is a 24 mA of current which means 123 mW of power dissipation.  These TSR-1 DC/DC converters look cool, but not sure I want to introduce something with a switching frequency of 500 kHz anywhere near our electronics. 

Attachment 1: D1700425-v1_TTFSS_2ChannelController_rearpanel.pdf
D1700425-v1_TTFSS_2ChannelController_rearpanel.pdf
Attachment 2: D1700425-v1_TTFSS_2ChannelController_frontpanel.pdf
D1700425-v1_TTFSS_2ChannelController_frontpanel.pdf
Attachment 3: TTFSS_digitalcontrols1ubox.zip
Attachment 4: 2017-09-08_23.32.36.jpg
2017-09-08_23.32.36.jpg
Attachment 5: 2017-09-08_23.32.32.jpg
2017-09-08_23.32.32.jpg
  1905   Fri Sep 8 20:51:18 2017 awadeNotesFSSMathematica model of TTFSS

This is the mathematica notebook model of the generation 4 TTFSS boxes: LIGO-T1700378

Much  of it is the same as our boxes in the PSL lab. Might have a few useful things in it for double checking our liso models. We probably don't want to use mathematica.

  1904   Fri Sep 8 17:48:10 2017 KiraDailyProgressTempCtrlHeater Circuit noise

Kevin and I took measurements of the heater circuit noise using a spectrum analyzer. The heater was attached to it by both ends using BNC cables clipped to the ends of the heater. We used 600mV for the DAC voltage and +24V/-24V for the input. The temperature of the metal block changed from 34.1C to 34.7C as we took the measurement, which took about 13 minutes. We took an RMS average of 25 measurements in total to get the spectrum, shown in the first attachment. The setup is shown in the second attachment.

We first took a range of 0-200Hz for our measurement, but it was not accurate enough to see the dependence of the ASD and the frequency as the lower frequencies didn't have enough data points to accurately plot it. We then took 0-50Hz and got the result shown.

We also mounted the heater circuit box to the rack.

Attachment 1: spectrum.pdf
spectrum.pdf
Attachment 2: IMG_20170908_172648.jpg
IMG_20170908_172648.jpg
  1903   Fri Sep 8 03:29:00 2017 KevinDailyProgressTempCtrlHeater Circuit

[Kira, Kevin]

We built and tested the heater circuit described in 40m:13272 in a rack mount box for the PSL lab. It seems to be working well and we will take a noise spectrum tomorrow.

The final version of the circuit as built is shown in the first attachment; the finished box is shown in the subsequent attachments. The resistor and capacitor added on the input from the DAC forms a 0.1 Hz low-pass filter. We also added +/-15V regulators to power the op-amp and LEDs to indicate when the board has power. The DAC input is from a D9 connector: pin 9 is the signal and pin 4 is ground. The output to the heater is with a LEMO connector. The board is powered with +/-24V with the connectors as described in D1002209. (The board is currently using the conventions for 18V, but Koji just gave me the 24V connectors so we can change them tomorrow.)

To test the circuit we wrapped a heater around an aluminum block attachment and then wrapped that in many layers of insulation as is shown in the last attachment. With 800 mV DAC voltage, the temperature rose from 27.2C to 31C in 10 minutes; after 45min it rose to 34.8C. The MOSFET did not get warm during this period.

Attachment 1: HeaterCircuit.pdf
HeaterCircuit.pdf
Attachment 2: Top.jpg
Top.jpg
Attachment 3: Front.jpg
Front.jpg
Attachment 4: Back.jpg
Back.jpg
Attachment 5: TestSetup.jpg
TestSetup.jpg
  1902   Fri Sep 8 00:32:20 2017 awadeSummaryFSSSchematic block diagram FSS loops

I've put together a summary block diagram of the FSS boxes (based on the schematics of our version). This summarizes all the stages of filter and amplification as they were in the original design.  There have been modifications since then which we are working to document.  Craig and I will look at the boards again tomorrow and stick a probe in to measure at various points to confirm.  Craig and I have also been looking at LISO files (and porting this to a python wrapper) and he has also almost got a full set of plotted liso TF for each board and each stage on each board: this will help us breakdown what is going on.  He will post soon.

We also need to follow through with improving the cross over characteristics of the loops. It looks like we should reexamine the choice of components for the boost that was installed (by Frank et. al) at U7 on the PZT path. Its not clear to me why they chose that op amp to apply boost, given that it is already handling a notch there. I guess its fine where it is, but the values should be looked at. The values of resistors and caps in the boost are also not the same between north and south path.  Maybe we could also look at lowering the second stage low pass (U9) in that path from 34 kHz down to maybe 15-18 kHz.   Evans, in his squeezer FSS modification, added a mini-boost to U8, which seems like a good place to do it: unless there is something like saturation and railing in the later stages of amplification there. I think they had their main boost on the RF board, which is a different make to ours; we have just one summing op amp in that path.

Then, in the EOM path we can increase the AC coupling (twice) by lowering C23 and C24 while raising the first stage pole up to a much higher frequency by lowering R19. Evans (post) did this by lowering R19  (also lowers gain), not sure why can't lower c15 but its already at 3.3 nF.

Another thing I don't understand is why the notch is so high in the PZT path. I would have thoughts the resonances and peaks in the laser PZT response would be much lower, on the order 10s of kHz.

Attachment 1: CTN_FSS_south_blockdiagram.pdf
CTN_FSS_south_blockdiagram.pdf
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