The board design is finished and all the files have been uploaded on dcc (LIGO-D1800214-v1). PCB Layout, circuit schematic, Gerber files, LISO analysis, front panel and full BOM are attached. There are two copies of ISS circuits on the single board and they will be mounted on rack with a 2U front panel.

Notes:
1) The Noise performance analysis is present in the LISO_and_LTSpice_Files folder.
2) The present values in stage 4 of the circuit has cavity pole neutralization for a pole frequency of ~40kHz. To make this different, change the capacitor C22 and C53 accordingly.
3) The resistors R9 and R14 in Stage 0 can be populated to give an overall gain to the circuit.