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Entry  Mon Jan 15 14:43:53 2018, awade, DailyProgress, FSS, Added cap to FSS acromag binary channel 5V supply 2018-01-14_20.24.02.jpg
    Reply  Wed Jan 24 18:29:13 2018, awade, DailyProgress, FSS, Fixing the Acromag latching issues and adding resistors to match the logic levels to FSS and PMC interface boards. Acromag-to-pullup-logic_options.pdf
       Reply  Thu Jan 25 15:34:29 2018, awade, DailyProgress, FSS, Testing and installing PMC electronics mk1 D980352-A.pdfD980352-D.pdfD980352-A_AWade20180128Mods.pdf
Message ID: 2049     Entry time: Mon Jan 15 14:43:53 2018     Reply to this: 2058
Author: awade 
Type: DailyProgress 
Category: FSS 
Subject: Added cap to FSS acromag binary channel 5V supply 

Edit Thu Apr 12 22:09:21 2018 (awade): WRONG, THE ISSSUE IS THAT ACROMAG NEED MIN 6V TO OPERATE BINARY INPUTS

When Craig restarted the acromag IOC yesterday the North path FSS loop engage binary channel went into a permanent latch off mode.  This is a recurring problem that can be fixed by plugging the 5 V power in line to the acromag binary channels in with the FSS control boxes unplugged. Sometimes you need to plug and unplug a few times.  

It could be an issue with the way we have used 820 Ω resistors to bring the pull up 10 kΩ down to 758 Ω. It probably should be buffered somehow.  For now its good enough to get it working, once it's powered up its fine.

As an intermediate fix I soldered a 1000 µF electrolitic cap in line with the 5V supply to give it juice when first powered up.  This seems to make the latching go away most of the time (90%) when first powering up the units. So... slight improment.

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