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Entry  Fri Sep 8 00:32:20 2017, awade, Summary, FSS, Schematic block diagram FSS loops CTN_FSS_south_blockdiagram.pdf
    Reply  Thu Sep 14 21:54:26 2017, awade, Summary, FSS, FSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105 
       Reply  Mon Sep 18 00:46:08 2017, rana, Summary, FSS, FSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105 
          Reply  Mon Sep 18 13:34:13 2017, awade, Summary, FSS, FSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105 
             Reply  Tue Oct 10 00:49:34 2017, awade, Craig, Summary, FSS, Replacing U3 on north path (2010:005) FSS servo board. 20171009_220549_Ser6_ComPathTP1toTP5_09-10-2017_175407.pdffmoenfipkniealnd.png20171009_DebuggingNorthPathServoBoard.tar.gz
    Reply  Mon Oct 2 12:30:15 2017, rana, Summary, FSS, LISO & mfil 
       Reply  Wed Oct 18 11:19:15 2017, awade, Summary, FSS, Comparing south TF to LISO model TTFSS_schematics_awades_hand_notes.pdf001.pdf20171017_South_FSSTFs.tar.gz
          Reply  Wed Oct 18 15:42:59 2017, awade, Summary, FSS, Comparing south TF to LISO model 
             Reply  Mon Oct 23 15:05:44 2017, awade, Summary, FSS, Comparing south TF to LISO model Ser7_South_MainBoard_compiledTF.pdfSer5_North_MainBoard_compiledTF.pdf2017-10-20_18.04.18.jpg
                Reply  Wed Oct 25 23:15:51 2017, awade, Craig, Summary, FSS, Comparing south and north TF to LISO model South_MainBoard_EXC-30dBm_compiledTF.pdfNorth_MainBoard_EXC-30dBm_compiledTF.pdfFSS_all.tar.gz
Message ID: 1918     Entry time: Thu Sep 14 21:54:26 2017     In reply to: 1902     Reply to this: 1925
Author: awade 
Type: Summary 
Category: FSS 
Subject: FSS modifications: series resistance (R1 and R2) to monitor points on servo board D040105 

Edit (awade, Mon Sep 18 13:39:59 2017): These are modifications to the North path field box

Craig has been working on active probing the FSS boxes to work out what is going on there.  He came up against some unexplainably low gains and stuff that didn't quite match up with what we should expect when measuring transfer functions between TEST2 EXC (the common path excitation point) and TP5 and later test points in the box.  

A while ago I had found that measuring and tuning out1/out2 OLG with the Agilent plugged in would get to a stable loop, but as soon as I unplugged the Agilent it would be unstable.  I assumed that the monitor points needed to be 50 Ω loaded when not being measured: which is what I did as a default.  

The open loop gain from common EXC to TP5 on the servo board was -3.15 dB.  With common OUT1 terminated with 50 Ω this TP5 dropped to -17.8 dB or with OUT2 it dropped to -25.75 dB. Bad. This was a clue that maybe the series resistance to the monitor outputs was selected too low.

Now looking at the changes that Frank made to the schematic (PSL:893), he had changed the series resistors R1 and R2 from 453 Ω to 50 Ω saying that the monitors were limited by thermal noise.  I don't know if I believe that. We should have plenty signal to noise. Also, with 50 Ω to monitors a 50 Ω load of the network analyzer will have 100 Ω to ground. I have a feeling that this is causing the op amp to be over drawn in current. The AD829 datasheet says max current 32 mA.  I don't know if the servo signal at the point gets to 3.2 V offset but it might. It seems like it would be better to have higher load impedance to avoid overdrawing current out of the op amp output. 

I switched the R1 and R2 50 Ω (on D040105-C) out for something higher again, this time 470 Ω.  I could only find 470 Ω in the EE workshop (which is close enough to the design value of 453 Ω).

Now plugging 50 Ω loads into the OUT1 and OUT1 common monitor points lowers the common path OLG by 7.8 dB and 10.8 dB respectively.  This still seems like a big change to me but I'm not sure if I should increase series resistance any higher.

Let me know if this is dumb and I'll change it back.

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