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Sun Sep 4 18:43:55 2016, awade, DailyProgress, DAQ, Setting up PID slow controls for FSS, issues with fb2 on restart
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Mon Sep 5 18:37:16 2016, awade, DailyProgress, DAQ, Setting up PID slow controls for FSS, issues with fb2 on restart
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Wed Sep 7 13:03:56 2016, awade, DailyProgress, DAQ, Setting up PID slow controls for FSS (South path)   
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Fri Sep 23 17:21:02 2016, awade, DailyProgress, DAQ, Setting up PID slow controls for FSS
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Mon Oct 3 18:10:26 2016, rana, DailyProgress, TempCtrl, Setting up PID slow controls for FSS
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Tue Oct 4 11:08:27 2016, awade, DailyProgress, TempCtrl, Setting up PID slow controls for FSS
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Message ID: 1731
Entry time: Mon Oct 3 18:10:26 2016
In reply to: 1722
Reply to this: 1733
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Author: |
rana |
Type: |
DailyProgress |
Category: |
TempCtrl |
Subject: |
Setting up PID slow controls for FSS |
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Depends on the series resistance of the slow input. Maybe that's in the manual? The response of the SLOW input can be measured by driving this input and looking at the FAST voltage while the cavity is locked. Its roughly 1 GHz/V for the SLOW input and 5 MHz/V for the FAST, so the SLOW should only be driven by a ~1 mV signal. There is a thermal constant which makes the FAST/SLOW crossover stable, but you should put in a low pass filter with ~2 poles below 10 Hz to remove the high frequency junk getting in there.
Quote: |
This should be fine I guess for cutting out ripple voltage. Am I missing something or do we want a more typical LP filter like an RC circuit to operate with a (say) 10 Hz cut off. I'm not sure of the design motivations.
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