Started annealing run Annealing run (489-490) on 3" wafers - Crime 01/18/2017 https://dcc.ligo.org/T1700027 using new hardware

Annealing run (449-453) on 3" wafers - Crime 11/01/2016 https://dcc.ligo.org/T1600507

Annealing run (454-459) on 3" wafers - Crime 11/02/2016 https://dcc.ligo.org/LIGO-T1600510

Annealing run (460-465) on 3" wafers - Crime 11/04/2016 https://dcc.ligo.org/T1600513-x0

Annealing run (466-471) on 3" wafers - Crime 11/10/2016

https://dcc.ligo.org/LIGO-T1600524

Annealing run (472-477) on 3" wafers - Crime 11/11/2016 https://dcc.ligo.org/T1600527

Started annealing of S1600577 S1600580 S1600582 S1600585 at 5pm

ramp up to 600C at 100C/h

hold at 600C for 10 h

ramp down at 100C/h

Started annealing of S1600579 S1600581 S1600583 S1600586 at 5:00pm

• ramp up to 300 C at 100 C/hour
• hold at 300 C for 5 hours
• ramp down at 100 C/hour

Started annealing of S1600579 S1600581 S1600583 S1600586 at 5:00pm

• ramp up to 400 C at 100 C/hour
• hold at 400 C for 5 hours
• ramp down at 100 C/hour

At 11:35am, started annealing of ten fused silica wafers (50.8mm / 0.1 mm) [S1800611 S1800612 S1800613 S1800614 S1800615 S1800616 S1800617 S1800618 S1800619 S1800620]

• ramp up to 900 C at 100 C/h
• hold for 9 h
• ramp down at 100 C/h

Started annealing of S1600579 S1600581 S1600583 S1600586 at 3:25pm

• ramp up to 500 C at 100 C/hour
• hold at 500 C for 10 hours
• ramp down at 100 C/hour

Samples S1600519 S1600522 S1600565 S1600566 S1600567 S1600568 S1600569

• ramp up to 500C at 100C/h
• hold at 500C for 10h
• ramp down at 100C/h

Started annealing of S1600579 S1600581 S1600583 S1600586 at 7:00pm 03/30

• ramp up to 600 C at 100 C/hour
• hold at 600 C for 10 hours
• ramp down at 100 C/hour

Started annealing of blank disks: S1600541 S1600542 S1600545 S1600546 S1600551 S1600552 S1600554 S1600555

900C for 9 hours, starting at 10:30am

Annealing of 8 fused silica substrates (50mm/0.5mm) started at 3:30pm, January 25th 2018. Standard program: 9 hours ramp up to 900 C, 9 hours hold, 9 hours ramp down

Annealing run (447-448) on 3" wafers - Crime 10/27/2016 https://dcc.ligo.org/T1600485-v1

Here's a ongoing summary of the substrate aging tests.

S1600619

Mark Optics with polished edges and CO2 polished, stored in the CR0 vacuum chamber.

S1600623

Mark Optics with polished edges, stored in standard wafer container in the dessicator cabinet

S1600624

Mark Optics with polished edges, stored in standard wafer container in vacuum sealed envelope with dessicant

S1600620

Mark Optics with polished edges and CO2 polished, stored in standard wafer container in the dessicator cabinet

S1600621

Mark Optics with polished edges, stored in standard wafer container in vacuum sealed envelope with dessicant

I added to the model CR0 an additional bias path for the ESD driver:

Some funny RGC idiosyncrasy: if you have a filter bank named "SUM", you can't add a summation block: if you do you get a name conflict at compilation time. That's why I used a matrix

Updated the MEDM screen accordingly

A quick test shows that working with a bias does not improve the ability to excite the modes. The DAC saturates at +-32k, which corresponds to +-10V out of the ADC, matched to the input range of the HV amplifier. The largest excitation of high frequency modes is obtained by using white noise, no bias, and maximum amplitude.

2017-06-29

• I created a much more accurate model of the current ESD setup from the technical drawings. My resulting ESD has dimensions of 21.3x24.3x.1mm with 1 mm spacings and 17.5 mm long electrode arms. The sample has a diameter of 75 mm and thickness of 1mm, the ESD is 1mm below the sample in the current model. I still have to compare the technical drawings to confirm that is the actual distance in the current lab setup.
• I was able to calculate the force profile on the disk from the ESD. COMSOL struggled to resolve the data with a small mesh size over the whole domain, so I created a region of extremely fine mesh around the ESD and the disk and then made the rest of the mesh size normal sized. Over the domain near the ESD my mesh size ranges from 2.5*10^-3 to .25 mm and over the rest of the domain it's automatically setup at the normal size.
• The force on a single dipole is given as , since fused silica is isotropic it's polarization is proportional to E so . The electric suscepitibility of fused silica is 1.09, I plotted the profile of the force perpendicular to the plane of the disk and exported data files of the full vector quantity of the force for use with Matlab.

Installed the ADC and DAC boards into a proper box. Also, swapped the temporary DAC board (with cale hack) with the final one. Schematics and PCB are in the DCC: D1600196 and D1600301

The box is sitting on top of the cymac computer, on the back, since I don't have any long cable to connect the ADC. 

Last night measurements didn't work well: even without exciting the modes, the ADC was saturating because of the low frequency signal, particularly a 58 Hz peak:

When the modes were rang up, thing got clearly even worse:

Modification of whitening filter

So I modified the whitening filter, changing C6 from 2.2u to 220nF. The old and new whitening filters are shown below. We have the same amount of whitening at high frequency, but less amplification of the junk at ~50-100 Hz

With this modification, there's no more saturation, even when the modes are excited.

This afternoon I completed the assembly of the electronics boards to interface the ADC and DAC. The ADC is interfaced with a new custom board, which accepts up to eight QPD inputs, the syncronization signal, and it's connected to the ADC:

For the DAC I used one spare board from the Crackle experiment. However, that board had a wrong pinout for the DAC side connector, so I had to implemented again the same hack I did for the crackling noise experiment. 

All boards are connected to the ADC and DACs, and to the syncronization signal generated with a SR DS345. No boxes for the moment being, I'll figure out a better organization of the boards in the future if needed. I still haven't tested if the real time system is able to communicate properly with the new interfaces.

Here are some screenshots of the disk assembly and a look at how four of them will sit into the vacuum chamber. The Solidworks models are available here: D1600197

• Installed in the test chamber CR0
• Excitations:
  • Quiet time before excitation: 1196822477
    Excitation broadband: 1196822509
    Quiet time after excitation: 1196822532
  • Quiet time before excitation: 1196826162
    Excitation broadband: 1196826194
    Quiet time after excitation: 1196826216
  • Quiet time before excitation: 1196829846
    Excitation broadband: 1196829879
    Quiet time after excitation: 1196829901
  • Quiet time before excitation: 1196833531
    Excitation broadband: 1196833563
    Quiet time after excitation: 1196833585
  • Quiet time before excitation: 1196837215
    Excitation broadband: 1196837248
    Quiet time after excitation: 1196837270
  • Quiet time before excitation: 1196840900
    Excitation broadband: 1196840933
    Quiet time after excitation: 1196840955
  • Quiet time before excitation: 1196844585
    Excitation broadband: 1196844617
    Quiet time after excitation: 1196844639
  • Quiet time before excitation: 1196848269
    Excitation broadband: 1196848301
    Quiet time after excitation: 1196848323
     

The 12 following substrates have been measured and are ready for the first coating experiment in Montreal:

In normal conditions the RMS of the QPD signals is dominated by the 58 Hz line generated by the roughing pump. Also, when the modes are excited, they exhibit large sidebands at +- 58 Hz that are an annoyance for the analysis.

I improved a bit the level of the 58 Hz in the QPD signals by putting the roughing pump on top of a "Very Useful Box":

Despite the fact that this advanced vibration isolation is already a little bit effective, it might be good to try to build some better suspension and maybe add an acoustic isolation around the pump.

2018-03-29

• 9:15am in chamber
  • S1800615 in CR1
  • S1800616 in CR2
  • S1800617 in CR3
  • S1800618 in CR4
• 9:17am roughing pump on
• 9:25am all pumps fo chamber 0 off, clean air filters off
• 9:25am turbo pump on

2018-03-28

• 3:45pm in chamber
  • S1800611 in CR1
  • S1800612 in CR2
  • S1800613 in CR3
  • S1800614 in CR4
• 3:47pm roughing pump on
• 3:55pm all pumps fo chamber 0 off, clean air filters off
• 4:00pm turbo pump on

2018-04-13

• 10:37am in chamber
  • S1600620 in CR1
  • S1600621 in CR2
  • S1600623 in CR3
  • S1600624 in CR4
• 10:41am roughing pump on
• 10:50am turbo pump on

2019-04-01

• 7:50am in chamber
  • S1600546 in CR1
  • S1600551 in CR2
  • S1600552 in CR3
  • S1600554 in CR4
• 7:55am roughing pump on
• 8:05am turbo pump on