40m QIL Cryo_Lab CTN SUS_Lab CAML OMC_Lab CRIME_Lab FEA ENG_Labs OptContFac Mariner WBEEShop
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ID Date Author Typeup Category Subject
  17583   Thu May 4 17:14:15 2023 PacoSummaryLSCPRMI (MICH and PRCL) calibrated displacement and BS angle to MICH couplings

[Mayank, Paco]

We calibrated PRCL displacement using MICH and estimated (?) BS angle to MICH couplings

Expt 1 - calibration of displacements for PRMI

We injected calibration lines at four different frequencies (211.11, 313.13, 575.17 and 1418.93) into (ITMY) under PRMI configuration and recorded the calibrated MICH displacement (C1:CAL-MICH_W_OUT) and uncalibrated PRCL displacement (C1:CAL-PRCL_W_OUT). The exctation amplitudes were (100,150,250 and 1000 cts) respectively.

The ratio of intensities of calibration lines peak in the two configurations are used to caliberate the PRCL displacement (C1:CAL-PRCL_W_OUT). Basically, if MICH = Lx - Ly and PRCL = Lp + 0.5(Lx + Ly), then PRCL displacement from Ly is half of MICH displacement.

The estimated optical gain (C_INV) was 6.41e-11 cts/m, which we added into FM3 of PRCL calibration filter bank. Attachment #1 shows the calibrated displacement spectra.

Expt 2 - angle to length couplings

After calibrating PRCL displacement, we tried to estimate the angle to length coupling from BS PIT/YAW to MICH under the PRMI configuartion. We started by injecting a broadband guassian noise (3000 cts amplitude in the 7-17 Hz band for PIT, and 17-27 Hz band for YAW) through an 8th order Cheby II filter with 80 dB attn to shape the noise before injecting into BS ASCPIT/ASCYAW.

We then looked at the increased displacement noise in the calibrated MICH and PRCL displacements. Assuming a naive 1 urad/count / f^2 of BS angular actuation strengths in both PIT/YAW, we estimate the couplings to be:

  • BS PIT to MICH = 0.12 nm / urad @ 13 Hz
  • BS YAW to MICH = 0.19 nm / urad @ 22 Hz
    • BS PIT to PRCL = 0.38 nm / urad @ 13 Hz
  • BS YAW to PRCL = 0.08 nm / urad @ 22 Hz

Seems a bit too large... blush bogus? Attachment #2 summarizes these measurements.

  17592   Mon May 15 18:34:05 2023 PacoSummaryLSCLocked PRMI in carrier and LO phase with BH44 and achieved handoff to BHDC_DIFF

[Yuta, Paco]

We locked PRMI-BHD (LO phase was controlled using BH44_Q) cool


Today we worked with PRMI carrier locked using AS55_Q and REFL11_I (to control MICH and PRCL respectively).

PRCL and MICH displacement calibration

We calibrated the PRCL and MICH displacements. This time we injected lines on (ITMX - ITMY) for MICH and PRM for PRCL. The optical gains were found to be

  • (ITMX - ITMY) to AS55_Q = 2.04e10 counts / m
  • PRM to REFL11_I = 1.66e12 counts / m

We added these into the C1:CAL_MICH_CINV and C1:CAL_PRCL_CINV filters on the calibration model.

PRMI-BHD handoff

After the lock was established and the alignment refined, we tried locking the homodyne phase angle using BH55_Q. We could not close the LO_PHASE loop with this sensor, so we resorted to using the BH44_Q. To do this we actually changed a few things:

  1. The BH44 whitening filter gain was lowered from +39 dB to +21 dB.
  2. Rotated the ND filter wheel to avoid saturation on the BH44 RFPD from 0.5 to 1.0. This corresponds to a change of ~33% in the incident BH44 light.

While we managed to lock BH44 by actuating on LO1, the lock was not very robust (typical lock acquistion using FM5 and FM8)... so we switched to actuating on AS4 which made the LO PHASE loop slightly more robust.

In preparation for handoff, we turned on a line at 211.11 Hz (MICH osc) and demodulated the BHDC_DIFF to estimate the sensing matrix element.

  • BHDC_DIFF to AS55_Q ~ 25

After using this number to rescale the MICH_B error point, we handed off from MICH_A (under AS55_Q control) to BHDC_DIFF. Our lock stretch covered the following gpstimes:

  • PRMI-BHD lock = 1368235235 to 1368235264

During the lock stretch above, we managed to take some noise spectra for the calibrated MICH and PRCL displacements. Attachment #1 shows the comparison between PRMI and PRMI-BHD configurations.


Discussion cool

  • Looking closely into Attachment #1 you'll find a *BH44_Q trace in green. This trace represents the uncalibrated LO phase error point. We measured the UGF to be < 20 Hz (C1:HPC-LO_PHASE_GAIN=1.2), so above 20 Hz, this trace is shown just as a guide for the noise shape. It would seem that the MICH displacement in PRMI-BHD readout is getting its shape from this noise and therefore might be limited by it.

Next steps

  • Calibrate LO phase at BH44 and see if it scales as predicted by our calculations.
  • Optimize BH44 control; why can't we lock this phase for longer?
  • Noise budget.
  17599   Wed May 24 11:50:34 2023 JCSummarySEISTACIS

[Mayank, JC]

STACIS Vibration Cancellation Isolators contain a PCB board called the Compensator board. These are boards that "allow you to control the feedback to the PZT stacks." The board is essentially held up by the 2 rear plugs and 3 screws on the front rim (Highlighted in Yellow). You don't need to disassemble the entire islotar to remove this, you just need to loosen the tension screws and pull out softly. Attachment #4 shows the seat made for the board to be placed, highlighted in Green. When placing the board back into its original position make sure in slips into this slit nicely. The extender/compensator board is part of the STACIS Isolator and each Isolator should have this. Each board seems to haver it's own serial # but not an actual part #. On this board, the S/N is 033509.

  17602   Thu May 25 13:38:28 2023 advaitSummaryPEMExisting temperature control hardware

Over the past few days I have been trying to understand the existing sensor and heater related hardware by manual inspection and combing elogs. From what I understand, I believe a lot of the hardware was built from scratch by Kira in 2017-18. She put in place the insulation, built the sensor and heater circuits and installed and interfaced everything with EPICS. This let her successfully do step response tests and also execute PID control of the temperature of the can. As suggested by Paco, I am trying to summarise my findings in this elog. This is the block diagram of the overall system.

In the lab I was able to locate two identical temperature sensor boards, one for monitoring ambient temps and another for the can temp, which has a sensor attached to the inner seismometer can. Attachment 1 shows the actual board.

The schematic for the temperature sensor can be found here. It was later clarified that she is using AD590 and not the AD592. I tested the ambient sensor board by hooking it up to an oscilloscope and heating the sensor up. It seems to work like she described, and the output voltage goes down with heat. I will later figure out interfacing it with an ADC and calibrating it if I cannot find Kira's old work related to this. The setup there also has +/-15V Sorensen's for power (I probed these and they work), a BNC for temp readout and a bunch of other wiring for the heater. This wiring comes from the nearby rack which should have the heater circuit, but I haven't yet been able to locate it because there is too much stuff.

Coming to the heater circuit - I found the schematic for it here. I am still unsure about what the power range it can operate over, but this plot seems to imply it saturates at around 55W. This circuit underwent many different iterations so I am unsure what load resistance was actually used finally and it is not clear from the elogs. It might be a pair of heaters combined in series or parallel. Additionally, this elog by Shruti from June 2018 implies that the original circuit that Kira made ended up breaking at several different points. She said there were attempts to fix it, but I cannot find any updates after that and I think her SURF ended. I don't know the current status of the heater circuit. I am not sure where it is stored.

I was hoping to utilise the old EPICS channels set up by Kira for heater control as well as sensor readout to verify if everything was still functional and initially just read out the temperature of the can and find out how much it fluctuates. I planned to later also try to replicate the PID results. But Paco explained how the Acromag system worked and told me that utilising the old channels will not be possible right now, as all the channels have been used up for more critical tasks and none of the old interfaces that Kira had set up can be used now, even if the hardware was fine. 

Also, the can temperature sensor board has a wobbly solder joint at one of the power connectors, and we cannot move it to the lab because the sensor is anchored to the inner can. There is no power indicator LED to signal if the connection is secure so its kind of unusable right now. Paco and JC told me that soldering near the X end is not possible because the fumes would harm the optics. We will look for solutions to this. One option would be to make an entirely new board and keep a mechanical connector for the sensor. 

  17604   Fri May 26 11:16:46 2023 AnchalSummaryPEMTemperature sensing circuit with AD590

I wanted to mention here that I have a printed circuit board design (LIGO-D1800304) for using AD590 as temperature sensors. I believe printed boards and all required components are stored on the wire shelf in the WB EE shop on a box labeled with this DCC number. This circuit is also meant to be read by Acromag, maybe it can come of some use to you. You can check out the use in CTN lab in WB near the south-east end of the table.

 

  17625   Wed Jun 7 17:05:36 2023 yutaSummaryLSCRF FPMI recovered after c1sus DAC card replacement

[Paco, Yuta]

RF FPMI is recovered after c1sus DAC-0 card replacement

Summary:
 - We wanted to check if FPMI locks after DAC-0 card relacement (40m/17620).
 - 60 Hz noise similar to what we saw in February prevented us from locking FPMI stably, but fixed it by turning off FM9 of coil output filters in MC1 and MC3 (40m/17462).
 - There are slight changes in locking gains, but it now locks reliably.

FPMI locking:
 - MICH: 1 for REFL55_Q, MICH_GAIN=18 (used to be 11) gives UGF of 45 Hz
 - DARM: 1 for AS55_Q, DARM_GAIN=0.044 (used to be 0.04) gives UGF of 134 Hz
 - CARM: 0.567 (used to be 0.496) for REFL55_I, CARM_GAIN=0.011 gives UGF of 224 Hz
 - Attachment #1 shows all the OLTFs.

60 Hz noise:
 - FPMI locking was not stable, and we moved back to YARM locking to see if 60 Hz noise is higher or not.
 - Attachment #2 shows 60 Hz noise measured with MC_F and YARM. The noise was actually similar to what we saw in 40m/17461, so we checked MC1 and MC3 dewhitening
 - FM9 of coil output filters was turned on for some reason (probably because of burts we were doing when fixing c1sus). MC1 and MC3 FM9 ELP28 filters should be off.
 - This made FPMI locking stable and 60 Hz noise lower by more than an order of magnitude (Attachment #3).

  17645   Wed Jun 21 21:01:59 2023 KojiSummaryDAQNODUS: rsyncd daemon / service set up

Followed the instruction on this elog to restart the rsync server daemon

controls@nodus|etc> sudo systemctl start rsyncd.service
controls@nodus|etc> sudo systemctl enable rsyncd.service
controls@nodus|etc> sudo systemctl status rsyncd.service
● rsyncd.service - fast remote file copy program daemon
   Loaded: loaded (/usr/lib/systemd/system/rsyncd.service; enabled; vendor preset: disabled)
   Active: active (running) since Wed 2023-06-21 21:00:44 PDT; 13s ago
 Main PID: 13146 (rsync)
   CGroup: /system.slice/rsyncd.service
           └─13146 /usr/bin/rsync --daemon --no-detach

Jun 21 21:00:44 nodus.martian systemd[1]: Started fast remote file copy program daemon.
Jun 21 21:00:44 nodus.martian systemd[1]: Starting fast remote file copy program dae.....
Hint: Some lines were ellipsized, use -l to show in full.

 

  17650   Thu Jun 22 16:01:54 2023 ranaSummaryDAQNODUS: rsyncd daemon / service set up

if systemctl was handling it, how come it died? Or did someone kill it on purpose? I wish we had a tool like Monit or Nagios running to tell us about these things.

  17660   Tue Jun 27 19:19:17 2023 KojiSummaryGeneral5ft x 12 ft x 2ft optical table removal

[Many]

The large optical table (5ft x 12ft x 2ft, previously called SP table) was moved from the 40m lab. (Attachment 1)
The contractor did a professional job and successfully transported the optical plate to the Synchrotron building without damaging the 40m facility.


JC came early in the morning to work on the final preparations. Some others were on standby at 8 AM. The arrival of the contractor got delayed due to traffic. The actual work began at 10 AM.

(10AM) The contractor first spent ~90min assembling a hoist around the optical table. It was necessary to remove some fluorescent light tubes and their covers because of the height of the hoist. (Attachment 2)

(11:30AM) Once the hoist was assembled, the optical table was tilted vertically using a sling and a chain block. (Attachment 3)

(12AM) The table was placed on dollies narrower than the table width (2ft) and rolled to the south end door. Thanks to our careful preparation, this process was smooth and took only 10 minutes. (Attachment 4)
A compact forklift was used to get over the end door (Attachment 5). Once half of the table was exposed outside, a larger forklift lifted the entire table and swung it out from the lab building (Attachment 6). After it was tipped horizontally, it was laid on a gigantic truck with the same forklift (Attachments 7/8). (1 PM)

The photos and videos are collected in the 40m google photo.

  17664   Thu Jun 29 01:52:26 2023 KojiSummaryGeneralIFO back in operation

[Mayank, Hiroki, Koji]

Once we reached 1~2mtorr, we opened the PSL shutter.

The IMC was immediately locked and aligned with the WFS.

The PRM/SRM looked very much aligned. We could see the MI and two arms fringing.

The two arms were manually aligned and the Y arm was aligned with the ASS.

  17671   Fri Jul 7 17:29:16 2023 yutaSummaryASCIFO alignment is in a strange state

IFO alignment is in a strange state.
BHD is not fringing, and misalignment script is not working properly

IFO alignment status
 - YARM ASS is working
 - XARM ASS is not working (because of ETMX coil driver upgrade)
 - Attached is the current alignment when YARM and XARM are both aligned, AS4 misaligned. Powers at photo diodes are as follows.

>cdsutils avg -s 10 C1:PSL-PMC_PMCTRANSPD C1:IOO-MC_TRANS_SUMFILT_OUT C1:LSC-TRY_OUT_DQ C1:HPC-BHDC_A_OUT C1:HPC-BHDC_B_OUT C1:LSC-TRX_OUT_DQ
C1:PSL-PMC_PMCTRANSPD 0.688543850183487 0.0010497113504850193
C1:IOO-MC_TRANS_SUMFILT_OUT 13378.8802734375 58.42096336275247
C1:LSC-TRY_OUT_DQ 1.0218201756477356 0.006230110889854089
C1:HPC-BHDC_A_OUT 34.033762741088864 0.1877582940472513
C1:HPC-BHDC_B_OUT 33.95858993530273 0.1951729492341625
C1:LSC-TRX_OUT_DQ 0.9446217834949493 0.01777568349190775

 - After this, we usually misalign ETMY, ETMX, ITMY to have LO-ITMX fringe in BHD DCPDs (elog #17277), but it seems like it is hard to see the fringe by aligning AS beam with SR2 and AS4 we usually use.
 - Also, misalign/restore script we use are not working properly. Alignment changes a lot when restored after misalignment.
 - We also found that "gain_offset" of gain(0.48) for ETMY coil outputs was turned offangry This changed the alignment offsets to get the correct alignment. This probably also affected LSC.

Next:
 - Recommission XARM ASS with updated ETMX coil driver
 - Check the "gain_offset" filter for ETMY and update relevant gains
 - Check the misalignment script.
 - Align LO-AS fringe

  17672   Fri Jul 7 20:09:53 2023 KojiSummaryASCIFO alignment is in a strange state

Before any trial at the ETMX suspension, ETMX coil driver "Run" mode (a sort of dewhitened mode) is ON at the coil driver. The "Binary Input" short plugs should be modified to turn them to "Run" mode.

  17673   Fri Jul 7 20:34:43 2023 HirokiSummaryBHDBHD alignment has been restored

[Yuta, Hiroki]

BHD alignment has been restored

We aligned the AS beam (reflection of ITMX) and LO beam and maximized the fringing of the BHD differential signal (Attachment 1).
We used LO1, SR2 and AS4 for the alignment and the result parameters are shown in Attachment 2.
 


Procedure log of BHD alignment

Alignment of LO beam:

  • ETMY, ETMX and ITMY were misalinged during this BHD alignment
  • Misaligned SR2 to have only the LO beam in BHD DCPDs
  • Tuned LO1 so that the LO beam comes to the previous position in the video

Alignment of AS beam:

  • Restored SR2
  • Tuned AS4 so that the AS beam comes to the position of LO beam
  • Repeated the followings for the pitch and the yaw until the fringing was maximized:
    • Misaligned AS beam using SR2
    • Restore the alignment of AS beam using AS4
    • If the fringing gets worse, it means that you moved SR2 in the wrong direction. Move the SR2 in the opposite direction next and repeat the procedures above.
    • If the fringing gets better, it means that you moved SR2 in the correct direction. Continue the procedures above.
  17675   Mon Jul 10 15:22:25 2023 yutaSummaryASCIFO alignment is in a strange state

"gain_offset" for ETMY coil outputs has been turned on

As mentioned in elog #17671, the "gain_offset" of gain(0.48) for ETMY coil outputs had been turned off for some reason.
I have turned on all of the "gain_offset" for ETMY coils and have changed the alignment offsets for ETMY to compensate the effect of "gain_offset": 

P: 2703 -> 5631
Y: -2296 -> -4783

After the operation above, I confirmed that the Y arm is flashing and the OPLEV laser is hitting on the QPD.

  17677   Tue Jul 11 08:00:16 2023 JCSummaryDaily ProgressPreparing a clean room.

[Yuta, Yehonathan, JC]

We have moved a Smaller Table and moving forward with preparing a clean room.

What we did:
  - Moved the 3 ft x 4 ft Optical table which was by the red toolbox next to the 1X2 Power Supply Rack.
  - Moved the Portable HEPA Filter (which was used during the BHD Vent) from ITMX Chamber

Summary:

     · Moved the 3 ft x 4 ft Optical table which was by the red toolbox next to the 1X2 Power Supply Rack.

Yehonathan and I cleared off this table and disconnected any power connections that were running to it. There was a grounding cable that was bolted down to it and safely removed. Next, I used the manual forklift to lift one side of the table while Yehonathan rolled a piano dolley under the table support. Following, we did the similar procedure on the other side of the table and safely sat the table onto piano dolleys. We rolled the table over and placed it into it's new position by the 1X2 Power rack. To take off the piano dolleys, I used the forklift once again. Yehonathan held one side still to prevent the table from rolling away dangerously, and Yuta slid the Piano dolley out from under the table. Next, we lifted the other side and slipped the other dolley out of the table similarly. once the table was sat down, we re-leveled the table.

     ·Moved the Portable HEPA Filter (which was used during the BHD Vent) from ITMX Chamber

I rolled over the the protable HEPA filter from ITMX Chamber. The height of this was too tall to clear the short ceiling by the PSL table. Yuta and I have to lean the HEPA sideways to clear this and we did so smoothly. The HEPA fit perfectly around the optical table. I will wipe down the table contact Maty to see if we have a proper cleaning procedure for this. I would prefer to add more of the plastic drapes to enclose the table, but we can use plastic Mylar sheets in the mean time. 

  17679   Thu Jul 13 06:18:37 2023 HirokiSummaryCalibrationCalibrations of actuators and optical gain

[Yuta, Hiroki]

Calibrations of the actuators have been done

Summary of calibration:

AS55_Q in MICH : 1.16e9 counts/m 
BS        : 26.19e-9 /f^2 m/counts
ITMX    : 5.07e-9 /f^2 m/counts
ITMY    : 4.80e-9 /f^2 m/counts
ETMX  : 10.99e-9 /f^2 m/counts
(matched to ETMY with the gain of "x0.414" put in coil outputs filter bank. Without "x0.414", 26.52e-9 /f^2 m/counts was measured.)
ETMY  : 10.99e-9 /f^2 m/counts
MC2    : -14.27e-9 /f^2 m/counts in arm length
MC2    : 5.10e-9 /f^2 m/counts in IMC length
MC2    : 1.06e+5 /f^2 Hz/counts in IR laser frequuency 


Methods

Calibration of MICH error signal:
To calibrate the MICH error signal (C1:LSC-AS55_Q_ERR), we followed the same free swinging method as elog #17285 and #16929 but used the update code: scripts/CAL/OpticalGain/getOpticalGain.py.
By fitting the X-Y plot of AS55_Q and  ASDC, we obtained 1.16e9 counts/m (Attachement 1).

Actuator calibration of BS, ITMX and ITMY:
We followed the same method as elog #17285 and #16929
We locked the MICH with UGF of ~10 Hz and measured the transfer function from C1:LSC-BS,ITMX,ITMY_EXC to C1:LSC-AS55_Q_ERR above the UGF.
By using the optical gain, measured transfer functions were calibrated to the actuator transfer functions of BS, ITMX and ITMY (Attachment 2).
Fitting code: scripts/CAL/MICH/MICHActuatorCalibration.ipynb

Actuator calibration of ETMX, ETMY and MC2:
We locked the X(Y)ARM with ITMX(Y) and measured the transfer function from C1:LSC-ITMX(Y)_IN2 to C1:LSC-X(Y)ARM_IN1
With this measurement, we can directly obtain the transfer function of (Optical gain)*(Actuator of ITMX(Y)), which is not affected by the 1/(1+OLTF) suppression (We should have done the same method for the calibration of BS, ITMX and ITMY).
Then we changed the actuator to ETM(X) and MC2 and measured the transfer functions from C1:LSC-ETMX(Y),MC2_IN2 to C1:LSC-X(Y)ARM_IN1. respectively (Attachment 3,4).
By fitting the ratios between the measured transfer functions, we obtained the actuator transfer functions of ETMX, ETMY and MC2 (Attachment 5,6,7).
Saved diaggui templates: measurements/LSC/(XARM;YARM)/(XARM;YARM)_(ITMX,ETMX,MC2; ITMY,ETMY,MC2)EXC_Template.xml

Balancing the actuation of ETMX and ETMY:
The obtained actuator transfer function of ETMX(Y) was 26.52e-9(10.99e-9) /f^2 m/counts.
The result for ETMY was consistent with elog #16977 but that for ETMX was ~10 times larger than elog #16977 because of the new ETMX coil driver.
To balance the ETMX and ETMY, we added the gain of “x0.414” to the coil output filter bank of ETMX.
Also, in order not to change the OLTFs, we added the gain of “x2.42” to the LOCK FILTERS of ETMX and changed the gain values of the damping filters.

  17711   Mon Jul 24 23:01:10 2023 KojiSummaryCDSFIXED: rossa can't boot

Compared the network settings between some of the machines.

It seemed that we can write network settings into /etc/network/interfaces. (Comment lines omitted)

source /etc/network/interfaces.d/*

auto lo
iface lo inet loopback

pianosa has the same content, but I found chiara has much more elaborated lines. So I decided to put the details there.

source /etc/network/interfaces.d/*

auto lo
iface lo inet loopback

auto eno1
iface eno1 inet static
      address 192.168.113.215
      netmask 255.255.255.0
      gateway 192.168.113.2
      dns-nameservers 192.168.113.104
      dns-search martian
      dns-domain martian

And just in case ifup was ran

$ sudo /sbin/ifup eno1

This made rossa connected to the wired network as rebooted.
So reactivated the NFS line in /etc/fstab
Rebooting pianosa brought it back to the nominal operation. Victory.

  17727   Thu Jul 27 17:03:57 2023 KojiSummaryCDSc1psl spare channel situation

I looked at the Acromag situation of c1psl to prepare for the PSL air flow speed sensor.
Someone clever did a great job of binding all the spare channels into DB37s.

The pin-outs and channel assignments are all listed in a Google spreadsheet. The link can be found on the following wiki page.

https://wiki-40m.ligo.caltech.edu/CDS/SlowControls/c1psl (Click "Feedthrough wiring with test status")

According to the spreadsheet, we are supposed to have

  • 14 DAC CHs
  • 14 ADC channels
  • 15 sinking BIO channels
  • 12 sourcing BIO channels

For now, we can hook up the sensors via a DB37 breakout or even just a connector. If we have many cables coming in the future, we can make a breakout 1U unit.

 

  17739   Tue Aug 1 02:51:46 2023 HirokiSummaryBHDMode-matching breadboard for BHD OMCs

Mode-matching breadboard has been constructed

I have constructed the mode-matching breadboard for aligning the BHD OMCs.
I also measured the profile of the resulting beam:

Beam waist X: 496 +/- 2 um
Beam waist Y: 504 +/- 3 um
Waist position X (from the front surface of the collimator mount): 224 +/- 1 cm
Waist position Y (from the front surface of the collimator mount): 236 +/- 2 cm

Maximum mode-matching efficiency to OMC: 99.78 +/- 0.07 % (if the waist of the OMC eigen mode is place at 230 cm)
(OMC eigen mode: 489.6 um (horizontal), 490.5 um (veritical))

The details are shown in the following attachments:

  • Attachment 1: Current configuration and summary of beam profile
  • Attachment 2: Resulting beam profile
  • Attachment 3: Photo of mode-matching bread board
  17742   Tue Aug 1 20:29:12 2023 HirokiSummaryGeneralADC/DAC Noise of Moku:GO [Reprinted elog from Ando Lab at University of Tokyo]

This post is reprinted from the elog of Ando Lab at the University of Tokyo.
[Author: Satoru Takano]

Recently some people are interested in ADC/DAC noise of Moku:GO. I measured them, and found that ADC noise is much larger than expected (quantization error).
I used "PID Controller" module for the measurement of ADC/DAC noise.

DAC Noise

I set up the module as follows:

  • Input channel: open, no input
  • Output channel: ch1

I took data by data logger DL-750 and calculated PSDs by myself. Measured DAC noise is shown in Fig.1.


Fig.1 : DAC noise of Moku:GO

I modeled the noise spectrum by:
\sqrt{S_{\rm{DAC}}(f)} = 1.1 \times 10^{-7} [\rm{V}/\sqrt{\rm{Hz}}] \times \sqrt{1+\frac{1.4 \,\rm{kHz}}{\it{f}\,[\rm{Hz}]}}

ADC Noise

I set up the module as follows:

  • Input channel: ch1, terminated by 50Ω
  • Output channel: ch1
  • Filter: Flat, 50dB amplification

I took data by data logger DL-750 and calculated PSDs by myself. Measured ADC noise is shown in Fig.2.


Fig.2: ADC noise of Moku:GO

I modeled the noise spectrum by:
\sqrt{S_{\rm{ADC}}(f)} = 9.1 \times 10^{-6} [\rm{V}/\sqrt{\rm{Hz}}] \times \sqrt{1+\frac{46 \,\rm{Hz}}{\it{f} \,[\rm{Hz}]}} \times \sqrt{\frac{1+ \left( \frac{ \it{f} [\rm{Hz}] }{ 28\, \rm{kHz} } \right)^2} {1+ \left(\frac{ \it{f} [\rm{Hz}] }{ 2.4\, \rm{kHz} }\right)^2 } }

Comparison with Theoretical Value

I estimated quantization error of ADC/DAC. Specification of the inputs/outputs are as follows:

  • Sampling rate: 125 MHz
  • Bit number: 12 Bit
  • Voltage range: ±5V, 10Vpp

From these specifications, the estimated quantization noise is 8.9 \times 10^{-8} [\rm{V}/\sqrt{\rm{Hz}}]. I plotted measured noise and this estimation noise in Fig.3.

Fig.3 The measured noise and the estimated quantization noise from the specification.

Comparing with this value,

  • DAC noise: the floor level is almost the same as the estimated quantization noise. Below 1.4kHz an additional 1/f noise exists.
  • ADC noise: the floor level at 100kHz is about 10 times larger, and at 100Hz about 100 times larger than the estimation. Below 46Hz another 1/f noise exists.

There is a measured data about ADC noise of Moku:Lab at here. Comparing with this, ADC noise of Moku:GO has a stranger shape than that of Moku:Lab.


Fig.4: The measured ADC/DAC noise of Moku:GO and ADC noise of Moku:Lab

Summary

If we are using Moku:GO and worried about sensitivities, we should insert some whitening filter before the input of Moku:GO.

  17749   Wed Aug 2 17:56:25 2023 RadhikaSummaryGeneralADC/DAC Noise of Moku:GO [Reprinted elog from Ando Lab at University of Tokyo]

Repeating ADC/DAC noise measurements

I carried out the same measurements of the Moku:Go ADC and DAC noise to compare to the results from Ando Lab. Instead of a flat filter with 50dB of gain, I used the uPDH box fitted filter shape. I recorded spectral densities with an SR785; results are in Attachment 1. These measurements are consistent with those measured in Ando Lab. I included the SR785 noise floor, measured by terminating its input.

DAC noise measurement with single-tone input

Next I tried to measure the Moku's DAC noise using its Waveform Generator and Digital Filter Box in multi-instrument mode. I generated a single-tone digital signal and passed it to an elliptic bandstop filter (fit tightly around the tone). The filtered signal was measured by the SR785. I performed this measurement with 1 kHz and 10 kHz tones [Attachement 2]. While the fundamental peak is suppressed, we still see it and its harmonics (not DAC noise). The floor of these measurements is consistent with the DAC noise reference from the first test, and we can say that the Moku:Go's DAC noise above 100 Hz is below 1 µV/rtHz.

Further ADC noise measurements to come.

  17754   Fri Aug 4 20:50:13 2023 KojiSummaryCDSThe location where the wiper script is running

The raw frame file is stored in /frames at fb. Before the disk space is flooded, the wiper script deletes the old raw frame files.
I wonder what the state of the wiper script is.

There are wiper scripts (wiper.pl) in /opt/rtcds/caltech/c1/target/fb and /opt/rtcds/caltech/c1/target/daqd, but they no longer seemed to be in use.

I went around the machines and found a service on fb

controls@fb1:~ 0$ sudo systemctl status rts-daq_wiper
● rts-daq_wiper.service - Remove old frame files to reclaim space for the new frame files
   Loaded: loaded (/etc/systemd/system/rts-daq_wiper.service; static; vendor preset: enabled)
   Active: inactive (dead) since Fri 2023-08-04 20:00:27 PDT; 9min ago
  Process: 5355 ExecStart=/opt/rtcds/caltech/c1/scripts/daq_wiper -d /frames -t 2.5 (code=exited, status=0/SUCCESS)

This python version of the wiper script (/opt/rtcds/caltech/c1/scripts/daq_wiper) is running since the last year.
According to the explanation found in the script, the trend data is kept saved, while the raw data is kept deleted to save the specified amount of space (0.25TB it says).
I think this is the configuration we want. So the script was left untouched.

  17774   Thu Aug 10 19:52:47 2023 yutaSummaryALSsimultaneous hold and release of the arm (aka two arm ALS)

I just wanted to take the same time series data I took back in 2012 (40m/6874).
ALS noise look much better than 2012, but MICH contrast during both arms hold on IR resonance with ALS looks pretty bad compared with 2012, which indicate unbalance of the arms.

  17789   Wed Aug 16 16:42:22 2023 RadhikaSummaryGeneralMoku Go/Pro delay measurements

I measured the Moku:Go and Moku:Pro delay using a Agilent 4395A network analyzer. I considered the PID controller (0 dB gain); the IIR filter box with a 2nd-order low-pass filter; the FIR filter box with 2 coefficients and 201 coefficients (both low-pass). The current XAUX laser lock is done with a Moku:Go using the IIR filter box, so we would expect ~12 µs of delay.

  17793   Thu Aug 17 15:24:46 2023 JCSummaryDaily ProgressPreparing a clean room.

[Yuta, Yehonathan, JC]

The Frame for The Cleanroom has Constructed and Placed.

What we did:
  - Put together the Clean room frame.
  - Lifted and placed the cleanroom into.

  - Temporarily moved the portable HEPA to the side.
  - Disconnnect the HEPA Booth.

 

Summary:

     · Put together the Clean room frame.

In the mornings, I have been coming in and assembling the frame one side at a time. Today I finish by attaching all the part together. It does still feel a bit wobbly at the bottom, but theis will be more fixed one I add a cross beam in the backside and bolt the legs to the ground.

  17803   Tue Aug 22 16:44:08 2023 RadhikaSummaryGeneralMoku Go/Pro delay measurements

Here are the results for Moku Go/Pro delay measurements with the filter shapes removed [Attachments 1, 2]. The PID controller, IIR filter, and FIR filter were all flat in magnitude and phase. The PID controller was the same as before: P=1, I=D=0. The IIR filter was given the form H(s) = 1. The FIR filter was given an exponential form e^(-10t), as done here. The configurations for the Moku:Go (same for the Pro, just 10x higher sampling rate) can be found in Attachments 3-5.

The Agilent 4395A was used once again for measurement. Excluding the FIR low-pass with 201 coefficients, the old measurements with low-pass filters and these flat filters have consistent delay. The Moku:Go IIR filter box used for locking the green laser would still give us a delay of ~12 seconds. 

  17809   Thu Aug 24 13:10:17 2023 MurtazaSummarySUSETMX Testing

Koji suggested going through the following steps to check the ETMX suspension:

1. Do a free swing test to obtain the input matrix
2. Run the coil balancing script to change the gains on the them
3. Do the ring down test without closing the loop with the OPLEV and just with the OSEM to get Q~5
4. Tune the OPLEV servo gains

Suggestions welcome.
Tuning the ASC would make more sense once ETMX has been calibrated. Will run the free swing test tonight.

  17824   Tue Sep 5 04:48:20 2023 HirokiSummaryGeneralSummary of the late submitted entries

After I came back to Japan, I wrote and revised some Elog entries that I was not able to finish during my stay.
I am sorry for the late submission and revision.

Toward locking PRFPMI

Flow sensor

  • elog #17765
    I additionaly attached the schematic of the wiring to this existing entry.
     
  • elog #17779
    Calibration of the flow sensors.

Others

  • elog #17822
    Location of the beam chopper used in T&R measurement.
     
  • elog #17823
    Location of the diode laser (iFLEX-1000) that might be used as the replacement of the He-Ne laser for OPLEV.
  17827   Tue Sep 5 18:46:08 2023 KojiSummaryGeneralDsub 9 (DB9) cable inventory

I went to Section Y7 to check the stock DB9-MF cables. The custom dsub cables are also there.

  • DB9 1FT / QTY 26
  • DB9 2.5FT / QTY 42
  • DB9 5FT / QTY 49
  • DB9 10FT / QTY 30
  • DB9 15FT / QTY 9

Let's say this is (26, 42, 49, 30, 9)

My estimation was:
1Y0/1 (9, 26, 8, 10, 0)
1Y4 or 1X9 (0,8,2,0,0)
1X3/4/5 (11,30,10,12,0)

And the rest was for acromag.

This means that:
No matter how my estimation was wrong, we have prenty of cables for the 1X3/4/5 electronics swap.

  17830   Thu Sep 7 14:09:37 2023 KojiSummaryElectronicsVertex Electronics Transition

The vertex electronics transition work will begin on Monday. We expect the ongoing ASS-X work to be completed by then. But if it needs more time, we must hear a shouting signal from the ASS team.
Is there any other preparation to be done this week to reasonably compensate for changes in gain and TF associated with the transition?


In preparation for the transition, we want to have long custom DSUB25 cables (D2100675) approximately laid out (I mean on the floor, etc) this week. JC takes care of this.

  • The lengths of the cables can be found in the attached wiring diagram.
  • Both ends of the cables need to be labeled.
  • At which side do we want to absorb the slack?

Transition Plan

  • Suspension damping and watchdogs are appropriately taken care of, although we soon stop/remove everything.
  • We first remove any existing units not going to be used in the circuit (except around the Eurocard crate oplev interface P2 of the wiring diagram).
  • The wirings at the side cross-connects are removed. This includes the removal of the thick cables on the cable racks. This would become a heavy work.
  • The DC power strips are attached to the racks, and the DC power wiring should be done at this point. We check the DC supply voltages.
  • Install the new units as per the above rack layout and proceed with the DSUB connections. We have sufficient number of DSUB cables (this ELOG).
  • Turn the units on one by one to detect any unit failure, just in case. If they are all on, we start work on the CDS restoration work.
  17838   Tue Sep 12 18:55:55 2023 KojiSummaryElectronicsVertex Electronics Transition

We are ready to do the transition from Wed 1PM.

The items for the upgrade was collected around the vertex area (Attached photo).

- aLIGO-style DC power strip (+/-18V) x3
- DC power cables (orange +/-18V)
- Electronics units for the upgrade.
- DSUB (DB9) cables
- Custom DSUB15-DSUB25 cables
- Custom DSUB25 cables

 

  17839   Tue Sep 12 23:10:06 2023 KojiSummaryElectronicsVertex Electronics Transition

Note on Sorensen:

- Eurocard crate requires +-15V. We can place two 15V Sorensens on 1X4 for Eurocard crate or just leave the current +/-15V supplies.

- The aLIGO units requires +/-18V. We can place two 15V Sorensens on 1X5 or just leave two of the current supplies and set them to +/-18V.

  17840   Wed Sep 13 12:46:03 2023 KojiSummaryElectronicsVertex Electronics Transition ~ final prep
  • [OK] Reflected the sorensen setup (minimal change from the conventional config. (See the attachment)
  • Before destroying the current setup, bring the alignment biases for the vertex 8 sus to zero and record all the OSEM values.
    => Radhika did it (next ELOG)

    -> This will give us the ratio of the OSEM error signals to know the gain ratios between before and after. Also this will make it easier to bring the alignment back.

  • [OK] I suppose the oplevs are still aligned. We don't need to be too nervous about the oplev spot too much.

  • How to compensate the coil force cal? Do we know the ratio from the ETM coil driver swap? (What were the coil output Rs? What are they now? Are the ratios reasonable?)

    • Currently:
      - PRM/BS/ITMX/ITMY DAC output for face coils differential

      - SRM/MC2/MC1/MC3 DAC output for face coils single ended
      - All 8 SD coils single ended
      - Coil Output Rs
        According to D1700218

        PRM unknown to be checked
        BS 100Ohm
        ITMX 100Ohm
        ITMY 100Ohm
        SRM 100Ohm
        MC2 430? unknown to be checked
        MC1 430? unknown to be checked
        MC3 430? unknown to be checked

    • New setup
        DAC output differential
        AI has the gain of 1 / HAM coil driver has a gain of 1.2
        Coil output Rs:

        For all the face coils 1.2k // 100 ~ 92Ohm
        For all the side coils 1.2k

 

  17841   Wed Sep 13 13:50:48 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ final prep

OSEM values for 8 vertex optics ~before~ electronics upgrade (averaged over 60 s):

['C1:SUS-BS_ULSEN_IN1', 'C1:SUS-BS_URSEN_IN1', 'C1:SUS-BS_LRSEN_IN1', 'C1:SUS-BS_LLSEN_IN1', 'C1:SUS-BS_SDSEN_IN1', 'C1:SUS-ITMX_ULSEN_IN1', 'C1:SUS-ITMX_URSEN_IN1', 'C1:SUS-ITMX_LRSEN_IN1', 'C1:SUS-ITMX_LLSEN_IN1', 'C1:SUS-ITMX_SDSEN_IN1', 'C1:SUS-ITMY_ULSEN_IN1', 'C1:SUS-ITMY_URSEN_IN1', 'C1:SUS-ITMY_LRSEN_IN1', 'C1:SUS-ITMY_LLSEN_IN1', 'C1:SUS-ITMY_SDSEN_IN1', 'C1:SUS-PRM_ULSEN_IN1', 'C1:SUS-PRM_URSEN_IN1', 'C1:SUS-PRM_LRSEN_IN1', 'C1:SUS-PRM_LLSEN_IN1', 'C1:SUS-PRM_SDSEN_IN1', 'C1:SUS-SRM_ULSEN_IN1', 'C1:SUS-SRM_URSEN_IN1', 'C1:SUS-SRM_LRSEN_IN1', 'C1:SUS-SRM_LLSEN_IN1', 'C1:SUS-SRM_SDSEN_IN1', 'C1:SUS-MC1_ULSEN_IN1', 'C1:SUS-MC1_URSEN_IN1', 'C1:SUS-MC1_LRSEN_IN1', 'C1:SUS-MC1_LLSEN_IN1', 'C1:SUS-MC1_SDSEN_IN1', 'C1:SUS-MC2_ULSEN_IN1', 'C1:SUS-MC2_URSEN_IN1', 'C1:SUS-MC2_LRSEN_IN1', 'C1:SUS-MC2_LLSEN_IN1', 'C1:SUS-MC2_SDSEN_IN1', 'C1:SUS-MC3_ULSEN_IN1', 'C1:SUS-MC3_URSEN_IN1', 'C1:SUS-MC3_LRSEN_IN1', 'C1:SUS-MC3_LLSEN_IN1', 'C1:SUS-MC3_SDSEN_IN1']

[1943.7368693033854, 1597.8396443684896, 1667.4166076660156, 1709.3347656250003, 1760.058290608724, 1013.2686828613281, 1833.5396423339844, 2096.6071411132816, 786.2030975341798, 1152.7826700846356, 923.4767690022786, 447.51257578531903, 678.4539184570312, 971.2538736979167, 720.261508178711, 2458.092639160156, 2245.09764811198, 710.1112263997396, 258.2382120768228, 1225.202982584636, 3048.1043741861986, 3092.901733398437, 77.94405148824053, 181.08351745605466, 5145.644441731771, -6879.474226888021, -6954.500219726562, -3615.385673014323, -5468.913354492189, -3260.200516764323, 1555.9213073730468, 1625.1883911132813, 348.9968526204428, 1011.3114247639974, 1386.0941060384114, 1014.3825622558594, 1218.7048522949217, 1642.9303202311198, 1621.7448221842449, 720.2911783854166]

  17842   Wed Sep 13 14:02:29 2023 KojiSummaryElectronicsVertex Electronics Transition ~ final prep

- 4x 1064nm NPROs are OFF. The lab hall is laser safe, although the oplev lasers are on.
  The Laser Warning Signs were turned off by the interlock switch at the PSL enclosure (control room side)


- Watch dogs were turned to "disabled"

- Halted c1sus using dolphin fencing. This worked very well.
The previous report of dolphin fencing not working was due to a typo in my instruction (wrong -disable -> correct --disable).

controls@fb1:~ 0$ ./dolphin_ix_port_control.sh --disable 192.168.113.40 1
--disable
Disabling switch_ip 192.168.113.40, port 1
Complete - csr write addr=0x0001C050, val=0x20820090 (with ret=0)

ssh c1sus

controls@c1sus:~$ rtcds stop --all

 

  17843   Wed Sep 13 17:26:26 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 1

[Radhika, Paco, Murtaza, Koji]

- Removed all the units that will not be used in the new setup.
- Removed the sidepanel crossconnects
- Removed most of the sidepanel power lines except for the top eurocrate at the top of 1X4 (requires +/-15 pale orange and blue).
- Removed the acromag connections
- Removed the connectors of the long suspension cables


We'll resume the work at 10AM. (We'll have breaks for lunch and the seminar at 3PM)

=== Next steps ===

- Continue to remove the long suspension cables.
- Attach the DC power strip

- Continue to clean up the power lines on the rack side
- Prepare the power lines (Guralp requires +/-15V, the Eurocard crate +/-15V, new power strips (x3) +/-18V)
- Install the units on the racks.

  17844   Thu Sep 14 11:46:28 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 2

[Radhika, Paco, Murtaza, Koji]

Morning work:

  • Power Strip assembly
  • Power Strip cable crimping
  • c1lsc fiber routing (the PCIE fiber was in danger) / c1lsc machine was stopped after dolphin fencing
  • We tried to reroute the c1lsc fiber above the racks such that it does not get pitched by the rack doors,
    but it seemed that the fiber was damaged (Attachment 1) and the c1lsc can't talk with the IO chassis anymore. We need to replace the fiber.
    It seems that P/N is PCIEO-4G3-100.0-11 (Samtec)

Afternoon work:

  • Removed the sidepanels of 1X3 and 1X4 for easier work
  • Removed the long DB25 cables from the old sat boxes.
  • DC power strips are installed.
  • Finished cleaning up the side cross-connects
  • Checked the DC supply conditions.
    • +/-15V Eurocard crate + Guralp requires 0.5A / 0.6A
    • +/-18V appered on the DC power strips correctly
  • Cleaned up the floor a bit
  • Murtaza noticed that there was some strange intermittent noise around the 1Y0/1 racks.
    It looks like one of the fans for the c1ioo IO chassis are dying.

Evening work:

  • Made coil driver short plugs (Attachment 2). This enables the coils while the coil modes are set to be Acquire mode.
  • Rack nuts inserted

Tomorrow plan (10:30AM):

  • c1sus IO chassis installation
  • Unit installation
  • Unit powering tests (before connecting them)
  • Cabling between the units
  • Long DB cable installation (sat box removal)
  • c1lsc fiber replacement
  • Some above cable removal (fiber, old custom DB25 for MC1, etc)

 

  17845   Fri Sep 15 12:51:29 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 3

[Radhika, Paco, Murtaza, Koji]

We made great progress today. It's going well so far.

Morning work (10:30AM~):

  • Installed c1sus IO chassis
  • Installed all units
  • Removed long (previous) custom DB25 cables for MC1

Afternoon work

  • Connected all the units to the DC power strip
  • Unit powering test was done before the inter-unit DSUBs were connected.
    • We found one AA chassis don't turn on even though internal +/-15V seems supplied. We pulled the unit out.
    • All the other units were fine.
    • Typical current draw of the units: (unit name, positive supply current, negative supply current)
      • AA 0.5A 0.5A (18W)
      • AI 0.3A 0.3A  (11W)
      • BIO 0A 0A (0W)
      • Trillum I/F 0.1A 0.1A (0.4W)
      • Sat amp 0.3A 0.3A (11W)
      • Coil Driver 0.3A 0.2A (9W)
  • Cabling between the units
    • Done except for the extracted AA unit and for the BIO units (not needed until we have Acromag).
  • Long DB cable installation (sat box removal)
    • Halfway
  • c1lsc fiber tracking/replacement (not yet done)
    • We found the spare box with 3 more cables behind the X-arm tube. The replacement has not been done yet.

Evening work

  • c1sus powering up and CDS check
    • After the people had left, I tried to start up c1sus. I had used dolphin fencing, but it worked like a charm!
  • ADC1 AA chassis repair

To Do on Mon (10AM~)

  • Long DB cable installation (contd)
  • DSUB cable labeling
  • Sus control system recovery
  • c1lsc fiber reinstallation and system recovery
  • Tool / Debris cleaning

Eventual needs:

  • We need good crimping tools.
  • Supply shortage of the crimping connectors.
  • Fibers should not be routed together with electronics cables. Fibers should be distributed through tubes hanging on the cable racks
  • Cable strain relief
  • Move the noisy CDS and DC power supplies to the drill press room.

Rack nut policy

Out rack nut / screws are so much contaminated.
It's a mixture of #10-32 (standard) / M5 (wrong) / M6 (wrong).
Even the labeled bottles are contaminated.
Don't believe the installed rack nuts/screws, even if they seemed to work fine. They may be a metric pair.

Golden standard (Attached photo)

  • rack nuts marked 1032
  • small washers
  • 10-32 tapered-round head screws

If you find other hardware, don't mix them with any stocks. Give them to Rack Nut Police (=Koji). He will hide them to some where secret.

 

  17847   Fri Sep 15 22:57:15 2023 KojiSummaryElectronicsc1sus ADC1 AA chassis fix

c1sus ADC1 AA chassis fix.

  • Brought the chassis on the workbench.
  • Opened the chassis and "alas!" The internal power cables were not connected to the PCBs. This makes sense why there was no current draw at all.
  • The cables were connected.
  • The unit was tested with +/-18V power. At least, the diff outputs of the AA boards were all 0V.
  • A missing connector screw for the external power connector was fixed

The unit was installed on the 1X5 rack, and the DB9 cables were connected.
Repair mission completed.

I've turned on the Eurocard crate (+/-15V) and the AA units (+/-18V) to check if the oplev channels are working. (It seems to be running well)
Also, the AA units are not too hot so far.

  17848   Mon Sep 18 10:26:12 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

[JC, Paco, Radhika, Koji]

Morning/Afternoon work:

  • Long DB cable installation (contd)
    • 14 DB25 cables went through the cable-rack bridge above the ITMX chamber. It's twice the previous # of cables.
    • These cables were connected to the chamber flanges. ITMY Flange1 had been having the 2nd connector malfunction. So the cables were connected to the connector 1 and 3 (as before).
  • DSUB cable labeling
    • All the (long) cables connected to the units were labeled appropriately.
  • c1lsc fiber reinstallation
    • We found one fiber cable (AlpenIO Inc PCIe 4x10G 100m AIO-PCIe4X-100 (2010)) already routed from 1Y4 to the PSL rack. This is the spare JC told us. We routed the host end to 1Y7.
    • c1lsc is up and running as before. All the models are up an running (burtrestore still needed).
  • c1sus channel assignment
    • We have the swap of ADC0/1/2 so that the oplev ADC will have ADC0 (duo tone at CH31)
    • The channel assignments were modified:
      • SUS numbering "n": (0-PRM / 1-BS / 2-ITMX / 3-ITMY / 4-SRM / 5-MC2 / 6-MC1 / 7-MC3)
      • Face OSEMs ADC1 CH (n x 4 + 0~3, UL/LL/UR/LR)
      • Side OSEM ADC2 CH n
      • Oplev Ch ADC0 CH (n x 4 + 0~3)
      • Face OSEMs DAC0 CH (n x 4 + 0~3)
      • Side OSEM DAC1 CH n

  • Sus damping control recovery
    • We need to lookin to MC3 UL/UR, PRM SD, SRM UL/LL/UR, ITMX all, ITMY face. See next post.
  • Tool / Debris cleaning
  17849   Mon Sep 18 18:38:02 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 4

[Koji, Paco, Radhika]

We recorded the 5 OSEM sensor readings for each of the 8 upgraded optics.

1. The correct scale factor seems to be 9x for the sensible OSEM readings. This is consistent with the scale factor calculated here.

2. The expected counts for each sensor is between 10,000-15,000 cts.

3. Several OSEM sensor values have bad readings of ~0 cts, or a few orders of magnitude smaller than expected:

      - ITMX UL/UR/LR/LL
      - ITMY LR/LL/SD
      - SRM UL/UR/LL
      - MC3 UL/UR

4. Several OSEM sensor values have readings < 0 (there's overlap with the previous group):

      - ITMX UR/LR/LL/SD
      - ITMY SD
      - PRM SD
      - SRM UL/UR/LL
      - MC3 UL/UR

5. MC1 has a consistent scale factor of 2.15, quite smaller than expected. Note that its OSEM readings were negative before the upgrade and now positive; hence negative MC1 ratios below.

Here is the full matrix of OSEM ratios after/before upgrade:
 

  UL UR LR LL SD
BS 7.53508553 9.80529834 10.82905875 8.61769586 1.02324445
ITMX 2.18227361e-03 -2.45700834e-03 -2.88710265e-03 -7.09635068e-03 -8.06591717
ITMY 5.11154762 3.57325499e+01 9.24866311e-03 9.05692306e-01 -3.00528448e-02
PRM 7.22051955 7.45579712 4.8889959 84.63438221 -1.4148838
SRM -8.86075335e-04 -8.39000436e-04 1.68963158e+02 -3.14350110e-02 1.12586402
MC1 -2.15229241 -2.14837141  -2.14954979 -2.16571496 -2.13574099
MC2 9.09337655 9.17967725  25.52931668 9.03775091 8.89290556
MC3 -4.60602513e-03 -1.06510781e-03 9.05368452 8.99212312 9.07521747

Next steps
 

We will debug the corresponding circuits tomorrow.

  17852   Mon Sep 18 20:16:03 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

- Here is the thought how does the factor of 9 come from:

  • We are driving OSEM LEDs at 35mA rather than at 25mA. (Honeywell LED SME2470 has quite a linear response for  Irradiance vs. Forward Current.)
  • The TIA of the OSEM PD is now 121K instead of the previous 39.2K
  • The OSEM output is received by differential AA.

--> Naive estimation is (35/25) x (121k/39.2k) x 2 = 8.64.

- MC1 sat amp has already been replaced with the aLIGO version by Gautam. I wonder where this factor of 2.15 came from (not 2...?).


- Coil driver response:

Previous setup

--> BS/PRM/ITMX/ITMY 2 VDAC/118 Ohm = 1.7e-2 A/V x VDAC

--> MC1/MC2/MC3/SRM VDAC/118 Ohm = 8.5e-3 A/V x VDAC

--> All the side coils VDAC/118 Ohm = 8.5e-3 A/V x VDAC

New setup

  • The AIs have the gain of 1.
  • The coil driver has a gain of 1.2.
  • The output Rs for the face coils are 1.2k//100Ohm = 92Ohm

--> 2 VDAC * 1.2 / (92+18) Ohm = 2.2e-2 A/V x VDAC

BS/PRM/ITMX/ITMY face coils will have x1.3 more actuation.

MC1/MC2/MC3/SRM face coils will have x2.6 more actuation.

  • The output Rs for the side coils are 1.2k

--> 2 VDAC * 1.2 / 1200 Ohm = 2.0e-3 A/V x VDAC

MC1/MC2/MC3/SRM will have less actuation by a factor of 1/4.25.

 

 

ITMX 400Ohm
ITMY 400Ohm
BS 100
PRM 100
SRM 100
MC2 427.5/410/411/409.4/410
MC1 434.5/428.4/430.6/432.5/434.0
MC3 432.2/409.4/409.3/410.6/413.8
 

  17853   Mon Sep 18 23:09:40 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

MC1 is ready for the damping test

Trouble shooting plan

  • Is the LED on? => Check all the LED mon outputs of the sat amp. It should show 5V if the output current is 35mA. If the constant current loop is open (eg no LED / connection failure etc), it rails at the supply voltage.
  • Also the CCD videos should show the status of the LEDs (at least for the TMs and the MC mirrors)
  • Then is the PD out responding? => Check all the PD mons.
  • If the PD mons are normal, but there is no signal it can be the AA problem. Inject test signal to that channel on the AA and see if we can see some number on the CDS.
     
  • Is the coil current flowing? => Check if the coil drv mons are responding.
  • If not, check if the AI output has the DAC output in that channel.
  • If the DAC signal is there, but no current it can be the driver issue, or the coil/cable/flange connection issue.
  17854   Tue Sep 19 17:25:38 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 5

MCs OSEM input / coil output gain tuning

Seeing that MC1, MC2, MC3 OSEM readings looked reasonable and consistent, I worked on updating the input OSEM cts2um filter for the 3 suspensions. MC1 OSEM input gains were changed by a factor of 2.15; MC2 and MC3 OSEM input gains were changed by a factor of 8.64 (see previous ELOG for source of these factors).

OLD cts2um gains (units are um/ct):

  UL UR LR LL SD
MC1 0.105 0.078 0.065 0.087 0.09
MC2 0.415 0.361 0.782 0.415 0.36
MC3 0.509 0.424 0.365 0.376 0.36

NEW cts2um gains (units are um/ct):

  UL UR LR LL SD
MC1 0.0488 0.0363 0.0302 0.0405 0.0419
MC2 0.0480 0.0418 0.0905 0.0480 0.0417
MC3 0.0589 0.0491 0.0422 0.0435 0.0417

Next, I moved onto the coil output filters for MC1, MC2, MC3. There was no gain filter already in place for these coil outputs, so I created one called V2A. (This name can be changed. Note: for other optics the coil actuation scaling filters are titled "xN" for scaling N. Eventually we will find an elegant way to set these scalings.)  The coil outputs for MC1, MC2, MC3 were changed by a factor of 1/2.6, or 0.385 (see previous ELOG for source of this factor).

I ran into an issue saving the foton filter coefficients: the filters appear to be saved; however, "Load Coefficients" does not load them onto the medm screen for MC2_URCOIL and all MC3 coils. I've tried toggling the save button and Load Coefficients button, but no luck. I checked and the filters are saved in opt/rtcds/caltech/c1/chans/C1MCS.txt. When changing an existing filter gain, the change is not being applied to the output channel.

MC1 damping

Since all MC1 coil filters saved and loaded successfully but not MC2 or MC3, I was only able to test the damping of MC1. Turning on the damping filters did not supress motion, so I made the following changes:

1. Prior to the upgrade, MC1 OSEM readings were all negative. Now they are positive, so I reversed the signs of all OSEM input gains (-1 -----> +1) [Attachment 1]. This is now consistent with all other optics' OSEM sensor gains.
2. I noticed that all MC1 coil output gains were negative. The [UL, UR, LR, LL, SD] coil output sign convention for each other optic is [+, -, +, -, +], or that but flipped. So I flipped the signs of MC1 UL/LR/SD coil output gains to match the [+, -, +, -, +] pattern.

Attachment 2 shows the damping of MC1 after these changes were made. It looks side the SIDE mode is underdamped and we may want to increase its servo gain. (I flipped the sign of the coil output and confirmed it ringed up, so the sign is correct.)

Next steps

1. Debug why foton is not saving new coil output scaling filters for MC2 UR and all MC3 coils.

2. Assess MC2 and MC3 damping.

 

  17855   Tue Sep 19 19:21:10 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 5

[Koji, Radhika]

Update to the Foton/Load Coefficients issue:

- "Save" in foton writes/updates filters correctly to chans/C1MCS.txt. However, "Load Coefficients" is currently not reading C1MCS.txt and therefore not loading any changes at all.

    - We saved a backup of C1MCS.txt and replaced it with one from this morning, hoping to see that the new V2A filters vanish from MC1 coil outputs. When we loaded coefficients, the V2A filters remained.

- We then checked if this issue was happening with C1SUS by adding a test filter to ETMY_ULCOIL. Indeed "Load Coefficients" loaded the filter. So it seems to just be a C1MCS issue.

- We restarted C1MCS twice and no change.

  17856   Tue Sep 19 19:48:20 2023 KojiSummaryElectronicsVertex Electronics Trouble shooting

[Paco, Murtaza, JC, Koji, Radhika]

MC1/MC2 was working fine.

At this point MC3, SRM, and ITMY are also working fine.


The custom DB25 cables between the sat amps and the flanges are difficult to mate.

  • The finger tight was not enough to make all the contacts. Fastening the screws with a screwdriver made MC3 start working fine on CDS.
  • The custom cable fastening screw on PRM(1st) was stripped at the flange side. It needs a thread dyeing. The SRM(2st) has the hex nut broken on the sat amp. Need to be fixed.

We checked if the LED mon shows the correct values. When it is connected it shows 5V. If the LED is not connected it shows 0.8V. It goes 0.08V in an unknown state.

  • SRM1 all channels were 0V. It turned out that the connection inside the vacuum chamber seemed mirrored. Right now we have temporary mirror ribbon cables to fix this issue. We need two shielded mirror cables for SRM1 and SRM2.
  • SRM2 was random (5V, 0.8V, and 0V)
  • BS1/2/ITMY1 looked fine.
  • ITMY2 was strange.
  • ITMX1/2 were completely silent.

We suspected the cable pinouts/ cable mating issue etc, but it turned out that the SRM2 cable was mislabeled and the ITMY2 cable was connected to the SRM sat amp. That's why it was so random. We corrected the connection and SRM and ITMY started working fine on CDS.

We used the OSEM simulation box to test the sat amps. That suggests that the BS/PRM/ITMX problem may be coming from the SAT amps. We need to look into the sat amps.

  17857   Tue Sep 19 20:49:08 2023 KojiSummaryElectronicsVertex Electronics Trouble shooting

[Murtaza, Koji]

ITMX / BS / PRM sat amps were removed from the rack and checked on the workbench. They all work fine with the OSEM simulation box.


With the correct circuit, the LED mon should be 5V, and the PD readout should be 2.6~3.0V (i.e. the differential output has twice the voltage difference of this number).

ITMX Sat Amp fixed:

  • The internal wiring for CH1-4 was not connected (or disconnected by mechanical impact) (Attachment 1)
  • PD1 channel for CH1 had a metal debris on the transimpedance opamp (Attachment 2)
  • The internal board for CH5-6 was connected in the opposite direction. This was because both connectors on the board had the wrong genders.
    This was replaced with a spare. (There was two spares and I consumed one now) (Attachment 3)
     
  • Put a ventilated lid instead of the solid lid.

BS Sat Amp:

  • All the CHs just worked fine.

PRM Sat Amp:

  • Found the bias selector jumpers had not been installed. Fixed. (Attachment 4/5)
  17858   Tue Sep 19 23:40:33 2023 KojiSummaryElectronicsVertex Electronics Wed Plan

Plan for Sept 20, 2023

For morning people:

  • We don't need to replace the long cables. They seem all fine.
  • Close the lid of the repaired sat amps. Use a lid with ventilation slits (there is an extra with the empty unit on the same desk).
  • Install the sat amps back to the racks. Connect all the cables us. Check if this makes the OSEM values to positive 10~20k counts.
    • If not, check LED mons and PD mons. If they are OK the sat amp is working fine. Track the signal down to the AI chassis to see if the units after the sat amp are working well.
  • The SRM2 and ITM2 cables ( connected to the sat amps at the back of the units) cross (i.e. have twisted) at the rack. Please reroute and nicely coil them up.
  • Fix the custom cable issues: "The custom cable fastening screw on PRM(1st) was stripped at the flange side. It needs a thread dyeing. The SRM(2st) has the hex nut broken on the sat amp. Need to be fixed."
  • Put the proper labels on the long cables at the flanges and the sat amps. The labels should indicate where the connectors are supposed to be connected.
  • Clean up the mess and the tools from the lab.

The

After the weekly meeting, we'll continue to work on the suspension control. The lab will be turned to be LASER HAZARD in the afternoon.

  17859   Wed Sep 20 00:03:22 2023 KojiSummaryElectronicsre: Filter Coefficient Loading Issue

I asked CDS mattermost for help. Chris (Wipf) checked it and reported it is working fine as usual (without fixing anything).

I've reverted the copied C1MCS.txt back in the chans dir (/opt/rtcds/caltech/c1/chans). The filter coefficients were loaded from the GDS screen. The filters were properly updated.

Here is the info from Chris:

Some transient NFS problem, maybe?

One possible clue is that the filter file that the FE actually loads is not chans/<model>.txt,
but chans/tmp/<model>.txt. Before loading, the filter file is copied into the tmp directory,
and a diff of the two files is written to chans/tmp/<model>.diff.
This diff file should normally be an empty file, indicating that the two files match.
But it was not empty at first, so there must have been some issue with the previous load.
After I reloaded, the diff then became empty.

  17860   Wed Sep 20 00:20:09 2023 KojiSummaryElectronicsVertex Electronics ~ change in the actuator calibration

I found the actuator calibration is more complicated. The numbers I reported in the previous elog was not correct.

Here I summarize the numbers of the voltage-to-current conversion.

=== Previous===

Coils DAC
receiver
Coil driver
gain
Coil driver
output R (Ohm)
Coil
R (Ohm)
VDAC Voltage
to Current conversion (mA/V)
PRM Face Diff (2) 1 100 18 17.
PRM Side SE (1) 1 100 18    8.5
BS Face Diff (2) 1 100 18 17.
BS Side SE (1) 1 100 18    8.5
ITMX Face Diff (2) 1 400 18   4.8
ITMX Side SE (1) 1 400 18   2.4
ITMY Face Diff (2) 1 400 18   4.8
ITMY Side SE (1) 1 400 18   2.4
SRM Face SE (1) 1 100 18   8.5
SRM Side SE (1) 1 100 18   8.5
MC2 Face SE (1) 1 420 18   2.3
MC2 Side SE (1) 1 420 18   2.3
MC1 Face SE (1) 1 420 18   2.3
MC1 Side SE (1) 1 420 18   2.3
MC3 Face SE (1) 1 420 18   2.3
MC3 Side SE (1) 1 420 18   2.3

=== New ===

e.g. ITMX face coil electronics are x4.6 stronger than the previous coil electronics.

Coils DAC
receiver
Coil driver
gain
Coil driver
output R (Ohm)
Coil
R (Ohm)
VDAC Voltage
to Current conversion (mA/V)

Ratio
New/Old

PRM Face Diff (2) 1.2 92 18 22. 1.3
PRM Side Diff (2) 1.2 1200 18     2.0 0.235
BS Face Diff (2) 1.2 92 18 22. 1.3
BS Side Diff (2) 1.2 1200 18     2.0 0.235
ITMX Face Diff (2) 1.2 92 18 22. 4.6
ITMX Side Diff (2) 1.2 1200 18     2.0 0.83
ITMY Face Diff (2) 1.2 92 18 22. 4.6
ITMY Side Diff (2) 1.2 1200 18     2.0 0.83
SRM Face Diff (2) 1.2 92 18 22. 2.6
SRM Side Diff (2) 1.2 1200 18     2.0 0.235
MC2 Face Diff (2) 1.2 92 18 22. 9.6
MC2 Side Diff (2) 1.2 1200 18     2.0 0.87
MC1 Face Diff (2) 1.2 92 18 22. 9.6
MC1 Side Diff (2) 1.2 1200 18     2.0 0.87
MC3 Face Diff (2) 1.2 92 18 22. 9.6
MC3 Side Diff (2) 1.2 1200 18     2.0 0.87

 

ELOG V3.1.3-