I've cleared all old attempts on F2A filters on MC1, MC2, and MC3, and added the default F2A filter described in the last post. I added 3 such sets of filters, with Q=3, 7, and 10. I have turned on Q=3 filter for all IMC optics right now. I'll setup some test of switching between different Q filters in future.
After a quick discussion with Yuta, we figured that the introduction of a finite Q that Peter Fritschel does in this DCC doc T010140 for the poles pair, he should have done the same for the zeros pair as well otherwise there will be a notch at around 1 Hz. So I simply modified the filter design to have same Q for both zero pair and pole pair and got following transfer functions:
For upper coils:
for lower coils:
Attachment 1 shows the new filter design. I tested this filter set on MC1 and the optic kept on going as if nothing changed. That is atleast a good sign. Now next step would be test test if this actually helped in reducing the POS->PIT coupling on MC1, maybe using WFS signals.
The filters were added using this createF2Afilters.py script.
Following discussion in this elog thread (40/6004), I used the design of F2A (force to angle(pitch)) decoupling filter as mentioned in this DCC doc T010140. This document is very useful as it talks about the overall control loops of a suspension, including sensor signal conditioning, damping filter shapes, force to pitch decoupling, pitch to position decoupling, and coil strength balancing. In future, if people are working on suspension characterization and damping, this document is a good resource to read.
The document address this problem with first principle calculation using the geometry of single suspensions. As a first pass, I decided to use the design value of these geometric paramters to create a filter design for upper coils and one for lower coils. The parameters are listed in table 2. I used following:
Using above parameters, we can define the F2A filter for upper coils as:
and for lower coil:
I used the design values as listed in the table above and got the filters as shown in attachment 1 for Q=3 case. I think the Q is higher than what other f2a filters I have seen for example at ETMY, the filters are as shown in attachment 2.
I tried turning on MC1 f2a filters but the watchdog tripped in about 4 minutes. This was the case when WFS were turned off. Another trial also lead to the same result. I tried this on MC2 and MC3 as well, all of them tripped after som time. See attachment 3 to see MC1 tripping on these filters.
I'll now try to use a lower Q filter.
Inspected the lab to see what we can do about the IFO WFS:
Today we again locked the LO phase with BH55 + Audio dithering under a zero-offset MICH
We worked with MICH locked using AS55_Q with an offset = 0. Our BH55_Q_ERR is the same as in the previous elog (in this thread).We reduced the MICH offset from 50 to 0 slowly and kept an eye on the BH55 error signals. We realized that at zero offset, most of the error signal was in BH55_I_ERR (why?) so we rotated it back to BH55_Q_ERR (146 deg --> 56 deg). We then looked at the audio demod angle, and optimized it to allocated the error signal in the I quadrature (-15 deg --> 40 deg).
We close a loop with the above configuration to lock the LO phase using only filters FM5, FM8 and then optionally boost with FM2. The measured UGF ~ 20 Hz similar to the configuration with an offset present; and it seems there is some residual noise at ~ 20 Hz (observed in the residual error signal time trace with ndscope).
Turned HEPA ON this morning at 10:28 local (pacific time) or gpstime = 1350802758. WFS ON right after that. IMC was locked and nominally aligned at this time.
Turned HEPA OFF / Lab Lights OFF / WFS Input Gain switched off for the IMC WFS signal tests.
The IMC is still well aligned.
Clean data from the following time:
2022/10/26 5:24:00 UTC (10/25 22:24 PDT)
2022/10/26 5:24:00 UTC (10/25 22:24 PDT)
thanks, this seems to have recentered well.
It looks like it started to act funny at 0400 UTC on 10/24, so thats 9 PM on Sunday in the 40m. What was happening then?
Today we locked LO phase with BH55 + Audio dithering
We worked with MICH locked using AS55_Q with an offset = 50. Our BH55_Q_ERR is the same as in the previous elog (in this thread). We enabled audio dithering of AS1 to produce 280.54 Hz sidebands (exc gain = 15000). We used ELP80 (elliptic, 4th order lowpass with the second resonant notch at 280.54 Hz) at the BH55_Q_AS1_DEMOD_I output. This allowed us to generate an error signal to feedback into AS1 POS. Attachment #1 shows a screen capture of this configuration.
We close a loop with the above configuration to lock the LO phase using only filters FM5, FM8 and then optionally boost with FM2. The compromise we had to make because of our phase margin was to achieve UGF ~ 20 Hz (in contrast with ~ 70 Hz used in single bounce). Attachment #2 shows the measured OLTFs for LO_PHASE control using this scheme; the red was the final measured loop, while the blue was our initial reference before increasing the servo gain.
[Yuta, Paco, JC]
This eq potentially tripped ETMY, PR2, PR3, AS1, AS4, SR2, LO1, LO2 suspensions during today's WB meeting. We restored them into normal local damping.
We aligned the arm cavities just to verify things were ok and then moved on to BHD comissioning. No problems spotted so far.
This nicely brought the sensing signal back to ~zero. See attachment
Some basic info:
I pressed the Auto-Z(ero) button for ~ 3 seconds at ~9:55 local (pacific) time on the trillium interface on 1X5.
I aligned today using this scheme. I couldn't seem to get C1:IOO-MC_TRANS_SUM above 13400 by using WFS or manually aligning. The original state before was the following:
C1:SUS-MC1: -0.4672 -0.7714
C1:SUS-MC2: 4.0446 -1.3558
C1:SUS-MC3: -2.0006 1.6001
C1:SUS-MC2: 4.0446 -1.3558
C1:SUS-MC3: -2.0006 1.6001
in looking closer at the IMC WFS performance I notice 2 issues:
Today we calibrated the actuation on BHD suspended optics: LO1, LO2, AS1, AS4.
Actuation transfer functions for these optics look good.
For a reference we locked LO-ITMY single bounce using the LSC MICH loop. The error point was BH55_Q, the whitening filter gain was 45 dB, IQ demod rotation angle = 151.061 deg, the servo gain was -10, and the actuation point was ITMY. The measured UGF for this loop was ~ 150 Hz when FM2, 3, 4, 5 and 8 were all enabled. Note FM8 is an elliptic low pass (600 Hz cutoff).
We then lock the LO phase by feeding back BH55_Q_ERR to the actuation points under test with exactly the same filters but a servo gain of 0.6 but otherwise we are using the same servo filters FM2, 3, 4, 5 and 8 for this controls. The measured UGFs were all near ~ 70 Hz.
Here we had to be careful not to excite mechanical (?) resonances similar to the previously observed "violin" modes in LO1. In particular, we first noticed unsupressed 816 Hz noise in AS1 was being reinjected by the loop sometimes tripping the local damping loops, so we added bandstop filters at the AS1_LSC output filter bank. The resulting loop was then allowed to increase the gain and turn on FM2 and FM3 (boosts). This was also the case in AS4, where 268 Hz and second + third harmonics appeared to be excited by our feedback control. Finally, AS4 also displayed some mechanical excitation at 96.7 Hz, which seemed too low to be a "violin" mode, and its "Q" factor was not as high. We added a bandstop for this as well.
Attachment #1 shows LO_PHASE OLTFs when actuating in the different optics. By taking the actuation ratios (Attachment #2) with respect to our ITMY actuation reference and which had previously been calibrated to be 4.74e-9 / f^2 m / cts, we now have estimated our BHD suspension actuation calibrations to be:
This magnitudes are consistent with the expected coil driver ranges (about a factor of 10 difference).
give us an animated GIF of this cool new tool! - I'm curious what happens if you look at 2 DoF of the same suspension. Also would be cool to apply a bandpass filter before plotting XY, so that you could look for correlations at higher frequencies, not just seismic noise
Using xyplot tool, we tried to see the relationship between C1:HPC-BHDC_DIFF_OUT and C1:HPC-BH55_Q_DEMOD_I_OUT. The two signals, according to our theory, should be 90 degrees out of phase and should form an ellipse on XY plot. But what we saw was basically no correlation between the two.
We are still struggling with locking LO phase in MICH or ITM single bounce with BH55 with audio dither.
Without audio dither, BH55 can be used to lock.
- LO phase locking with ITMX single bounce, using BH55_Q
- BH55_Q configuration: 45 dB whitening gain, with whitening filter on.
- C1:LSC-BH55_PHASE_R=147.621 deg gives most signal in BH55_Q.
- LO phase can be locked using BH55_Q, C1:HPC-LO_PHASE_GAIN=-0.5 (bright fringe for A, dark for B), feeding back to LO1 gives UGF of ~80Hz (funny structure in ~20 Hz region; see Attachment #1)
- LO phase locking with ITMX single bounce, using BHDC_DIFF
- BHDC B/A = 1.57 (gain balanced with C1:HPC-IN_MTRX)
- LO phase can be locked using BHDC_DIFF, C1:HPC-LO_PHASE_GAIN=-0.4 (mid-fringe lock), feeding back to LO1 gives UGF of ~50 Hz (see Attachment #2).
- LO phase locking with MICH locked with AS55_Q, using BH55_Q
- AS55_Q configuration: 24 dB whitening gain, with whitening filter off
- C1:LSC-AS55_PHASE_R=-150 deg gives most signal in AS55_Q
- MICH can be locked using AS55_Q, C1:LSC-MICH_GAIN=-10, C1:LSC-MICH_OFFSET=30 (slightly off from AS dark fringe), feeding back to 0.5*BS gives UGF of ~100Hz (see Attachment #3)
- LO phase can be locked using BH55_Q, C1:HPC-LO_PHASE_GAIN=-0.8 (bright fringe for A, dark for B), feeding back to LO1 gives UGF of ~45Hz (see Attachment #4)
- LO phase locking with MICH locked with AS55_Q, using BHDC_DIFF
- LO phase can be locked using BHDC_DIFF, C1:HPC-LO_PHASE_GAIN=1 (mid-fringe lock), feeding back to LO1. Not a very stable lock.
What does not work:
- LO phase locking using BH55_Q demodulated at LO1 (or AS1) dither frequency, neither in ITMX sigle bounce or MICH locked with/without offset using AS55_Q
- C1:HPC-AS1_POS_OSC_FREQ=142.7 Hz, C1:HPC-AS1_POS_OSC_CLKGAIN=3000, C1:HPC-BH55_Q_AS1_DEMOD_PHASE=-15 deg, BLP30 is used.
- Attachment #5 shows error signals when LO phase is locked with BH55_Q. BHDC_DIFF and BH55_Q_AS1_DEMOD_I having some coherence is a good indication, but we cannot lock LO phase with BH55_Q_AS1_DEMOD_I yet.
- Also, injection at 13.14 Hz with an amplitude of 300 for AS1 can be seen in both BH55_Q and BH55_Q_AS1_DEMOD_I (26 Hz peak for BHDC_DIFF, as it is quadratic, as expected), which means that BH55_Q_AS1_DEMOD_I is seeing something.
- Check actuation TFs for LO1, LO2, AS1 too see if there are any funny structures at ~ 20 Hz.
- LO phase locking might require at least ~50 Hz of UGF. Use higher audio dither frequency so that we can increase the control bandwidth.
- Check analog filtering situation for BHDC_A and BHDC_B signals (they go minus when fringes are moving fast)
After the amplifier was modified with a capacitor, we continued trying to approach locking LO phase to in quadrature with AS beam. Following is a short summary of the efforts:
We mounted chiara, all front-end machines and switches in rack 1x7; reconnected power, dolphin, onestop and timing cables; and restarted the front-ends. Attachments 1 & 2 show the front and rear of rack 1X7. We are going to continue the clean up work tomorrow.
The ifo is not back up as can be seen in attachment 3. We think the timing issue mentioned earlier is the culprit, but all FEs seem to agree to within a second, so I am not sure. I restarted the models with iop errors other than the timing error, i.e. c1lsc, c1sus, c1ioo and c1iscex. This eliminated most of the errors but the timing error. However, the overflow field on c1lsc is non-zero and the number keeps increasing - indicating a problem with c1lsc? The new status is shown in attachement 4. My understanfin is the a red `TIM` flag in the CDS stateword is not a functional problem, so I guess we are almost there. I did a burt restore on rossa using a snapshot we took earlier today before the shutdown, reset the SUS watchdogs and started the docker services on optimus. Now the IMC is locked.
We are still getting shared memory glitch on c1ioo, see attachment 5.
Note: We left nodus, megatron, optimus and fb1 in rack 1X6 for now.
I measured the sideband frequencies for PMC and IMC lock (to use it for Mariner PMC and IMC design).
PMC: 35.498912(2) MHz
IMC: 29.485038(2) MHz
- Mini-Circuits UFC-6000 was used. The spec sheet says the frequency accuracy in 1-40 MHz is +/- 2 Hz.
- "29.5 MHz OUT" port of 40m Frequency Generation Unit (LIGO-T1000461) was connected to UFC-6000 to measure IMC sideband frequency.
- "LO TO SERVO" port of Crystal Frequency Ref (LIGO-D980353) was connected to UFC-6000 to measure PMC sideband frequency.
- It seems like IMC sideband frequency changed from 29.485 MHz to 29.491 MHz back in 2011 (40m/4621). We are back to 29.485 MHz. I'm not sure what happened after this.
We selected a 102K (1 nF) ceramic capacitor and a 100 uF electrolytic capacitor for the RF amplifier power pins. I soldered the connections and reinstalled the amplifier [Attachments 1, 2].
1) please remember to follow the loading and power up instructions to avoid destroying our low noise RF amplifiers. Its not as easy as powering up any usual device.
2) also, please use the correct decoupling capacitors at the RF amp power pins. Its going to have problems if its powered from a distant supply over a long cable.
Turning WFS loops back on at:
PDT: 2022-10-19 09:48:16.956979 PDT
UTC: 2022-10-19 16:48:16.956979 UTC
WFS loops were running for past 2 hours when I made the overall gain slider zero at:
PDT: 2022-10-18 20:42:53.505256 PDT
UTC: 2022-10-19 03:42:53.505256 UTC
The output values are fixed to a good alignment. IMC transmission is about 14100 counts right now. I'll turn on the loop tomorrow morning. Data from tonight can be used for monitoing open loop noise.
Phase 1 (Clear rack 1X7 of all mounted pieces of equipment)
Phase 2 (Replace the mounting rails and mount all pieces of equipment)
We have added an RF amplifier to the output of BH55. See the MICH signal on BH55 outputs as compared to AS55 output on the attached screenshot.
- Amplify the BH55 RF signal before demodulation to increase the SNR. In order to power an RF amplifier, we need to use a breakout board to divert some power from the DB15 cable currently powering BH55.
Please throw away malfunctioning parts or label them malfunctioning before storing them with other parts. If we have to test each and every part before installation, it will waste too much of our time.
I sketched up a quick drawing with estimated length for the IMC reflected beam. This includes the distances and focal length. Distances are from optic to optic.
I started a GPS timing monitor script, /opt/rtcds/caltech/c1/Git/40m/scripts/cds/tempusTimingMon/tempusTimingMon.py, which runs inside a docker container on optimus. It accesses the GPS receiver (EndRun Tempus LX) status via pysnmp, and creates the following epics channels with pcaspy:
Attached is a 1-day trend of the above channels, along with the IRIG-B timing offsets from the IOPs. No big timing excursions or slippages were seen yet, although the c1sus IOP (FEC-20) timing seems to be hopping around by one IOP sample time (15 µsec).
[Anchal, Radhika, Jamie, Chris]
We conducted a test of three alternative controllers for the IMC pitch DOFs on Friday. These were loaded into a new RTS model c1sbr, which runs on the c1ioo front end as a user-space program at 256 Hz. It communicates with the c1ioo controller via shared memory IPCs to exchange error and control signals.
The IMC maintained lock during the handoffs, and we were able to take one minute of data for each (circa GPS 1349807926, 1349808426, 1349808751; spectra attached), which we can review to assess the performance vs the baseline. (On the first trial, lock was lost at the end when the script tried to switch back to the baseline controller, because we did not take care to clear the integrators. On subsequent trials we did that part by hand.)
The method of setting up this test was convoluted, but now that we see it working, we can start putting in the merge requests to get the changes better integrated into the system. First, modifications were required to the realtime code generator, to get controllers running at the new sample rate of 256 Hz. (This was done in a separate filesystem image on fb1, /diskless/root.buster256, which is only loaded by c1ioo, so as to isolate the changes from the other front end machines.) The generated code then needed hand-edits to insert additional header files and linker options, so that the alternative controllers could be loaded from .so shared libraries. Also, the kernel parameters had to be set as described here, to allow the user-space controller to have a CPU core all to itself. Finally, isolating the core was done following the recipe in this script (skipping the parts related to docker, since we didn’t use it).
[Yuta, Anchal, Radhika]
Yesterday we attempted to lock MICH and BHD using the BH55_Q_ERR signal. We adjusted the demodulation phase to send the bulk of the error signal to the Q quadrature. With the LO beam misaligned, we first locked MICH with AS55_Q_ERR. We tried handing over the feedback signal to BH55_Q_ERR, which in theory should have been equivalent to AS55_Q_ERR. But this would not reduce the error and would instead break the MICH lock. Qualitatively the BH55_Q signal looked noisier than AS55_Q.
We used the Moku:Lab to send a 55 MHz signal into the demod board, replacing the BH55 RF input [Attachment 1]. The frequency was chosen to be 10 Hz away from the demodulation frequency (5x Marconi source frequency). However, a 10Hz peak was not visible from the spectra - instead, we observed a 60 Hz peak. Tweaking the frequency offset a few times, we realized that there must be a ~50Hz offset between the Moku:Lab and the Marconi.
We generated an X-Y plot of BH55_Q vs. AS55_DC with the MICH fringe: this did not follow a circle or ellipse, but seemed to incoherently jump around. Meanwhile the X-Y plot BH55_I vs. AS55_DC looked like a coherent ellipse. This indicated that something might have been wrong with the demod board producing the I and Q quadrature signals.
We fed the BH55 RF signal into an unused demod board (previously AS165) [Attachment 2] and updated the channel routing accordingly. This step recovered elliptical I and Q signals with Moku input signal, and their relative gain was adjusted to produce a circle X-Y plot [Attachment 3]. C1:LSC-BH55_Q_GAIN was adjusted to 155.05/102.90=1.5068, and measured diff C1:LSC-BH55_PHASE_D was adjusted to 94.42 deg.
Now BH55_Q_ERR was able to be used to lock the MICH DOF. However, BH55 still appears to be noisy in both I and Q quadratures, causing the loop to feedback a lot of noise.
The output matrices have been calculated on Aug 4, 2022 by me. [40m ELOG 17060]
Regarding the noise see [40m ELOG 17061]
With regard to the current IMC WFS design, a SURF student in 2014 (Andres Medina) and Nick Smith made the revision.
The telescope design was described in the elogs [40m ELOG 10410] [40m ELOG 10427] and also T1400670.
Tega has kindly made a summary page for the IMC WFS. Its in a tab on the usual summary pages.
One thing I notice is that the feedback to MC2 YAW seems to have very little noise. What's up with that?
The output matrix (attached) shows that the WFS have very little feedback to MC2 in YAW, but normal feedback in PIT. Has anyone recalculated this output matrix in the past ~1-2 years?
I'm going to read Prof. Izumi's paper (https://arxiv.org/abs/2002.02703) to get some insight.
The output matrix doesn't seem to have any special thing to make this happen. Any ideas on what this could be?
I have moved the following electronics / components to "Section Y10 beneath the tube"
During Wednesday’s lab clean up, we made a ton of progress in organization. Our main focus was to tackle CDS debris from the ongoing upgrade. We proceeded with the following tasks.
Attachment #2 shows that all the CDS equipment has been relocated behind Section X3 of the X-Arm.
Although we've usually used this empirical way to run the alignment, I'd prefer if we had an analytic / numerical model for it.
Radhika, coud you look into writing down the equations for how the various dithers show up in the various error signals into a Overleaf doc? I'm thinking about this currently for the IMC, so we can zoom about it next week once you've had a chance to think about it for a few days. It would be helpful to have this worked out for the 40m alignment for future debugging. Co-located dither and actuation is not likely the best way to do things from a noise and loop x-coupling point of view.
We proceeded with the TODO items from .
We tried to update the YARM ASS output matrix to appropriately feed back the ETM and ITM T error signals (input beam pointing) to actuate on PR2 and PR3. Using the existing matrix (used for actuating on TT1 and TT2) led to diverging error signals and big drops in transmission. We iteratively tried flipping signs on the matrix elements, but exhausting all combinations of parity was not efficent, since angular sign conventions could be arbitrary across optics.
We decided to go ahead with Yuta's suggestion of dithering on PR2 and PR3 for input beam pointing, instead of ETMY and ITMY. This would simplify the output matrix greatly since dithering and actuation would now be applied to the same optics. Anchal made the necessary model changes. We tried a diagonal identity submatrix (for input pointing) to map each error signal to the corresponding DOF. With the length (L) control loops disengaged, this configuration decreased all T error signals and increased YARM transmision. We then re-engaged the L loops: the final result is that YARM transmission reached just below 1 [Attachment 1].
c1mcs and c1ioo models have been updated to add new acquisition of data.
We found from https://ldvw.ligo.caltech.edu/ldvw/view that following channels with "WFS" in them are acquired at the sites:
These are most probably error signals of WFS1 and WFS2. At 40m, we have following channel names instead:
And similar for Q outputs as well. We also have chosen quadrature signals (signals after sensing matrix) at:
We added following testpoints and are acquiruing them at 1024 Hz:
For the transmission QPD at MC2, we found following acquired channels at the site:
We created testpoints in c1mcs.mdl to add these channel names and acquire them. Following channels are now available at 1024 Hz:
We started acquiring following channels for the 6 error signals at 1024 Hz:
We started acquiring following 6 control signals at 1024 Hz as well:
RXA: useful to know that you have to append "_DQ" to all of the channel names above if you want to find them with nds2-client.
In order to get C1:IOO-MC_TRANS_[DC/P/Y], we had to get rid of same named EPICS output channels in the model. These were been acquired at 16 Hz before this way. We then updated medm screens and autolocker config file. For slow outputs of these channels, we are using C1:IOO-MC_TRANS_[PIT/YAW/SUMFILT]_OUTPUT now. We had to restart daqd service for changes to take effect. This can be done by sshing into fb1 and running:
Now there is a convinient button present in FE overview status medm screen to restart DAQD service by a simple click.
Perhaps 1PPS around the PSL was used for the Rb standard to be locked to the GPS 1PPS.
If we need to drive multiple devices, we should use a fanout circuit to avoid distorting the 1PPS. -CW
The original fb1 now boots from its new drive, which is installed in a fixed drive bay and connected via SATA. There are no spare SATA power cables inside the chassis, so we’re temporarily powering it from an external power supply borrowed from a USB to SATA kit (see attachment).
The easiest way to eliminate the external supply would be to use a 4-pin Molex to SATA adapter, since the chassis has plenty of 4-pin Molex connectors available. Unfortunately those adapters sometimes start fires. The ones with crimped connectors are thought to be safer than those with molded connectors. However, the safest course will probably be to just migrate the OS partition onto the 2 TB device from the hardware RAID array, once we’re happy with it.
Historic data from the past frames should now be available, as should NDS2 access.
Starting to look into the timing issue:
List of remaining tasks to iron out various wrinkles with the upgrade:
The situation with the timing system is that we have not touched it at all in the upgrade, but have added a new diagnostic: Spectracom timing boards in each FE, to compare vs the ADC clock. So I expect that what we’re seeing now is not new, but may not have been noticed previously.
What we’re seeing is:
Possible issues stemming from unstable timing:
Thanks for pointing out that EPICS data collection (slow channels) was not working. I started the service that collects these channels (standalone_edc, running on c1sus), and pointed it to the channel list in /opt/rtcds/caltech/c1/chans/daq/C0EDCU.ini, so this should be working now.
controls@c1sus:~$ systemctl status rts-edc_c1sus
● rts-edc_c1sus.service - Advanced LIGO RTS stand-alone EPICS data concentrator
Loaded: loaded (/etc/systemd/system/rts-edc_c1sus.service; enabled; vendor preset: enabled)
Active: active (running) since Sun 2022-10-09 23:30:15 PDT; 10h ago
Main PID: 32154 (standalone_edc)
├─32154 /usr/bin/standalone_edc -i /etc/advligorts/edc.ini -l 0.0.0.0:9900
The IMC and the IMC WFS kept running for ~2days. 👍
I wanted to look at the trand of the IMC REFL DC, but the dataviewer showed that the recorded values are zero. And this slow channel is missing in the channel list.
I checked the PSL PMC signals (slow) as an example, and many channels are missing in the channel list.
So something is not right with some part of the CDS.
Note that I also reported that the WFS plot in the above refered previous elog has the value like 1e39
[Chris, Anchal, JC, Paco, Yuta]
sudo systemctl stop modbusIOC.service
sudo shutdown -h now
We finished all steps upto step 3 without any issue. We restarted all workstations to get the new nfs mount from New Chiara. Some other machined in lab might requrie restart too if they require nfs mounts. Note, c1sus was initially connected using a fiber oneStop cable that tested OK with the teststand IO chassis, but it still did not work with the c1sus chassis, and was reverted to a copper cable.
[Chris, Anchal, JC]
While doing step 4, we realized that all 8 drive bays in the existing fb1 are occupied by disks that are managed by a hardware RAID controller (MegaRAID). All 8 hard disks seem to be combined into a single logical volume, which is then partitioned and appears to the OS as a 2 TB storage device (/dev/sda for OS) and 23.5 TB storage device (/dev/sdb for frames). There was no free drive bay to install our OS drive from fb1 (clone), nor was there any already installed drive that we could identify as an "OS drive" and swap out, without affecting access to the frame data. We tried to boot fb1 with the OS drive from fb1 (clone) using multiple SATA to USB cables, but it was not detected as a bootable drive. We then tried to put the OS drive back in fb1 (clone) and use the clone machine as the 40m framebuilder temporarily, in order to work on booting up fb1 in parallel with the rest of the upgrade. We found that fb1 (clone) would no longer boot from the drive either, as it had apparently lost (or never possessed?) its grub boot loader. The boot loader was reinstalled from the debian 10 install thumbdrive, and then fb1 (clone) booted up and functioned normally, allowing the remainder of the upgrade to go forward.
Jamie investigated the situation with the existing fb1, and found that there seem to be additional drive bays inside the fb1 chassis (not accessible from the front panel), in which the new OS disk could be installed and connected to open SATA ports on the motherboard. We can try this possible route to booting up fb1 and restoring access to past frames next week.
We carried out the rest of the steps upto 7.3. We started all slow machines, some of them required reloading the daemons using:
We found that we were unable to ssh to c1psl, c1susaux, and c1iscaux. It turned out that chiara (clone) had a very outdated martian host table for the nameserver. Since Chris had introduced some new IPs for IPMI ports, dolphin switch etc, we could not simply copy back from the old chiara. So Chris used diff command to go through all changes and restored DNS configuration.
We were able to burt restore to Oct 7, 03:19 am point using the latest snapshot on New Chiara. All suspensions were being locally damped properly. We restarted megatron and optimus to get nfs mounts. All docker services are running normally, IMC autolocker is working and FF slow PID is working as well. PMC autolocker is also working fine. megatron's autourt cron job is running properly and restarted creating snapshots from 6:19 pm onwards.
After the CDS upgrade team called for a day (their work TBD), I took over the locked IMC to check how it looked like.
The lock was robust but the IMC REFL spot and the WFS DC/MC2 QPD were moving too much.
I wondered if there were something wrong with the damping. I thought MC3 damping seemed weak, but this was torelable level.LR
During the ring down check of MC2, I saw that the OSEM signals were glitchy. In the end I found it was LR sensor which was glitchy and fluctuating.
I went into the lab and pushed the connectors on the euro card modules and the side connectors as well as the cables on the MC2 sat amp.
I came back to the control room and found the MC2 LR OSEMs had the jump and it seems more stable now.
I leave the IMC locked & WFS running. This sus situation is not great at all and before we go too far, we'll work on the transition to the new electronics (but not today or next week).
By the way the unit of the signals on the dataviewer didn't make sense. Something seemed wrong with them.
[Yuta, Paco, Anchal]
We estimated meas diff angle for BH55 today by following this elog post. We used moku:lab Moku01 to send a 55 MHz tone to PD input port of BH55 demodulation board. Then we looked at I_ERR and Q_ERR signals. We balanced the gain on I channel to 1.16 to get the two signals to same peak to peak heights. Then we changed the mead diff angle to 91.97 to make the "bounding box" zero. Our understanding is that we just want the ellipse to be along x-axis.
We also aligned beam input to BH55 bit better. We used the single bounce beam from aligned ITMY as the reference.
We attempted to lock LO phase with just using BH55 demodulated output.
We expected that we would be able to lock to 90 degree LO phase just like DC locking. But now we understand that we can't beat the light with it's own phase modulated sidebands.
The confusion happened because it would work with Michelson at the dark port output of michelson, amplitude modulation is generated at 55 MHz. We tried to do the same thing as was done for DC locking with single bounce and then michelson, but we should have seen this beforehand. Lesson: Always write down expectation before attempting the lock.
Chris and I discussed our plan for CDS upgrade which amounts to moving new FEs, new chiara, and new FB1 OS system tomartian network.
Date: Fri Oct 7, 2022
Time: 11:00 am (After coffee and donuts)
Minimum required people: Chris, Anchal, JC (the more the merrier)
BH55 RFPD installation was still not complete until yesterday because of a peculiar issue. As soon as we would increase the whitening gain on this photodiode, we saw spikes coming in at around 10 Hz. Following events took place while debugging this issue:
The installation of BH55 RFPD is complete now.
Last night’s CDS upgrade attempt succeeded in taking over the IFO. If the IFO users are willing, let’s try to run with it today.
The new system was left in control of the IFO hardware overnight, to check its stability. All looks OK so far.
The next step will be to connect the new FEs, fb1, and chiara to the martian network, so they’re directly accessible from the control room workstations (currently the system remains quarantined on the teststand network). We’ll also need to bring over the changes to models, scripts, etc that have been made since Tega’s last sync of the filesystem on chiara.
The previous elog noted a mysterious broken state of the OneStop link between FE and IO chassis, where all green LEDs light up on the OneStop board in the IO chassis, except the four next to the fiber link connector. This was seen on c1sus and c1iscex. It was recoverable last night on c1iscex, by fully powering down both FE computer and chassis, waiting a bit, and then powering up chassis and computer again. Currently c1sus is running with a copper OneStop cable because of the fiber link troubles we had, but this procedure should be tried to see if one of the fiber links can be made to work after all.
In order to string the short copper OneStop cable for c1sus, we had to move the teststand rack closer to the IO chassis, up against the back of 1X6/1X7. This is a temporary state while we prepare to move the FEs to their new rack. It hopefully also allows sufficient clearance to the exit door to pass the upcoming fire inspection.
At first, we connected the teststand rack’s power cables to the receptacle in 1X7, but this eventually tripped 1X7’s circuit breaker in the wall panel. Now, half of the teststand rack is on the receptacle in 1X6, and the other half is on 1X7 (these are separate circuits).
After the breaker trip, daqd couldn’t start. It turned out that no data was flowing to it, because the power cycle caused the DAQ network switch to forget a setting I had applied to enable jumbo frames on the network. The configuration has now been saved so that it should apply automatically on future restarts. For future reference, the web interface of this switch is available by running firefox on fb1 and navigating to 10.0.113.254.
When the FE machines are restarted, a GPS timing offset in /sys/kernel/gpstime/offset sometimes fails to initialize. It shows up as an incorrect GPS time in /proc/gps and on the GDS_TP MEDM screens, and prevents the data from getting timestamped properly for the DAQ. This needs to be looked at and fixed soon. In the meantime, it can be worked around by setting the offset manually: look at the value on one of the FEs that got it right, and apply it using sudo sh -c "echo CORRECT_OFFSET >/sys/kernel/gpstime/offset".
sudo sh -c "echo CORRECT_OFFSET >/sys/kernel/gpstime/offset"
In the first ~30 minutes after the system came up last night, there were transient IPC errors, caused by drifting timestamps while the GPS cards in the FEs got themselves resynced to the satellites. Since then, timing has remained stable, and no further errors occurred overnight. However, the timing status is still reported as red in the IOP state vectors. This doesn’t seem to be an operational problem and perhaps can be ignored, but we should check it out later to make sure.
Also, the DAC cards in c1ioo and c1iscey reported FIFO EMPTY errors, triggering their DACKILL watchdogs. This situation may have existed in the old system and gone undetected. To bypass the watchdog, I’ve added the optimizeIO=1 flag to the IOP models on those systems, which makes them skip the empty FIFO check. This too should be further investigated when we get a chance.
[Jamie, JC, Chris]
Today we made a failed attempt to take over the 40m hardware with the new front ends on the test stand.
As an initial test, we connected the new c1iscey to its I/O chassis using the OneStop fiber link. This went smoothly, so we tried to proceed with the rest of the system, which uncovered several problems. Consequently, we’ve reverted control back to the old front ends tonight, and will regroup and make another attempt tomorrow.
There are various pathologies that we've seen with the OneStop interface cards in the I/O chassis. We don't seem to have the documentation for these cards, but our interpretive guesses are as follows:
Tomorrow, we plan to swap out the c1iscex I/O chassis for the one in the test stand, and see if that lets us get the full system up and running.
We started the day by taking a spectrum of C1:HPC-LO_PHASE_IN1, the BHD error point, and confirming the absence of 268 Hz peaks believed to be violin modes on LO1. We then locked the LO phase by actuating on LO2, and AS1. We couldn't get a stable loop with AS4 this morning. In all of these trials, we looked to see if the noise increased at 268 Hz or its harmonics but luckily it didn't. We then decided to add the necessary output filters to avoid exciting these violin modes. The added filters are in the C1:SUS-LO1_LSC bank, slots FM1-3 and comprise bandstop filters at first, second and third harmonics observed previously (268, 536, and 1072 Hz); bode plots for the foton transfer functions are shown in Attachment #1. We made sure we weren't adding too much phase lag near the UGF (~ 1 degree @ 30 Hz).
We repeated the LO phase noise measurement by actuating on LO1, LO2 and AS1, and observe no noise peaks related to 268 Hz this time. The calibrated spectra are in Attachment #2. Now the spectra look very similar to one another, which is nice. The rms is still better when actuating with AS1.
After the above work ended, I tried enabling FM1-3 on the C1:HPC_LO_PHASE control filters. These filters boost the gain to suppress noise at low frequencies. I carefully enabled them when actuating on LO1, and managed to suppress the noise by another factor of 20 below the UGF of ~ 30 Hz. Attachment #3 shows the screenshot of the uncalibrated noise spectra for (1) unsupressed (black, dashed), (2) suppressed with FM4-5 (blue, solid), and (3) boosted FM1-5 suppression (red).