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ID Date Author Type Category Subject
  15257   Thu Mar 5 19:51:14 2020 gautamUpdateElectronicsIMC Servo board being tested

I am running some tests on the IMC servo board with an extender card so the IMC will not be locking for a couple of hours.

  15256   Thu Mar 5 19:45:23 2020 JonSummaryPSLC1PSL in-situ test results

We've completed almost all of the in-situ testing of the c1psl channels. During this process, we identified several channels which needed to be rewired to different Acromags (BIO sinking v. sourcing). We also elected to change the connector type of a few channels for practical advantages. Those modifications and other issues found during testing are detailed below. Also attached are the updated channel assignments, with a column indicating the in-situ testing status of each channel.

Post-installation modifications

  • All four channels connected to the sourcing BIO module were found to in fact require sinking I/O. They were reassigned to sinking BIO modules. Affected channels:
    • C1:PSL-FSS_FASTSWEEP
    • C1:PSL-FSS_SW1
    • C1:PSL-FSS_SW2
    • C1:PSL-PSL_Shutter
  • Added a new AI channel:
    • C1:PSL-FSS_MIXERM
  • Removed an unneccessary AI channel:
    • C1:PSL-FSS_LODET
  • Moved two AI channels from BNC connectors to a new Dsub connector (labelled DB25M-2 in the spreadsheet).
    • C1:PSL-FSS_RCTEMP
    • C1:PSL-FSS_RMTEMP_VOLTS

Issues identified during testing

  • Digital calibration. The following channels work, but we need to verify their EPICS calibration parameters (EGUF/EGUL):
    • C1:PSL-FSS_FASTGAIN
    • C1:PSL-FSS_FAST
    • C1:PSL-PMC_RFADJ
    • C1:PSL-PMC_MODET
  • IMC servo board. The Acromag channels themselves were found to work, but the linearity of the mbbo gain stages are in question (i.e., a potential problem with the board). GV is currently testing the servo board.
  • PSL QPD board apears to be dead. We connected a scope directly to the test points on the board and measured a high level of noise and no signal (for all four of the QPD channels). I understand this QPD has not been used in some time, so it may not have been noticed before.
  • WFS DC channels are saturating when the IMC is unlocked. The acceptance range of the Acromag ADC is only +/-10 V, but we measured sensor voltages as high as ~14 V. It appears that the old ADCs were somehow accepting a range of 0 to +20 V instead of -10 to +10 V. However, the Acromags do not support the input range 0-20 V. Since SNR is not critical for these channels (they're used only for initial alignment), I propose we simply install a voltage divider inside the chassis, just before the Acromag, for each of these signals.
  15255   Thu Mar 5 15:03:48 2020 YehonathanUpdateElectronicsPSL Shutter and PMC TRANSPD working

[Jon, Yehonathan]

Summary

With the Acromag chassis now permanently installed, we tested the C1PSL channels going over the channel list one by one, excluding the IMC channels which Gautam is taking responsibility for (the servo board itself is also in question).

The strategy is to check the response of input channels to specific output channels for expected behaviour whenever is possible.

We marked on the channel list spreadsheet the status of the channels that were tested.

In more detail

FSS

Channels under test What was done
C1:PSL-FSS_SW1 Switched C1:PSL-FSS_SW1 and observed the IMC unlock
C1:PSL-FSS_SW2, C1:PSL-FSS_MIXERM Connected a signal to Test2 on FSS box and observed a proportional change on C1:PSL-FSS_MIXERM
C1:PSL-FSS_INOFFSET Disconnected feedback by switching C1:PSL-FSS_SW1. Tweaked C1:PSL-FSS_INOFFSET and observed a proportional response in C1:PSL-FSS_MIXERM
C1:PSL-FSS_MGAIN, C1:PSL-FSS_PCDRIVE Disconnected feedback, turned on some offset using C1:PSL-FSS_INOFFSET. Tweaked C1:PSL-FSS_MGAIN and observed a response in C1:PSL-FSS_PCDRIVE
C1:PSL-FSS_SLOWDC, C1:PSL-FSS_SLOWM Disconnected feedback. Tweaked C1:PSL-FSS_SLOWDC and obsereved a proportional response in C1:PSL-FSS_SLOWM
C1:PSL-FSS_FASTGAIN, C1:PSL-FSS_FAST Disconnected feedback, turned on some offset using C1:PSL-FSS_INOFFSET. Tweaked C1:PSL-FSS_FASTGAIN and obsereved a response in  C1:PSL-FSS_FAST

 

Frequency Ref

Channels under test What was done
C1:PSL-PMC_PHCON Observed the PMC unlocks when a big change in C1: PSL-PMC_PHCON is made
C1:PSL-PMC_RFADJ, C1:PSL-PMC_MODET Tweaked C1:PSL-PMC_RFADJ and obsereved a proportional response in C1:PSL-PMC_MODET
C1:PSL-PMC_PHFLIP Observed the PMC unlock when C1:PSL-PMC_PHFLIP is switched

 

PMC Servo Card

Channels under test What was done
C1:PSL-PMC_SW1, C1:PSL-PMC_PMCERR, C1:PSL-PMC_INOFFSET, C1:PSL-PMC_PZT Unlocked the PMC by switching C1:PSL-PMC_SW1. Tweaked C1:PSL-PMC_INOFFSET and observed a proportional change in C1:PSL-PMC_PMCERR and C1:PSL-PMC_PZT
C1:PSL-PMC_BLANK Observed the PMC unlock with when C1:PSL-PMC_BLANK is switched
C1:PSL-PMC_GAIN Unlocked the PMC by switching C1:PSL-PMC_SW1. Turned on some offset using  C1:PSL-PMC_INOFFSET. Tweaked C1:PSL-PMC_GAIN and observed response in C1:PSL-PMC_PZT
C1:PSL-PMC_SW2 Unlocked the PMC by switching C1:PSL-PMC_SW1. Connected a signal to TP2 on the PMC card and observed a proportional change in C1:PSL-PMC_PZT.
C1:PSL-PMC_RAMP

Unlocked the PMC by switching C1:PSL-PMC_SW1. Tweaked C1:PSL-PMC_RAMP and observed a change in C1:PSL-PMC_PZT.

C1:PSL-PMC_RFPDDC Observed a high value 0.5V when PMC is unlocked and a low value 0.03V when it is locked

 

WFSs

Channels under test What was done
C1:IOO-WFS*_SEG*_ATTEN

We misaligned MC1 to get a measurable signal in WFS channels. NDScoped the corresponding C1:IOO-WFS*_SEG*_I&Q channels and observed a change in those channels in response to switching the attenuation on and off.

C1:IOO-WFS*_LO_LOCK_MON Disconnected the LO cable from the WFS boards and observed C1:IOO-WFS*_LO_LOCK_MON go to zero.
C1:IOO-WFS*_SEG*_I&Q Connected a short SMA cable to the 29.5MHz frequency distribution board. Attenuated the signal by 20db and connected it to the different SEG channels one at a time and observed a response in C1:IOO-WFS*_SEG*_I&Q channels.
C1:IOO-WFS*_SEG*_DC We shined a laser pointer to the different quadrants and observed saturation in the corresponding C1:IOO-WFS*_SEG*_DC with no cross talks.

MC Servo

Channels under test What was done
C1:IOO-MC_SW1, C1:IOO-MC_OPTIONA, C1:IOO-MC_POL, C1:IOO-MC_OPTIONB,C1:IOO-MC_FASTSW These switches unlocked the IMC when flipped.
C1:IOO-MC_SW2, C1:IOO-MC_SUM_MON, C1:IOO-MC_SLOW_MON, C1:IOO-MC_FAST_MON A sine wave signal was injected in IN2 on the servo board. C1:IOO-MC_SW2 was switched on and the value of C1:IOO-MC_SUM_MON, C1:IOO-MC_SLOW_MON and C1:IOO-MC_FAST_MON changed accordingly.
C1:IOO-MC_SW3 Connected a scope to OUT2 on the servo board. Switched C1:IOO-MC_SW3 on and observed a signal on the scope.
C1:IOO-MC_EXCA_EN Unlocked the IMC by switching C1:IOO-MC_SW1 off. Connected a signal to EXC A and a scope to TP2A on the servo board and observed the signal on the scope when C1:IOO-MC_EXCA_EN was switched on.
C1:IOO-MC_EXCB_EN Unlocked the IMC by switching C1:IOO-MC_SW1 off. Connected a signal to EXC B and a scope to TP2B on the servo board and observed the signal on the scope when C1:IOO-MC_EXCB_EN was switched on.
C1:IOO-MC_REFL_OFFSET Unlocked the IMC by switching off. Tweaked C1:IOO-MC_REFL_OFFSET and observed a proportional change in C1:IOO-MC_SUM_MON.
C1:IOO-MC_LATCH_EN Tweaked the VCO gain slider and observed the latch switch off and on.
C1:IOO-MC_LIMIT Unlocked the IMC by switching C1:IOO-MC_SW1 off. Connected a sine wave signal to EXC B and enabled C1:IOO-MC_EXCB_EN. Ramped up the VCO gain. Raised the sine wave amplitude until C1:IOO-MC_LIMIT turned on.
C1:IOO-MC_LIMITER We ramped the VCO such that C1:IOO-MC_LIMIT was switched on. We switched C1:IOO-MC_LIMITER on and observed C1:PSL-FSS_MIXERM high value go down.

NPRO Diagnostics

Channels under test What was done
C1:PSL-NPRO_*

The signals were compared to previous values for consistency. Then they were unplugged from the Acromag chassis to confirm their values went to 0 and returned to the same values after being reconnected.

  15254   Thu Mar 5 11:27:48 2020 gautamUpdateElectronicsC1PSL acromag crate is no longer sitting on the floor

[jordan, gautam]

The C1PSL crate has now been installed in a more permanent way in the rack.

  • Top and bottom covers were re-attached after work yesterday.
  • +/- 24 V DC and +15 V DC power connectors were screwed on for better robustness (I had removed the fuse for the -24V supply as part of debugging yesterday, this was reconnected).
  • PSL diagnostics DB 25 cable was re-run appropriately over the cable tray and connected to the unit.
  • The chassis sits on some rails - these rails are mounted to the rack using rack nuts but that means the ears on the Acromag chassis no longer line up with any rack nut slots, and so the chassis is not bolted on to the rack.
  • We also took this opportunity to remove the c1iool0 VME chassis from 1X2 - given that the DAC and BIO cards of c1ioo (rtcds system) are unused, I felt comfortable disconnecting them and that made the removal relatively easy. The CDS overview MEDM screen reports no errors after this work.

After this work, I disabled logging and restarted the modbus service (and copied the current version of the systemd service file to the target directory for backup). The PMC and IMC lock alright. The system is now ready to be tested in-situ. I will separately continue my IMC Servo board tests in the evening.

One thought about how to protect against this kind of silent failure - how about we always run the modbus service with logging enabled, and then send out a warning email and stop the service if the logfile size suddenly blows up (which is characteristic of when the communications process dies)? This should be done in addition to the ping-ing of the individual IPs.

Regarding the burt-restore step that the systemd service runs after starting up the IOC - this is not even that useful, at least in the way it is currently setup (restore the "latest" burt snapshot file). If the maintenance takes >1hour as it often does, the "latest" snapshot for the system under maintenance is just garbage. So either the burt-restore should be for a "known good time" (dangerous because this will require frequent updates of the systemd service every time we find a new safe state) or we should just do it manually (my preference). Then there is no need to install custom packages on the server machine. Anyway, for now, I have not commented this step out.

Jordan is going to take pictures of all the electronics racks and update the relevant wiki pages.

Quote:

Jon is going to write up the details of todays adventures. But the C1PSL Acromag chassis is sitting on the floor between the IMC beamtube and the 1X1 electronics rack, and is very much a trip hazard. Be careful if youre in that area.

  15253   Wed Mar 4 22:38:31 2020 JonUpdatePSLc1psl communications problem resolved

I investigated the problem reported earlier today with the BIO1 channels. By logging the systemd messages generated when the IOC starts, I was immediately able to determine that the problem was not limited to BIO1. The modbus communications were failing for several other units as well.

Because some in-situ rewiring of a handful of channels had recently been done (more on this soon), I initially suspected that one of the Acromags had been damaged in the process. However, removing BIO1 (or other non-communicating modules) did not restore communications with the rest of the modules. To test whether the chassis was the source of the problem at all, we set up a fresh ADC (new out of the package) and directly connected it to the secondary Ethernet interface of c1psl. With only the one new ADC connected, the modbus IOC failed in exactly the same way.

To confirm that the new ADC did in fact work, we connected it to c1auxex in the same configuration. The unit worked fine connected to c1auxex. This established that the source of the problem was the c1psl host. After some extensive debugging, I traced the problem to a pre-execution script (part of the modbus IOC systemd service) which resets the secondary network interface (the one connected to the Acromag chassis) prior to launching the IOC. This was to ensure the secondary interface always had the correct IP address. It appears this reset was somehow creating a race condition that allowed the modbus initializations (first communications with the Acromags) to sometimes start before the network interface had actually come back up.

I still don't understand how this was happening, or why the pre script worked just fine up until yesterday, but eliminating the network interface reset fixes the problem in 100% of the trials we ran. Unfortunately we lost the entire day to debugging this problem, so the final round of testing is still to be completed. We plan to pick it back up tomorrow afternoon.

  15252   Wed Mar 4 21:02:49 2020 KojiUpdateElectronicsMore cabling removed

We are going to replace the old Sun c1ioo with a modernized supermicro. At the opportunity, remove the DAC and BIO cards to use them with the new machines. BTW I also have ~4 32ch BIO cards in my office.

  15251   Wed Mar 4 20:42:53 2020 gautamUpdateElectronicsC1PSL acromag crate is sitting on the floor

Jon is going to write up the details of todays adventures. But the C1PSL Acromag chassis is sitting on the floor between the IMC beamtube and the 1X1 electronics rack, and is very much a trip hazard. Be careful if youre in that area.

  15250   Wed Mar 4 16:54:43 2020 gautamUpdateCDSc1auxex temporarily disconnected

To debug a problem with the new c1psl (later elog), we needed a Supermicro EPICS server that was using the shared EPICS/modbus/asyn binaries rather than a local install. Of those available in the lab (c1iscaux, c1vac, c1susaux being the others), this was the only one which uses the shared install. So I 

  • turned the slow bias voltages to 0
  • shutdown the watchdog
  • disconnected the Acromag crate in 1X9 from the 192.168.114.xxx subnet at the supermicro end
  • connected a test ADC to the local subnet using a different ethernet cable (leaving the original one dangling)
  • ran some software tests to see if we could open up a communication line to the test ADC using modbus without any errors being thrown
  • removed the test ADC and restored the ethernet connection.

At which point Jon reset the software end, I restored the slow bias voltage and re-enabled the local damping. The optic seems to have damped okay. The Oplev spot is back in ~center of the QPD and the green beam can be locked to a TEM00 mode (so the alignment is okay - the IR beam is unavailable while c1psl issues are being sorted but I judge that things are back to the nominal state now).

  15249   Wed Mar 4 16:18:31 2020 gautamUpdateElectronicsMore cabling removed

After discussing with Koji, I removed the PZT driver and associated AI card from the Eurocrate at 1X2. The corresponding backplane connectors were also removed from the cross connects. An additional cable going from the DAC to IDC adaptor on 1X2 was removed. Finally, some cables going to the backplane P1 and P2 connectors for slots in which there were no cards were removed. 

Finally, there is the IMC WFS whitening boards. These were reconfigured in ~2016  by Koji to have (i) forever whitening, and (ii) fixed gain. So the signals from the P1 connector no longer have any influence on the operation of this board. So I removed these backplane cables as well.

Some pics attached. The only cross connect cabling remaining on the south side of 1X2 is going to the fast BIO adaptor box - I suspect these are the triggered fast whitening switching for the aforementioned WFS whitening board. If so, we could potentially remove those as well, and remove all the cross connects from 1X1 and 1X2.

Update 1720: indeed, as Attachment #2 shows, the RTCDS BIO channels were for the WFS whitening switching so I removed those cables as well. This means all the xconnects can be removed. Also, the DAC and BIO cards in c1ioo are unused.

Quote:

Do we want to preserve the ability to use the PZT driver in 1X2?

  15248   Wed Mar 4 12:25:11 2020 gautamUpdateCDSBIO1 on c1psl is dead

There was some work done on the Acro crate this morning. Unclear if this is independent, but I found that the IMC servo board IN1 slider doesn't respond anymore, even though I had tested it and verified it to be working. Patient debugging showed that BIO1 (and only that acromag unit with the static IP 192.168.114.61) doesn't show up on the subnet in c1psl. Hopefully it's just a loose network cable, if not we will switch out the unit in the afternoon. 

Jon is going to make a python script which iteratively pings all devices on the subnet and we will put this info on an MEDM screen to catch this kind of silent failure.

  15247   Wed Mar 4 11:16:37 2020 gautamUpdatePSLPMC realignment

I realigned the input pointing into the PMC this morning. Usually, the way I do this is to minimize any discernible mode structure in the PMC reflection CCD image. Today, I noticed that making the DC reflection go down also makes the DC transmission go down. Possibilities:

  • we are sampling slightly different spots inside the PMC cavity which change the buildup by ~2-3%.
  • we are misaligned on the transmission/reflection photodiode.
  • ??
  15246   Wed Mar 4 11:10:47 2020 YehonathanUpdateComputersAllegra revival

Allegra had no network cable and no mouse. We found Allegra'snetwork cable (black) and connected it.

I found a dirty old school mouse and connected it.

I wiped Allegra and now I'm currently installing debian 10 on allegra following Jon's elog.

04/01 update: I forgot to mention that I tried installing cds software by following Jamie's instruction: I added the line in /etc/apt/sources.list.d/lscsoft.list: "deb http://software.ligo.org/lscsoft/debian/ stretch contrib". But this the only thing I managed to do. The next command in the instructions failed.

  15245   Tue Mar 3 19:11:48 2020 gautamUpdateLSCSome locking prep
  • Re-aligned and locked the arm cavities for IR and green.
  • Re-set trans normalization because after the c1iscex and c1iscey reboots, these didn't come back to the old values.
  15244   Tue Mar 3 18:11:05 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

Revised noise estimates, correcting a couple of factor of 2 and factor of pi errors found in the coil driver noise calculation. Also resolves a strain vs. displacement units confusion using the new pygwinc. Gautam and I have checked these noises against the analytical predictions and believe they are now accurate. Attachments are again:

Attachment 1: Phase quadrature

Attachment 2: Amplitude quadrature

Attachment 3: Comparison to aLIGO design (phase quadrature)

  15243   Tue Mar 3 17:59:33 2020 YehonathanUpdateElectronicsPSL Shutter and PMC TRANSPD working

I used existing BNC cables running from the PSL table to the PSL rack and reassigned them to the PSL Shutter and PMC transmission PD channels.

The PSL shutter turned out to be a sinking channel. Jordan reconnected the PSL shutter wires to a sinking BIO Acromag. Channel list is updated.

Both channels have been tested to be working as expected.


gautam add on about EPICS:

  • the PSL shutter channels were previously hosted on c1aux.
  • I didn't comment out the original database entries on c1aux because we changed the prefix for all these channels - i.e. C1:AUX-PSL_Shutter --> C1:PSL-PSL_Shutter.
  • Modified the LSC offset script to close/open the PSL shutter by writing to the correct channel now.
  • there is some EPICS logic that checks the main volume pressure and prevents the opening of the PSL shutter if the main volume pressure is between 0.003 torr and 500 torr. I preserved this capability (so there are some associated soft channels in the database as well).

P.S - there is a problem we noticed - if the modbus process is started with the local subnet not having a fixed IP address, then all the EPICS channels will not be responsive. The way to fix this is to run the following sequence of commands:

sudo systemctl stop modbusIOC.service
sudo ifdown enp4s0
sudo ifup enp4s1
sudo ssytemctl start modbusIOC.service
  15242   Tue Mar 3 17:20:14 2020 gautamUpdateElectronicsMore cabling removed

Jordan and I removed another 10 kg of cabling from 1X2. The c1iool0 crate now has all cabling to it disconnected - but it remains in the rack because I can't think of a good way to remove it without disturbing a bunch of cabling to the fast c1iool0 machine. We can remove it the next time the vertex FEs crash. Cross connects have NOT been removed - we will identify which cross connects are not connected to the fast system and trash those. 

Do we want to preserve the ability to use the PZT driver in 1X2?

  15241   Mon Mar 2 23:49:03 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

Updated noise budget curves, now computed using the latest version of pygwinc. This resolves the inconsistency between the gwinc quantum noise curves and Gautam's analytic calculations. As before, the key configuration parameters are listed in the figure titles.

Attachment 1: Phase quadrature

Attachment 2: Amplitude quadrature

Attachment 3: Comparison to aLIGO design (phase quadrature)

Quote:

The quantum noise curves here are not correct. c.f. amplitude quadrature noise budget.

  15240   Mon Mar 2 19:32:41 2020 gautamUpdateCDSc1rfm errors

Had to reboot both end machines and the c1rfm model to get the TRX and TRY signals to the LSC models. Now both arms can be locked using POX/POY respectively.

  15239   Mon Mar 2 16:35:12 2020 gautamUpdateCDSc1psl test status

Channel list with test status
== Test Status ==

[done] Lock PMC and IMC
[done] IMC Servo board test
[done] IMC LO Det Mon channel check
[0th order] WFS quadrant DC mon
[none] WFS I/F monitors
[0th order] WFS attenuators
[none] IOO QPD channels
[done] FSS readbacks 
[done] PMC readbacks


Some more detailed elogs about the individual tests will follow.

Basically, I have characterized the IMC Servo board in detail. The summary finding is that the IN2 (=AO gain) slider needs to be investigated. 

All other channels need to be verified in a more thorough fashion than my basic checks which were just to guarantee the core interferometer functionality, which is important to me.

  15238   Mon Mar 2 16:29:40 2020 gautamUpdateElectronicsc1psl VME crate removed, Acro-crate installed

[JV, JWR, YD, GV]

  • The old c1psl VME crate, and all the ribbon cables connected to it were removed from 1X1. They are presently dumped in the office area - we will clear these in the next few days, once the c1iool0 crate also gets removed from the rack.
  • The Acromag crate was capped on the top and bottom, had ears bolted on, and was installed on support rails in the newly cleared up space.
  • The strange orientation of the crate (with the intended backside facing the front of the rack) is to facilitate easy access to the "spare" channels we have in this box, e.g. for a future ISS or laser amplifier.
  • Remaining connections to make are (these will be done tomorrow along with the extrication of the c1iool0 VME crate):
    • PMC trans PD
    • FSS RMTEMP 
    • PSL shutter
    • 2W Mephisto diagnostic connector
    • 24 V DC from Sorensens via DIN connector (we are waiting on a new power cable to arrive).
  15237   Mon Mar 2 16:14:47 2020 gautamUpdateCDSsome target directory cleanup

$TARGET_DIR = /cvs/cds/caltech/target

  • $TARGET_DIR/c1psl and $TARGET_DIR/c1iool0 moved to $TARGET_DIR/preAcromag_oldVME/
  • $TARGET_DIR/c1psl1 moved to $TARGET_DIR/c1psl 
  • $TARGET_DIR/c1psl/*.service and $TARGET_DIR/C1_PSL.cmd modified - i executed :%s/c1psl1/c1psl/g in vim.
  • $TARGET_DIR/preAcromag_oldVME/c1psl/autoBurt.req and $TARGET_DIR/preAcromag_oldVME/c1iool0/autoBurt.req catenated into $TARGET_DIR/c1psl/autoBurt.req. The first snapshot at 16:19 has been verified.

It remains to (Jon is taking care of these)

  • add a line to modbusIOC.service on the new c1psl machine that restores the latest burt snapshot on startup (this necessitated installation of a debian jessie libXp6 package on our debian buster machine because our shared EPICS is soooooooooooooo oooooooold)
  • change the hostname from c1psl1 to c1psl
  • update martian.hosts
  15236   Fri Feb 28 19:37:18 2020 gautamUpdatePSLNew c1psl installed
  1. The new c1psl Acromag crate is now interfaced to the Eurocrate electronics in 1X1 (formerly VME c1psl) and 1X2 (formerly c1iool0).
  2. The PMC and IMC can be locked. We will investigate stability / duty cycle over the weekend.
  3. There were a few issues with the wiring - specifically, the worng kind of Acromag BIO unit (sourcing, whereas we want sinking) was used for the FSS board switches. Once Jordan fixed this issue, the IMC could be locked.
  4. I began to do the detailed tests of the IMC Servo card channels - there may be some issues with the boost stages, but I ran out of time yesterday, so tbc Monday.

On Monday, we will remove the old c1psl and c1iool0 machines from the electronics rack and install the Acromag crate in a more permanent way. We will also clean up some of the old cabling and cross connects, althoug the situation seems so complicated (some cross connects are also used by the rtcds c1ioo expansion chassis) that I am inclined not to remove any cables.

The area around 1X1/1X2 has a lot of dangling cables and general detritus. Be careful if you are walking around there. We will clean up on monday.

  15235   Fri Feb 28 10:04:41 2020 gautamUpdatePSLc1psl setup setup

Summary:

There are several problems evident already.

  1. Several EPICS database entries were missing. WTF.
  2. After fixing the missing entries, the PMC could be locked. However, the IMC could not be locked.
  3. I think the FSS Interface card is not configured correctly.

For now, I've returned the old c1psl connections, the PMC and IMC are both locked. Need to do some debugging on the bench.

  15234   Fri Feb 28 08:05:22 2020 gautamUpdatePSLc1psl setup setup

And so it begins.

Quote:

Barring objections, tomorrow (Friday 28 Feb 2020) morning I will commence the switch

  15233   Thu Feb 27 22:45:40 2020 gautamUpdateALSALS noise high

There was some UNELOGGED work at EX today. The DFD outputs were also hijacked for loss measurement. Unclear who the culprit was, but there is now a broad noise bump centered around ~180 Hz in the ALS X noise curve, which certainly wasn't there yesterday. Maybe let's keep the few working systems working, it is annoying to have to deal with these auxiliary issues every night. I'll push ahead with locking, hopefully the ALS noise is "good enough".

  15232   Thu Feb 27 17:59:02 2020 gautamUpdateLSCSome AO thoughts

While my checks of the AO signal path have thrown up some unanswered questions, I don't think there's any evidence in those measurements to suggest the AO crossover can't be realized. Thinking about it today though - I was wondering if it could be that the IN1 gain slider of the CM board is configured optimally. Looking back at some data, when the ALS CARM offset is zeroed, the CM_SLOW digitized data has a peak-to-peak range of ~200 cts. This is paltry. One possibility is that as I am upping the AO path gain, I'm simply injecting the electronics noise of the CM board into the IMC error point. I'd say it is safe to up the IN2 gain by 20dB to -12 dB, in which case the peak-to-peak would be ~2000 cts, still only 10% of the ADC range. It'll be straightforward to re-scale the CARM_B loop gain to account for this. Let's see if this helps.

I'd also like to measure the spectrum of the REFL11_I signal in a few different states. I think I should be able to do this using the OUT2 of the CM servo board. These are the things to try tonight:

  • Try CARM RF handoff with CM_SLOW gain starting at -12dB instead of -32dB.
  • Measure spectrum of REFL11_I when it is in the linear range.
  15231   Thu Feb 27 17:50:36 2020 gautamUpdatePSLc1psl setup setup

[many people]

in prep for the install tomorrow, we did the following:

  • Install the c1psl Supermicro in the 1X2 rack (Attachment 1). To make room we removed the anti-image filter and mounted it on the OMC rack.
  • Set up a local workstation (monitor+mouse+keyboard) for the Supermicro so we can do some local testing (Attachment 2).
  • Clear up the immediate area around the 1X1/1X2 rack, setup a cart for the Acromag.
  • Make sure there are sufficient adaptor boards cables (DB37, DB15, DB9, DB25, ethernet) etc available at the cart.
  • Label cables, connect on Acromag chassis end (Attachment 3).
  • Keep some large (A3) printouts of the channel mapping handy by the cart.
  • made sure we have open fuse-able DIN rail connectors for +/-15 V DC and +/-24 V DC for the Acromag box (we are waiting on some thinner gauge cabling for the 24V supply, once that arrives, we will power the box from the Sorensens. For now, they are powered by bench supplies on the cart).
  • made sure c1psl1 (still this name for the Supermicro) is ssh-able.

Barring objections, tomorrow (Friday 28 Feb 2020) morning I will commence the switch (I still want to work on the IFO tonight).

  15230   Thu Feb 27 15:50:37 2020 gautamUpdateElectronicsFSS box power cable removed

In 1X1, there is a box labelled "FSS REF" below a KEPCO HV supply. This box had a power cable that wasn't actually connected to any power. I removed said cable.

  15229   Wed Feb 26 23:50:51 2020 gautamUpdateIOOIMC checks

In the style of the KA characterization of the CM board, the AO path gain EPICS slider (IN2) of the IMC servo board was stepped by 1 dB through the full available range of -32 dB to +31 dB. For each value of the requested gain, I measured the TF from the injected signal (to IN2) to TP1A on the IMC servo board. I used the BNC connector for this test, whereas we use the LEMO connector for the AO path. The source was tee-d off at the SR785 side, with one leg going to IN2 of the IMC servo board, and the other going to CH1A of the SR785. TP1A of the IMC board was connected to CH2A of the SR785. 

Attachment #1 - Measured gain vs requested gain.

  • When debugging the CM board, it was this kind of test that revealed the faulty latch ICs.
  • -12 dB to -11 dB gain step looks anomalous, but overall the trend seems linear.
  • I was confused by why there should be a discontinuity at this stage of the gain stepping - seems like the scanning script I use changes the SR785 excitation amplitude at this point (from 300mV to 100mV). But why should the size of the excitation signal change the magnitude of the transfer function? Is this indicative of some loading issue?
  • There is an overall offset between the requested gain and measured gain of ~2-3 dB. This seems large.
  • There is nothing in the schematic which would have me expect this - there is a 1/2 divider at the positive input of the differential receiving stage, but this just cancels out the non-inverting gain of x2.

Attachment #2 - Frequency dependent transfer functions

  • There seem to be two families of curves - they correspond to <-12 dB and >-12 dB.
  • The feature at 90 kHz is strange - need to look at the schematic to see what this could be.

The motivation here is to try and figure out why I cannot engage the AO path smoothly in the CARM handoff part of lock acquisiton. I plan to use this information to do some loop modeling and project laser frequency noise coupling in various stages of the lock acquisition process.

  15228   Wed Feb 26 22:09:52 2020 gautamSummaryBHDProjected IFO noise budget, post-BHD upgrade

The quantum noise curves here are not correct. c.f. amplitude quadrature noise budget.

  15227   Wed Feb 26 22:05:06 2020 gautamUpdateIOOIMC checks

Today, I did the following tests (and so was touching electronics/cables at/around 1X2):

  • Measured the IMC OLTF.
  • Measured the TF from injection at IN2 to response at the IMC error point (T-eed the I out of the IMC demodulator as there is no longer a monitor point available).
  • Measured the IMC in loop error signal with 0.25 Hz resolution from DC-2kHz.
  • Confirmed that the IMC IN2 (a.k.a. AO path) gain slider performs as advertised. This is a useful test to run post Acromag switchover on Friday.

Results to follow.

After this work, I reverted the EPICS channels to the usual values. The IMC can be locked.

  15226   Wed Feb 26 21:43:48 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

To supplement the material presented during the BHD review, I've put together a projected noise budget for the 40m. Note these are the expected interferometer noises (originating in the IFO itself), not BHD readout noises. The key parameters for each case are listed in the figure title. Also attached is a tarball (attachment 4) containing the ipython notebook, data files, and rolled-back version of pygwinc which were used to generate these figures.

Attachment 1: Phase quadrature readout.

Attachment 2: Comparison to aLIGO design sensitivity (phase quadrature).

Attachment 3: Amplitude quadrature readout.

  15225   Wed Feb 26 17:17:17 2020 YehonathanUpdate Arms DC loss measurements

{Yehonathan, Gautam}

In order to measure the loss in the arm cavities in reflection, we use the DC method described in T1700117.

It was not trivial to find free channels on the LSC rack. The least intrusive way we found was to disconnect the ALS signals DSUB9 (Attachment 1) and connect a DSUB breakout board instead (Attachment 2).

The names of the channels are ALS_BEATY_FINE_I_IN1_DQ for AS reflection and ALS_BEATY_FINE_Q_IN1_DQ for MC transmission. Actually, the script that downloads the data uses these channels exactly...

We misalign the Y arm (both ITM ad ETM) and start a 30 rep measurement of the X arm loss cavity using /scripts/lossmap_scripts/armLoss/measureArmLoss.py and download the data using dlData.py.

We analyze the data. Raw data is shown in attachment 3. There is some drift in the measurement, probably due to drift of the spot on the mirror. We take the data starting from t=400s when the data seems stable (green vertical line). Attachment 5 shows the histogram of the measurement

X Arm cavity RT loss calculated to be 69.4ppm.

We repeat the same procedure for the Y Arm cavity the day after. Raw data is shown in attachment 5, the histogram in attachment 6.

Y Arm cavity RT loss calculated to be 44.8ppm. The previous measurement of Y Arm was ~ 100ppm...

Loss map measurement is in order.

  15224   Tue Feb 25 19:58:06 2020 HangUpdateIOOMC2 coil balancing

[Yehonathan, Hang]

We did some quick DC balancing of the MC2 coil drivers to reduce the l2a coupling. We updated the gains in the C1:SUS-MC2_UL/UR/LR/LLCOIL to be 1, -0.99, 0.937,-0.933, respectively. The previous values were 1, -1, 1, -1.

The procedures are the following:

Lock IMC.

Drive UL+LR and change the gain of LR to zero pitch.

Drive UR+LL and change the gain of LL to zero pitch.

Lastly, drive all 4 coils and change UR & LR together to zero yaw. 

We used C1:SUS-MC2_LOCKIN1_OSC to create the excitations at 33 Hz w/ 30,000 cts. The angular error signals were derived from IMC WFSs.

While this time we did things by hand, in the future it should be automated as the procedure is sufficiently straightforward. 

  15223   Tue Feb 25 16:17:57 2020 Gautam, HangUpdateCDS 

Seems that the GPS is out of sync on donatella. We could not get any data from diaggui...

  15222   Mon Feb 24 08:36:32 2020 ChubUpdateGeneralHVAC repair

The HVAC people replaced a valve and repaired the pneumatic plumbing on the roof air handler.  Temperature has been stable during the day since Thursday.  If anyone is in the control room during the evening, please make a note of the temperature.

Chub

  15221   Sun Feb 23 18:15:22 2020 ranaUpdateALSALS OOL noise and PDH

to make the comparisons meaningfully

one needs to correct for the feedback changes

faithfully

  15220   Fri Feb 21 20:44:18 2020 shrutiUpdateALSALS OOL noise and PDH

[Meenakshi, Shruti]

In order to adjust the relative phase for PDH locking, we used the Siglent SDG 1032X function generator which has two outputs whose relative phase can be adjusted.

This Siglent function generator was borrowed from Yehonathan's setup near the PSL table and can be found at the X end disconnected from our setup after our use.

Initially, we used the Siglent at 231.250 kHz and 5 Vpp from each output with zero relative phase to lock the green arm cavity. By moving the phase at intervals of 5deg and looking at the PDH error signals when the cavity was unlocked we concluded that 0deg probably looked like it had the largest linear region (~1.9 V on the yaxis. Refer elog 15218 for more information) as expected.

Then we tried the same for 225.642 kHz, 5 Vpp, and found the optimal demod phase to be -55deg, with linear region of ~3 V (Ref. Attachment 2). A 'bad' frequency 180 kHz was optimized to 10deg and linear region of ~1.5 V.

The error signals at higher frequencies appeared to be quite low (not sure why at the moment) and tuning the phase did not seem to help this much.

For the noise measurement, the IFO arms were locked to IR and green, but even after optimizing the transmission with dither, we couldn't achieve best locking (green transmission was around ~0.2). Further, the IMC went out of lock during the experiment after which Koji helped us by adjusting the gains a locking point of the PMC servo. Attachment 1 contains some noise curves for the 3 frequencies with a reference from an earlier 'good' time.

  15219   Fri Feb 21 13:02:53 2020 KojiUpdateALSPDH error signals?

Check out this elog: ELOG 4354

If this summing box is still used as is, it is probably giving the demod phase adjustment.

  15218   Fri Feb 21 10:59:08 2020 shrutiUpdateALSPDH error signals?
Here are a few PDH error signals measured without changing the servo gain or phase from that optimized for 231.25 kHz. This was done by keeping the X arm cavity and laser unlocked but keeping the shutter for green open; so I did not force a frequency sweep but saw the unhindered motion of cavity wrt the laser using the PDH servo error monitor channel from the box (not sure if this is the best way to do it?).
 
Koji mentioned that there is a low pass filter with a cutoff frequency probably lower than 700 kHz which at the moment would hinder the efficacy of the locking at higher frequencies. The transfer function on the wiki suggests the same, although we are yet to investigate the circuit.
 
I measured the maximum range in the linear region of the signal, and here are the results:
  • Attachment 1: 231.25 kHz (current PDH sideband mod freq): 1.7 V
  • Attachment 2: 225.642 kHz: 1.2 V
  • Attachment 3: 100 kHz: 900 mV
  • Attachment 4: 763.673 kHz: 220 mV
Right now we have only inverted the phase to try locking at different frequencies (no finer adjustments were performed so elog 15216 cannot be an accurate representation of the true performance)
 
Ideas from the 40m meeting for adjusting the phase:
  1. Delay line for adding extra phase (would require over 40m of cable for 90 deg phase shift)
  2. Using two function generators for generating the sideband, clocked to each other, so that one can be sent to the PZT and the other to the mixer for demodulation.
  3. Use a different LPF (does not seem very useful for investigating multiple possible frequencies)

Once we adjust the phase we may be able to increase the servo gain for optimal locking. Unless it may be a good idea to increase the gain without optimizing the phase?

  15217   Wed Feb 19 22:20:22 2020 ranaUpdateALSALS OOL noise with arms locked

Could you please put physical units on the Y-axis and also put labels in the legend which give a physical description of what each trace is?

It would also be good to a separate plot which has the IR locking signal and the green locking signal along with this out of loop noise, all in the same units so that w can see what the ratio is.

  15216   Tue Feb 18 18:14:59 2020 shrutiUpdateALSALS OOL noise with arms locked

We proceeded with the trying to measure the ALS out-of-loop noise of the X arm when the X arm cavity is green-locked using different PDH sideband frequencies.

Before doing the experiment, Koji helped us with getting the arm cavities locked in IR using LSC (length) and ASC (angular).

With the arms locked in IR and green, we repeated the same measurements as before at different sideband frequencies (Refer Attachment 1 - label in Hz). We did not optimize the phase nor did we look at the PDH error signal today which is possibvly why we did not see an improvement in the noise. We will look into this possibly tomorrow.

  15215   Sat Feb 15 12:56:24 2020 YehonathanUpdateIOOIMC Transfer function measurement

{Yehonathan, Meenakshi}

We measure the IMC transfer function using SR785.

We hook up the AOM driver to the SOURCE OUT, Input PD to CHANNEL ONE and the IMC transmission PD to CHANNEL TWO.

We use the frequency response measurement feature in the SR785. A swept sine from 100KHz to 100Hz is excited with an amplitude of 10mV.

Attachment 1 shows the data with a fit to a low pass filter frequency response.

IMC pole frequency is measured to be 3.795KHz, while the ringdowns predict a pole frequency 3.638KHz, a 4% difference.

The closeness of the results discourages me from calibrating the PDs' transfer functions.

I tend to believe the pole frequency measurement a bit more since it coincides with a linewidth measurement done awhile ago Gautam was telling me about.

Thoughts:

I think of trying to try another zero-order ringdown but with much smaller excitation than what used before (500mV) and than move on to the first-order beam.

Also, it seems like the reflection signal in zero-order ringdown (Attachment 2,  green trace) has only one time constant similar to the full extinction ringdown. The reason is that due to the fact the IMC is critically coupled there is no DC term in the electric field even when the extinction of light is partial. The intensity of light, therefore, has only one time constant.

Fitting this curve (Attachment 3) gives a time constant of 18us, a bit too small (gives a pole of 4.3KHz). I think a smaller extinction ringdown will give a cleaner result.

  15214   Fri Feb 14 14:52:41 2020 gautamUpdateALSALS OOL noise with arms locked

Unlikely, the alignment was probably just not good. I restored the alignment and now the arms can be locked to IR frequency.

Quote:

Even though we were not able to lock the the IR beat (by enabling LSC) during the day possibly because of increased seismic activity

  15213   Fri Feb 14 14:02:13 2020 shrutiUpdateALSALS OOL noise with arms locked

[Meenakshi, Shruti]

Even though we were not able to lock the the IR beat (by enabling LSC) during the day possibly because of increased seismic activity, we tried to the measure the ALS beat frequency noise by changing the PDH side-band frequency to different values.

I tried choosing values that corresponded to the peaks in the PM/AM as found in elog:15206 but for some reason unknown to us the cavity did not lock between 700-800 kHz.

The three attachments have data for different sideband frequencies:

Attachment 1: 819.472 kHz (peak in PM/AM, measured around noon)

Attachment 2: 225.642 kHz (peak in PM/AM, measured earlier in the morning)

Attachment 3: 693.500 kHz (not a peak in PM/AM)

We don't think these plots mean much and will do the measurement at some quieter time more systematically.

 

While doing the experiment, the ITMY pitch actuation was changed from -2.302 to -2.3172V because it locked better.

The ITMX, ETMX alignment was also tweaked to try to lock with different sideband frequencies and then restored to the values that were found earlier in the morning.

  15212   Fri Feb 14 00:53:50 2020 gautamUpdateALSFast ALS - more setup

In the process of setting up some cabling at 1Y2, I must've bumped a cable to the c1lsc expansion chassis. Anyways, the c1lsc models crashed. I ran the reboot script around 530pm PDT. Usual locking behavior was recovered after this. The work at 1Y2 was:

  • Ran a cable from X Beat power splitter ("LO" leg of the analog delay line) to variable delay line. 
  • Ran cable from delay line to demodulator's LO input.
  • Set up the SR785 for some CM board TF measurements.

The IN2 to CM board was already connected to I single ended output of the ALS X demodulator. The ~100 Hz UGF digital locking using the CM_SLOW path is straightforward but I didn't have any success with the AO path tonight. I wonder how high BW this lock can be made without injecting a ton of noise into the IMC loop, given that the EX uPDH only has ~ 10 kHz UGF.

Attachment #1 shows the spectra of the ALS signal 

  • The two "CM Slow" traces are the digitized "SLOW" output of the common mode board, whose IN2 is connected to the demodulated I output of the analog delay line.
  • The delay in the LO line of the analog delay line is adjusted to zero the DC value of this signal to best effort.
  • These spectra are measured with the arm cavities POX/POY locked, and the EX laser locked to the arm cavity using the end PDH box.
  • I simultaneously monitor the output of the digital phase tracker servo, and scale the CM Slow signal such that the spectra line up. The scaling factor required was to multiply the CM_SLOW signal x10 (CM board IN2 gain was set to +6dB, to account for the x2 gain in going from single ended to differential inside the ALS demodulator box).
  • One puzzline feature is why switching on the ADC whitening makes the ALS spectrum noisier (even though it clearly changes the digitization noise floor). There is a peak that appears at ~ 8 kHz with the whitening on, and it may also be downconverted noise from some peak at higher frequencies I guess (if the AA isn't sharp enough). 

Attachment #2 is an OLTF measurement.

  • In the blue trace, the arm length is controlled by using the CM Slow signal as an error signal, applying feedback to IMC length via MC2.
  • In the red trace, I turned the digital MC2 violin notches off, and added upped the IMC IN2 gain to -12 dB (AO gain slider = 0dB).
  • This was as high as I could go before the PC drive RMS began to go crazy.
  • But still, there isn't any significant phase advance.
  • It is possible I need to tack on a low-pass filter to prevent noise injection at higher frequencies...
  15211   Thu Feb 13 21:30:55 2020 shrutiUpdateALSALS OOL noise with arms locked

[Meenakshi, Gautam, Shruti]

Summary:

- We initially aligned the arm cavities to get the green lasers locked to them. For the X arm cavity, we tweaked the ITMX and ETMX pitch and yaw and toggled the X green shutter until we saw something like a TEM00 mode on the monitor and a reasonable transmitted power.

- With the LSC servo enabled, the IR light also became resonant with the cavities.

- Then we measured the noise in different configurations. Attachment 1 shows the the ALS OOL (in the IR beat signal) noise with the arms locked inidividually via PDH.


The script for plotting the ALS beat frequency noise is:

users/Templates/ALS/ALS_outOfLoop_Ref.xml
  15210   Thu Feb 13 02:07:26 2020 gautamUpdateLSCAO path transfer function measurement

Summary:

I measured the transfer function of the AO path, and think that there are some features indicative of a problem somewhere in the IMC locking loop.

Details:

Regardless of the locking scheme used, high bandwidth control of the laser frequency relies on the fact that the laser frequency is slaved to the IMC cavity length with nearly zero error below ~50 kHz (assuming the IMC loop has a UGF > 100 kHz). In my single arm experiments, I didn't know what to make of the ripples that became apparent in the measured OLTF as the AO gain was ramped up.

Tonight, I measured the TF of the "AO path", which modifies the error point of the IMC, thereby changing the laser frequency. 

  • An SR785 was used to make the measurement.
  • The signal was injected at the "EXC B" input on the CM board.
  • The CM_SLOW path was disabled, AO gain = 0dB, IMC IN2 gain = 0dB.
  • Between "EXC B" and the IMC error point (which I measured at TP1A on the IMC board), we expect that there are 2 poles at ~ 6 Hz, and one pole at ~ 11 Hz.

Attachment #1 shows the result of the measurement. 

  • This measurement should be the "Closed Loop Gain" [= 1/(1+L) where L is the open loop gain] of the IMC locking loop. For comparison, I've overlaid the inferred CLG from a measurement of the IMC OLG I made in Jun 2019. The magnitude lines up quite well, but the phase does not 🤔 
  • Above 10 kHz, the measurement is as I expect it to be.
  • However, between 1 kHz and 10 kHz, I see some periodic features every 1 kHz, which I don't understand. In the IMC OLTF, these would be sharp dips in the OLTF gain.
  • I was careful not to overdrive the servo, so I believe these features are not a measurement artefact.
  • Combing through past elogs, I couldn't really find any measurements of the IMC OLTF in the 1 kHz - 10 kHz band.
  • I decided to measure the spectrum of the IMC error point (with no excitation input), to see if that offered any additional insight. Attachment #2 shows the result - again, periodic features at ~ 1 kHz intervals.

I didn't use POX / POY as a sensor to confirm that this is real frequency noise, I will do so tomorrow. But it may be that realizing a stable crossover is difficult with so many features in the AO path.

Previous thread with a somewhat detailed characterization of the IMC loop electronics.

  15209   Thu Feb 13 01:47:39 2020 gautamUpdateALSFast ALS - delay line prep

A few years ago, Koji and I setup a delay line phase shifter, which can be used to impart a (switchable) delay to a signal path. Since we talked about reviving the fast (= high bandwidth) ALS control scheme at the meeting, I reminded myself of the infrastructure available.

  • Schematic
  • Comprehensive note on theory of operation / performance.
  • Past elog threads - #11603 and #11604.
  • Attachment #1 - my modification to the ALS screen to add a slider that controls the channel C1:LSC-BO_1_0_SET. The label is a bit misleading for now - elog11604 tells you the conversion between this slider value and the actual delay in nanoseconds, but I couldn't get a soft channel set up that correctly FLNKed to this record. In the process of trying to do so, I edited the C1_ISC-AUX_ALS.db file, and also restarted the modbus and latch processes on c1iscaux a few times.
  • Attachment #2 - frequency dependent loss for some representative delays. At ~200 MHz, I find the measured loss to be > 8dB, which is ~2dB more than what the D. Sigg note tells me to expect. This is rather a lot of loss, but I guess it's okay. Measurement cable loss was calibrated out with the AG4395A.
  • Attachment #3 - confirmation of constantness of delay as a function of frequency, for some representative delays. The "undelayed" setting corresponds to a fixed delay of ~4 nsec, which is consistent with what the D. Sigg note tells me to expect. Once again, I calibrated out the delay of the measurement setup using the AG4395A.

For a beat note in the regime 10-100 MHz, we should have plenty of range in this module to add a delay such that we zero one quadrature of the ALS DFD output (for a linear error signal). 

I then proceeded to connect the single-ended front panel BNC corresponding to the ALS_X_I DFD channel to the IN2 input of the CM board (this would be what we use for high bandwidth ALS feedback). The conventional ALS system uses the differential output from a rear-panel D-sub, so in principle, both systems could run in parallel. I confirmed that I could see a signal when the IN2 path on the CM board was engaged (monitored using ndscope at the CM_Slow output), and that this signal stabilized when the green laser was locked to the X-arm length, which itself was slaved to the PSL frequency using the usual POX locking scheme. I have not yet routed the LO leg of the ALS_X beat through the delay line phase shifter - see next elog for details.

Update about the ALS MEDM screen slider: the trick was to change the OMSL field of the C1:LSC-BO_1_0 channel to "closed_loop" instead of "supervisory". Once this is done, the DOL value of the same channel can be set to the soft channel C1:ALS-DelayCalc, which sets the 16 bit binary string that controls the delay. Because arbitrary delays are not possible, I think it's more natural for the user to interact with this 16-bit binary string rather than the actual delay itself. So the MEDM screen has been slightly modified from what is shown in Attachment #1.

  15208   Wed Feb 12 12:13:37 2020 gautamUpdateLSCAO path attempts

Summary:

  1. The PRFPMI can be controlled by a mix of ALS and RF signals and circualting arm powers > 100 can be maintained for several tens of minutes at a stretch.
  2. The complete RF handoff still cannot be realized - I need to study the AO path crossover more carefully to understand what exactly is wrong and what needs to be done to rectify the problem.

Measurements:

Over the last couple of days, I've been trying to see if I can measure the phase advance due to the AO path - however, I've been unable to do so for any combination of CM board IN1 gain and MC Servo board IN2 gain I've tried. Yesterday, I tried to understand the loop shapes I was measuring a little more, and already, I think I can't explain some features.

Attachment #1 shows the TF measured (using SR785, and the EXC_A bank of the CM board) when the CM Slow path has been engaged.

  • All CARM control in this state is digital.
  • For the CM Slow path, the digital filter includes a pole at 700 Hz, pole at 5 kHz and zero at 120 Hz (the latter two for coupled cavity pole compensation).
  • In this conditions, the arm powers are somewhat stable at ~150, but still there are fluctuations of the order of 50%.
  • The "buzzing" as the arms rapidly go in and out of resonance is no longer present though.
  • The UGF of the hybrid REFL11+ALS loop is ~200 Hz, with ~45 deg of phase margin.
  • Turning off the MC2 violin filters gives some phase back. But I don't really understand the flattening of the TF gain between ~250-500 Hz.

Attachment #2 shows error signal spectra for the in-loop PRFPMI DoFs, for a few different conditions.

  • Engaging the REFL11 digital path smooths out the excess noise in the ~30-50 Hz band, which is consistent with the fact that the arm powers stabilize somewhat.
  • However, there is some gain peaking around ~400 Hz.
  • This is in turn imprinted on the vertex DoFs, making the whole system's stability marginal.

I believe that a stable crossover is hopeless under these conditions.

Next steps:

  1. Account for the measured OLTF, understand where the flattening in the few hundred Hz region is coming from.
  2. Repeat the high BW POY experiments, but with the simulated coupled cavity pole - maybe this will be a closer simulation to the PRFPMI transition.
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