I tried to couple the PSL pickoff into the fiber today for several hours, but got nowhere really, achieved a maximum coupling efficiency of ~10%. TBC tomorrow... Work done yesterday and today:
I think part of the problem was that the rejected beam from the PBS was not really very Gaussian - looking at the spot on the beam profiler, I saw at least 3 local maxima in the intensity profile. So I'm now switching strategies to use a leakage beam from one of the PMC input steering optics- this isn't ideal as it already has the PMC modulation sideband on it, and this field won't be attenuated by the PMC transmission - but at least we can use a pre-doubler pickoff. This beam looks beautifully Gaussian with the beam profiler. Pics to follow shortly...
I tried to couple the PSL pickoff into the fiber today for several hours, but got nowhere really, achieved a maximum coupling efficiency of ~10%. TBC tomorrow... Work done yesterday and today
pd80b rga scan at 175 day. IFO pressure 7.3e-6 Torr-it
Condition: vacuum normal, annuloses not pumped. Rga turned on yesterday.
The rga was not on since last poweroutage Jan 2, 2018 It is warming up and outgassing Atm2
I've often gotten confused by the labeling on the SUS MEDM screens about the coil "Vmon" fields - they're labelled as "30 Hz HPF", and indeed this is one of the many readbacks available on the coil driver board. But the actual EPICS channel that is being displayed in this field is from the "EPICS VMON" monitor point on the coil driver board. It has a gain of 1/2, so the actual voltage going to the coil is twice the channel value. Today, I fixed the SUS master screen to avoid this confusion - new labeling is shown in Attachment #1.
I moved the epics IOC server process for the single Acromag ADC that monitors the PSL signals from megatron to c1auxex2.
First, I disabled the legacy support on all channels as explained in elog 13565. Then I copied the files npro_config.cmd and NPRO.db from /opt/rtcds/caltech/c1/scripts/Acromag to /cvs/cds/caltech/target/c1psl2/ following the pattern of the old Motorola machines and the new c1auxex2. I had to make some edits for correct paths and expanded the epics records to the standard we're using for ETMX.
I then added a service to systemd on c1auxex2 that runs the epics IOC for the Acromag PSL channels: /etc/systemd/system/modbusPSL.service. No more tmux on megatron.
Running two IOCs on a signle machine at the same time did not produce any errors and seems fine so far.
Attachment #1 shows the current situation of the PSL table IR pickoff. It isn't the greatest photo but it's hard to get a good one of this setup. Now there is no need to open the Green PSL shutter for there to be an IR beat note.
All this lead me to conclude that I have reached at least some sort of local maximum. The AR coating of the lens has ~0.5% reflection at 8 degrees AOI according to spec, and EricG mentioned today that the fiber itself probably has ~4% reflection at the interface due to there not being any special AR coating. There is also the fact that the mode of the collimator isn't exactly Gaussian. Anyways I think this is a big improvement from what was the situation before, and I am moving on to debugging the ALS electronics.
There is 3.65mW of power coupled into the fiber - our fiber coupled PDs have a damage threshold of 2mW, and this 3.65mW does get split by 4 before reaching the PDs, but good to keep this number in mind. For a quick measurement of the PMC and X end PDH modulation depth measurements, I used an ND=0.5 filter in the beam path.
Annual crane inspection with load tests is scheduled for Monday, Feb 5, 2018 from 8 to 11:30am
Konecranes rescheduled this appointment to: Monday, Feb 12, 2018
I used the Beat Mouth to make a quick measurement of the PMC and EX modulation depths. They are, respectively, 60mrad and 90mrad. See Attachments #1 and #2 for spectra from the beat photodiode outputs, monitored using the Agilent analyzer, 16 averages, IF bandwidth set to resolve peaks offset from the main beat frequency peak by 33.5MHz for the PMC and by ~230kHz for the EX green PDH.
For this work, I had to re-align the IFO so as to lock the arms to IR. c1susaux was unresponsive and had to be power-cycled. As mentioned in the earlier elog, to avoid saturating the Fiber Coupled beat PDs, I placed a ND=0.5 filter in the fiber collimator path, such that the coupled power was ~1mW, which is well inside the safe regime.
For the EX modulation depth, I could have gotten multiple estimates of the modulation depth using the higher order products that are visible in the spectrum, but I didn't.
We installed some rails to mount the 2U chassis containing ~100m of delay line cabling, and the 1U chassis containing the FET demodulators for the ALS signals in the LSC rack. This has made it MUCH easier for a single person to work there and remove/reinstall these chassis. The delay line box has 100m of cable inside it, and so was rather heavy (~8kg) - previously, it was being supported only by a pair of brackets on the front, so the new arrangement is much more robust. Steve is looking into acquiring plastic spacers of the appropriate width, so that we can secure the units to the rack using usual rack mount screws (but the material of the newly installed rails and the screw heads holding them in place necessitate this plastic spacer).
Delay line box has been re-installed, demodulator chassis has been removed by me for characterization. Steve will put up photos once the units are re-installed.
For this work, I had to disconnect a bunch of cabling, but only those connected to ALS. All cables were labelled, and I will re-connect them once I am done with the demod chassis.
Anyways I think this is a big improvement from what was the situation before, and I am moving on to debugging the ALS electronics.
The plan is to lower the gain of the IF amplifier stage on the FET demodulator board from 100 to 10. As per Attachment #1, this will make the overall gain from RF beatnote from the Beat Mouth to the signal input to the D990694 whitening board +19dB, assuming "typical" values for the conversion loss of the mixer, and the various other passive components on the FET demod board. I've used numbers I measured a couple of weeks ago for the delay line loss and the cabling loss from the PSL table to the LSC rack. This in turn will set a limit on how much RF beat power we can handle, from the Beat Mouth. According to this power budget, if we have -5dBm of beat, we will have an input to the whitening board of ~6Vpp, which is about half its full range. The trouble is, I don't know what the transimpedance gain of the Fiber Beat PDs are. The datasheet suggests a "maximum gain" of 5e4 V/W, which presumably takes into account the InGaAs responsivity and the actual transimpedance gain. However, according to the last power budget I did inside the Beat Mouth, I had -8dBm of beat for a combined 400uW of PSL+EX light, which definitely does not add up. I've emailed the company to ask about the spec, haven't gotten anything useful yet...
The problem is further complicated by the fact that the fiber inside the Beat Mouth is NOT polarization maintaining, and so the actual relative polarizations of the arm IR light and the PSL IR light is unpredictable, and also uncontrolled. I suppose we could simply place a HWP before the fiber collimator at either end, and rotate the polarization until we get a desired amount of beat, but this still does not solve the problem of the polarization being uncontrolled.
I am going to characterize the demod board using E1100114. I am unsure as to the conversion loss of the mixer - the datasheet suggested a number of 8dB, but T1000044 suggests that the conversion loss is actually only 4dB. I figure it's best to just measure it. Would also be good to verify that the overall transfer function and noise of the IF amplifier stage match my expectation from the LISO model.
Option #1: Rana ordered 50ohm and 500ohm SMD resistors of the 0805 package size, I asked Steve to get a few more values just in case we want to twiddle with the gain of this stage further (specifically, I asked for values such that we can set it to x5, x3 and x1). But changing the feedback resistors modifies the overall TF shape - see e.g. Attachment #2. Need to also look at how the noise performance varies.
Another possibility is to turn down the gain of the IF amplifier stage to x10, retire the ZHL-3A, and use a lower gain amplifier in its place. We do have the recently acquired Teledyne amplifiers, but we would have to package it in such a way that it can be integrated into the existing Fiber ALS signal chain. This would allow us to handle significantly larger RF beatnote powers, which I expect we will have if we improve the mode matching into the fibers (provided the aforementioned polarization drift possibility doesn't hurt us too much).
A third possibility is to attenuate the power coupled into the fibers to lower the RF beatnote amplitude. I don't like this option so much because placing an ND filter or a PBS+HWP combo in the beam path is likely to screw up the mode-matching into the fiber collimator, which I have already spent so many hours trying to improve, but if it must be done, it must be done.
The correct option is of course the one that gives us the lowest ALS noise. It is not clear to me which one that is at this point.
I effected the change to the Audio IF preamp stage on channels 3 and 4 (Xarm and Yarm respectively) using the resistors Steve ordered (the ones Rana ordered don't have any labeling on them, and I couldn't tell the 50ohm and 500ohm ones apart except by looking at the label on the ziplock bag they came in, so I decided against using them). I've started a DCC page to collect photos, characterization data, and marked up schematic etc for this part. Characterization is ongoing, more to follow soon. Note that for the photo-taking, I disconnected all the on-board SMA connectors so that the cabling wouldn't block components. I have since restored them for testing purposes, and was careful to use the torque-limited SMA tightening tool when restoring the connections.
In order to test various things like conversion loss etc, I figured it would be useful to have two RF signal sources, so I scavenged the Fluke RF generator that Johannes was using from under the PSL table. In the process, I accidentally bumped the PSL interlock on the southeast corner of the PSL table. I immediately turned the NPRO back on, and relocked PMC/IMC. Everything looks normal now. Acromag may even have caught my transgression.
Stuff is beginning to look clearer now that I've done some initial characterization of the demod boards. I will upload a more detailed report of the characterization on the DCC page, but important findings are:
The delay line has a loss of ~3dB. The power splitter has a loss of 3dB. So putting everything together, 17dBm at the input of the power splitter gives us just the right amount of RF power to have the LO input driven at 14dBm, and the IF output be ~5Vpp into a High-Z load, which is about half the ADC full range.
After taking the measurements, calibrating them (approximately), and filterting them, I created the following plot. The exponential fit is quite good, as the error is not more than 0.03 C. I used the python function curve_fit in order to get this, and it gave me the time constant as well, which came out to 0.357 hr. From my previous calculations here, I plugged in the values we have (m = 12.2 kg, c = 500 J/kg*k, d = 0.0762 m, k = 0.26 W/(m^2*K), A = 1 m^2), and got that
This is a bit off, but it's probably due to the parameters not being exactly what I supposed them to be, and heat losses through the bottom of the can.
I saw some interesting behaviour of the Audio IF amplifier stage on the demod board today, by accident. I was testing the board for I/Q orthogonality and gain balance, when I noticed a large gain imbalance between the I and Q channels for both Board #3 and #4, which are the ones we use for the IR ALS demodulation. This puzzled me for some time, but then I realized that I had only reduced the gain of this stage from x100 to x10 for the I channel, and not for the Q channel! The surprising thing though was that the output waveform still looked like a clean sinusoid on the o'scope, and there was no evidence of the voltage clipping that is characteristic of an op-amp being driven beyond its voltage rails. The conversion factor with a preamp gain on x10 was measured today to be 2V IF / 1V RF. But this means that for a preamp stage gain of x100, we expect 20V IF / 1V RF, which is well in the saturation regime of the AD829, since the Vcc is only +/-15V. I'm guessing the diodes D2 and D3 are for overvoltage protection, but given that the pre-amp gain is x100, the input signal at the inverting input of the AD829 is only 0.2V at DC, which isn't above the forward bias voltage for the switching diode BAV99. Perhaps there is some interaction between the pre-amp and the FET demodulator that I dont understand, or I am missing something about the differential to single-ended topology that would explain this behaviour.
I found it puzzling why the large preamp stage gain didn't hurt us with the green beat - even though the green optical beat signal was smaller than the current IR beat, a back-of-the-envelope calculation suggested that it would still have saturated the ADC with a x100 gain on the preamp. Perhaps this observation is part of the story, and there is also the unpredictable behaviour of the D990694 board for an input signal with large DC levels...
I did the following tests on this board today:
I didn't really measure the transfer function of the preamp stage after the modification because there wasn't a convenient test point and I couldn't find the high impedance FET probe for the Agilent - I wonder if somebody in WB has it? Anyways, all the tests suggested the board is operating as expected, and I now have calibrations for the back panel DSUB for LO/RF power levels, and also the conversion gain from RF to IF. I will put together a python notebook with all my measurements and upload it to the DCC page for this part. I need to double check expected noise levels from LISO to match up to the measurement.
I will now proceed to the next piece (#3?) of this puzzle, which is to understand how the D990694 which receives the signals from this unit reacts to the expected DC voltage level of ~4Vpp.
After discussion with Koji, I have also decided to look into putting together a daughter board for an alternative Audio IF preamp stage. The motivation is that for the ALS application, we expect a high DC signal level all the time (because the loop does not suppress the beat note amplitude). So we would like for the preamp stage to have the usual shape of some zero around 4Hz, a pole around 40Hz, and then the LowPass profile of the existing preamp stage (to cut out the 2f frequency product, but also to minimize the possibility of the fast AD829 going into some unpredictable regime where it oscillates). So, the desired features are:
While setting up for this measurement, I noticed something odd with the whitening switching for the ALS channels. For the usual LSC channels, the whitening is set up such that switching FM1 on the MEDM screen changes a BIO bit which then enables/disables the analog whitening stage. But this feature doesn't seem to be working for the ALS channels - I terminated all 4 channels at the LSC rack, and measured the spectrum of the IN1 signals with DTT in the two settings, such that I expect to see a difference in the spectra if the whitening is enabled or disabled - FM1 enabled (expected analog whitening to be engaged) and FM1 disabled (expected analog whitening to be bypassed). But I see no difference in the spectra. I confirmed that the BIO bit switching is happening at least on the software level (i.e. the bit indicator MEDM screens indicate state toggling when FM1 is ON/OFF). But I don't know if something is amiss in the signal chain, especially since we are using Hardware channels that were previously used for AS_165 and POP_55 signals.
Is the whitening shape such that we expect the terminated noise level to be below ADC Noise even when the whitening is engaged? I just checked the shape of the de-whitening filter, and it has -40dB gain above 150Hz, so the inverse shape should have +40dB gain.
I will now proceed to the next piece (#3?) of this puzzle, which is to understand how the D990694 which receives the signals from this unit reacts to the expected DC voltage level of ~4Vpp
gautam 2.15pm: This was a FALSE ALARM, with the inputs terminated, the electronics noise really is that low such that it is buried under ADC noise even with +40dB gain. I cranked up the flat whitening gain from 0dB to 45dB for the X channels (but left the Y channels at 0dB). Attachment #2 is the comparison. Looks like the switching works just fine.
I could not understand why 'netgpibdata' scripts are missing in "scripts/general" folder on pianosa... Where did they go???
Also, I found that the PROLOGIX GPIB-LAN controller for crocetta (192.168.113.108) is no longer working. I need to reconfigure it with "telnet"...
The netgpibdata scripts are now under git version control at /opt/rtcds/caltech/c1/scripts/general/labutils/netgpibdata. I think the idea was to make this directory a collection of useful utilities that we could then pull at various labs / at the sites.
Attached the program I used to create the plot
I've been trying to setup for the THD measuremetn at the LSC rack for a couple of days now, but am plagued by a problem summarized in Attachment #1: there are huge harmonics present in the channel when I hook up the input to the whitening board D990694 to the output of a spare DAC channel at the LSC rack. Attachment #2 summarizes my setup. I've done the following checks in trying to debug this problem, but am no closer to solving it:
Am I missing something obvious here? I think it is impossible to do a THD measurement with the spectrum in this condition...
crochetta was reconfigured to have 192.168.113.108. It was confirmed that it can be used with netgpibdata.py
Configuration: I have connected my mac with the unit using an Apple USB-Ethernet adapter. The adapter was configured to have a manual IP of 192.168.113.222/255.255.255.0. "netfinder.exe" was run to assign the IP addr to the unit. It seemed that NVRAM of the unit evaporated as it had the IP of 0.0.0.0. Once it was configrued, it could be run with netgpibdata as usual.
Did some quick additional checks to figure out what's going on here.
So either something is busted on this board (power regulating capacitor perhaps?), or we have some kind of ground loop between electronics in the same chassis (despite the D990694 being differential input receiving). Seems like further investigation is needed. Note that the D000316 just two boards over in the same Eurocrate chassis is responsible for driving our input steering mirror Tip-Tilt suspensions. I wonder if that board too is suffering from a similarly noisy ground?
I think I've narrowed down the source of this ground loop. It originates from the fact that the DAC from which the signals for this board are derived sits in an expansion chassis in 1Y3, whereas the LSC electronics are all in 1Y2.
Looking at Jamie's old elog from the time when this infrastructure was installed, there is a remark that the signal didn't look too noisy - so either this is a new problem, or the characterization back then wasn't done in detail. The main reason why I think this is non-ideal is because the tip-tilt steering mirrors sending the beam into the IFO is controlled by analogous infrastructure - I confirmed using the LEMO monitor points on the D000316 that routes signals to TT1 and TT2 that they look similarly noisy (see e.g. Attachment #1). So we are injecting some amount (about 10% of the DC level) of beam jitter into the IFO because of this noisy signal - seems non-ideal. If I understand correctly, there is no damping loops on these suspensions which would suppress this injection.
How should we go about eliminating this ground loop?
I decided to plot the temperatures measured over two days for the sensor inside the can and inside the lab just to see if there was any significant difference between the two, and obtained the following plot. This shows that there is a difference in measurements of a few 0.01 C. The insulated seismometer can didn't change temperature as much as the lab did, which is as expected. I'll work on properly calibrating the sensors sometime in the future so that we can use the sensor that's just in the lab as an accurate thermometer.
We discussed possible solutions to this ground loop problem. Here's what we came up with:
Why do we care about this so much anyways? Koji pointed out that the tip tilt suspensions do have passive eddy current damping, but that presumably isn't very effective at frequencies in the 10Hz-1kHz range, which is where I observed the noise injection.
Note that all our SOS suspensions are also possibly being plagued by this problem - the AI board that receives signals is D000186, but not revision D I think. But perhaps for the SOS optics this isn't really a problem, as the expansion chassis and the coil driver electronics may share a common power source?
gautam 1530 7 Feb: Judging by the footprint of the front panel connectors, I would say that the AI boards that receive signals from the DACs for our SOS suspended optics are of the Rev B variety, and so receive the DAC voltages single ended. Of course, the real test would be to look inside these boards. But they certainly look distinct from the black front panelled RevD variant linked above, which has differential inputs. Rev D uses OP27s, although rana mentioned that the LT1125 isn't the right choice and from what I remember, LT1125 is just Quad OP27...
After emailing the technical team at Menlo, I have uploaded the more detailed information they have given me on our wiki.
The trouble is, I don't know what the transimpedance gain of the Fiber Beat PDs are. The datasheet suggests a "maximum gain" of 5e4 V/W, which presumably takes into account the InGaAs responsivity and the actual transimpedance gain.
I subtracted out the lab temperature change during the period of cooling to see if it would have a significant effect on the time constant, but when I fit the new data, the time constant came out to 0.355 hr, which is not a significant change from the value of 0.357 that I got earlier.
Hornet cold cathode gauge analoge output [ DSub9 pin 3 and 7 ] are wired to go ETMX Acromag. It was reading 4.9V at 7.8e-6 Torr [ 3,110 V 8.35e-5A ] at the end of a 24ft BNC cable. Now it has to be hook up to an Acromag channel.
This will replace the not functioning C1: Vac-CC1_pressure
gautam: the motivation behind hooking this gauge up to our DAQ system is that non-vacuum-system-experts have a quick diagnostic to make sure everything is in order. This gauge is physically placed adjacent to V1, and so if something goes wrong with our vacuum pumps, we would see the effect here immediately. we did note that occassionally, the reading fluctuated by ~1V on the DMM used to check the voltage output at the end of the BNC cable, so we still need to run some long-term stability analysis once this channel is hooked up to the Acromag. For future reference, in order to make this gauge work, we need to check that
There was a power outage.
The IFO pressure is 12.8 mTorr-it and it is not pumped. V1 is still closed. TP1 is not running. The Rga is not powered.
The PSL output shutter is still closed. 2W Innolight turned on and manual beam block placed in its beampath.
3 AC units turned on at room temp 84F
IFO pumped down from 44 mTorr to 9.6e-6 Torr with Maglev backed with only TP3
Aux drypump was helping our std drypump during this 1 hour period. TP3 reached 32 C and slowed down 47K rpm
The peak foreline pressure at P2 was ~3 Torr
Hornet cold cathode gauge setting: research mode, air,
2830 HV 1e-4A at 9.6e-6 Torr,
[ 3110 HV 8e-5A at 7.4e-6 Torr one day later ]
Annuloses are at 2 Torr, not pumped
Valve configuration: vacuum normal, RGA is still off
PSL shutter is opened automatically. Manual block removed.
End IR lasers and doublers are turned on.
NOTE: Maglev " rotation X " on vacuum medm screen is not working! " C1:Vac-TP1_rot " channel was removed. Use " NORMAL X " for rotation monitoring.
*We removed this (i.e. rotation) field from the MEDM screen to avoid confusion.
Summary of my tests of the demod boards, post gain modification:
Everything looks within the typical performance specs outlined in E1100114, except that the measured noise levels don't quite line up with the LISO model predictions. The measurement was made with the scheme shown in Attachment #1. I didn't do a point-by-point debugging of this on the board. I have uploaded the data + notebook summarizing my characterization to the DCC page for this part. I recommend looking at the HTML version for the plots.
*I'd put up the wrong attachment, corrected it now...
I will put together a python notebook with all my measurements and upload it to the DCC page for this part. I need to double check expected noise levels from LISO to match up to the measurement.
gautam 9 Feb 2018 9pm: Adding a useful quote here from the LISO manual (pg28). I think if I add the Johnson noise from the output impedance of the mixer (assumed as 50ohms, I get better agreement between the measured and observed noises (although the variance between the 4 channels is still puzzling). The other possible explanation is small variations in the voltage noise at the various mixer output ports. Could we also be seeing the cyclostationary shot noise difference between the I and Q channels?
In any case, I am happy with this level of agreement, so I am going to stick this 1U chassis back in its rack with the primary aim of measuring a spectrum of the beatnote, so that I have some idea of what kind of whitening filter shape is useful for the ALS signals. May need to pull it out again for actually implementing the daughter board idea though... I have updated DCC page with LISO source, and also the updated python notebooks.
The ETMX Sorrenson power supply -15V was running at -13.9V
We did a survey of the lab today to figure out some of the logistics for the PID control test for the seismometer can. Kira will upload sketches/photos from our survey. Kira tells me we need
There are no DAC channels available in the c1ioo rack. In fact, there is a misleading SCSI cable labelled "c1ioo DAC0" that comes into the rack 1X3 - tracing it back to its other end, it goes into the c1ioo expansion chassis - but there are no DAC cards in there, and so this cable is not actually transporting any signals!
So I recommend moving the whole setup to the X end (which is the can's real home anyways). We plan to set it up without the seismometer inside for a start, to make sure we don't accidentally fry it. We have sufficient ADC and DAC channels available there (see Attachments #1 and #2, we also checked hardware), and also Sorensens to power the heater circuit / temperature sensing circuit. Do we want to hook up the Heater part of this setup to the Sorensens, which also power everything else in the rack? Or do we want to use the old RefCav heater power supply instead, to keep this high-current draw path isolated from the rest of our electronics?
I have attached the sketch of the whole system (attachment 3) with all the connections and inputs that we will need. Attachment 4 is the rack with the ADC and DAC channels labeled. Attachment 5 is the space where we could set up the can and have the wires go over the top and to the rack.
I was poking around at the LSC rack to try and set up a temporary arrangement whereby I take the signals from the DAC differentially and route them to the D990694 differentially. The situation is complicated by the fact that, afaik, we don't have any break out boards for the DIN96 connectors on the back of all our Eurocrate cards (or indeed for many of the other funky connecters we have like IDE/IDC 10,50 etc etc). I've asked Steve to look into ordering a few of these. So I tried to put together a hacky solution with an expansion card and an IDC64 connector. I must have accidentally shorted a pair of DAC pins or something, because all models on the c1lsc FE crashed. On attempting to restart them (c1lsc was still ssh-able), the usual issue of all vertex FEs crashing happened. It required several iterations of me walking into the lab to hard-reboot FEs, but everything is back green now, and I see the AS beam on the camera so the input pointing of the TTs is roughly back where it was. Y arm TEM00 flashes are also seen. I'm not going to re-align the IFO tonight. Maybe I'll stick to using a function generator for the THD tests, probably routing non AI-ed signals directly is as bad as any timing asynchronicity between funcGen and DAQ system...
I decided to try doing the THD measurement with a function generator. Did some quick trials tonight to verify that the measurement plan works. Note that for the test, I turned off the z=15,p=150 whitening filter - I'm driving a signal at ~100Hz and should have plenty of oomph to be seen above ADC noise.
I'm going to work on putting together some code that gives me a quick readback on the measured THD, and then do the test for real with different amplitude input signal and whitening gain settings.
**Matlab has a thd function, but to the best of my googling, can't find a scipy.signal analog.
To remind myself of the problem, summarize some of the discussion Koji and I had on the actual problem via email, and in case I've totally misunderstood the problem:
So my question is - should we just cut the PCB trace and add this series resistance for the 4 ALS signal channels, and THEN measure the THD? Since the DC voltage level of the ALS signal is expected to be of the order of a few volts, we know we are going to be in the problematic regime where #11 and #12 become issues.
> So my question is - should we just cut the PCB trace and add this series resistance for the 4 ALS signal channels, and THEN measure the THD?
Correcting a mistake in my earlier elog: the D990694 is NOT differential receiving, it is single ended receiving via the front panel SMA connectors. The aLIGO version of the whitening board, D1001530 has an additional differential-to-single-ended input stage, though it uses the LT1125 to implement this stage. So the possibility of ground loops on all channels using this board will exist even after the planned change to install series resistance to avoid current overloading the preceeding stage.
Some points before we can set up the can:
Also, I need to eventually remake the connections on my circuit board because they are all currently test points. I also need to find a box for the heater circuit and figure out what to do with the MOSFET and heat sink for it. This can either be done before setting everything up, or we can just change it later once we have the final setup for the can ready.
If all of this looks good then we can begin the setup.
After labeling all cables, I pulled out one of the D990694s in the LSC rack (the one used for the ALS X signals, it is Rev-B1, S/N 118 according to the sticker on it).
Took some photos before cutting anything. Attachments #1-3 are my cutting plans (shown for 1 channel, plan is to do it for both ALS channels coming into this board). #1 & #2 are meant to show the physical locations of the cuts, and #3 is the corresponding location on the schematic. These are the most convenient locations I could identify on the board for this operation.
I don't know what the purpose of resistors R196, R197, R198 are. I'm assuming it has something to do with the way the ADG333ABR switches. The aLIGO board uses a different switch (MAX4659EUA+), and doesn't have an analogous resistor (though from what I can tell, it too is a CMOS SPDT switch just like the ADG333ABR, just has a lower ON resistance of 25ohm vs 45ohm for the ADG333ABR).
As for the actual resistance to be used: Let's say we don't have signals > 5V coming into this board. Then using 301ohms (as in the aLIGO boards) in series means the peak current draw will be <20mA, which sounds like a reasonable number to me. Larger series resistance is better, but I guess then the contribution of the current noise of the OpAmp keeps increasing.
We set up a new rail for the Sorensens (attachment 1) and placed one of them down on this new rail (attachment 2). Unfortunately the older rail that had been used to support the other Sorensens (the top one in attachment 1) is thick and does not allow another one of the Sorensens to slide in between the current ones. So we will have to support all the ones on top with a temporary support, take out the old rail, and then insert the new ones before letting the new bottom rail carry the weight of all of the Sorensens. We will do that tomorrow.
In addition, we have to figure out how to lead all the cables to the can, but there are no holders on the side of the lab to do so. So, we decided that we would have a new one installed on the side shown in attachment 3 so that we wouldn't have to place the wires along the floor.
Also, there has been some space made for the can along with the new insulation. The stuff mounted on the wall was removed and will be reattached tomorrow so that it doesn't get in the way of the can anymore.
This is proving much more challenging than I thought - while Cut #1 was easy to identify and execute, my initial plan for Cut #2 seems to not have isolated the input of the second opamp (as judged by DMM continuity). Koji pointed out that this is actually not a robust test, as the switches are in an undefined state while I am doing these tests with the board unpowered. It seems rather complicated to do a test with the board powered out here in the office area though - and I'd rather not desolder the 16 and 20 pin ICs to get a better look at the tracks. This PCB seems to be multilayered, and I don't have a good idea for what the hidden tracks may be. Does anyone know of a secret place where there is a schematic for the PCB layout of this board? The DCC page only has the electrical schematic drawings, and I can't find anything useful on the elog/wiki/old ilog on a keyword search for this DCC document number. The track layout also is not identical for all channels. So I'm holding off on exploratory cuts.
*I've asked Ben Abbott/Mike Pedraza about this and they are having a look in Dale Ouimette's old drives to see if they can dig up the Altium/Protel files.
I quickly put together some code that calculates the THD from CDS data and generates a plot (see e.g. Attachment #1).
I conducted a trial on the Y arm ALS channel whitening board (while the X arm counterpart is still undergoing surgery). With the whitening gain set to 0dB, and a 1Vpp input signal (so nothing should be saturated), I measure a THD of ~0.08% according to the above formula. Seems rather high - the LT1125 datasheet tells us to expect <0.001% THD+N at ~100Hz for a closed loop gain of ~10. I can only assume that the digitization process somehow introduces more THD? Of course the FoM we care about is what happens to this number as we increase the gain.
We installed and labeled the Sorensens today.
Our 3 cranes passed professional inspection. Fred Goodbar of Konacrane with 450 lbs load at full extension.
Certificates will be posted in 40m wiki as they arrive.
Gautam and Steve,
The "called 225 lbs" steel crane load measured right on 102 kg
The trick to the measurment to maintain 1 mm gap to the central cilynder of the load cell.
The lead plate stabilized the large load.
gautam: some additional notes:
The main motivation for this work is that I want +15VDC power available on the PSL table to hookup the Teledyne box that Koji made a week ago and do some noise measurements on my revised IR ALS signal chain. But I think this is a good opportunity to effect a number of changes I've been wanting to do for a while.
Tomorrow, Steve and I will do the following:
So in summary, we will need, at 1X1, (at least, including 1 spare for future work):
We completed this work today. Need to clean up a little (i.e. coil excess cable lengths, remove unused cables etc), which we will do tomorrow. All connections have been made at the DIN rail end, but the fuses have not been inserted yet, so there is no voltage reaching the PSL table on any of the newly laid out cables. We also need to establish two +15VDC connections at the DIN rail side. I may establish this later in the evening, as the main point of this work was to get the Teledyne signal path operational. Setting up these DIN connectors is actually a huge pain, we tried to setup a few extra ports for the voltages we used today so that in future, life is easier for whoever wants to pipe DC power to the PSL table. The rule is, however, to re-establish the same number of open ports for each voltage as was available when you started.
For the ZHL-3A, Teledyne, and AOM driver cables, we used 18AWG, 2 conductor, twisted wire, while for the PSL fan we used 20AWG. For the FSS box, we decided to use the 3 conductor 24AWG twisted wire. I believe that these wire gauge choices are appropriate given the expected current in each of these paths.
Pictures + further details tomorrow.
gautam @ 1030pm: there was some mistake with the +15V wiring we did in the evening (the PSL fan and Teledyne cables were plugged into the wrong DIN terminal blocks). I fixed this, and also routed +15VDC to the newly installed set of terminal blocks for this purpose (since we had run out of +15VDC ports at 1X1). After checking voltages at both 1X1 and on the PSL table, I hooked up
to their newly laid out power supplies. IMC locks so looks like the FSS box is doing fine . So we can recover one bench power supply from under the PSL table on the east side. I didn't hook up the AOM driver just now because of some accessibility issues, and I'd also like to do an ALS beat spectrum measurement if possible.
I checked channels 6 and 7 on the ADC and they have long wires leading to BNC ends and are currently not being used, so we could probably just attach the temperature sensors to those channels.
I have been puzzled as to why the duty cycle of the EX green locks are much less than that of the EY NPRO. If anything, the PDH loop has higher bandwidth and comparable stability margins at the X end than at the Y end. I hypothesize that this is because the EX laser (Innolight 1W Mephisto) has actuation PZT coefficient 1MHz/V, while the EY laser (Lightwave 125/126) has 5MHz/V. I figure the EX laser is sometimes just not able to keep up with the DC Xarm cavity length drift. To test this hypothesis, I disabled the LSC locking for the Xarm, and enabled the SLOW (temperature of NPRO crystal) control on the EX laser. The logic is that this provides relief for the PZT path and prevents the PDH servo from saturating and losing lock. Already, the green lock has held longer than at any point tonight (>60mins). I'm going to leave it in this state overnight and see how long the lock holds. The slow servo path has a limiter set to 100 counts so should be fine to leave it on. The next test will be to repeat this test with LSC mode ON, as I guess this will enhance the DC arm cavity length drift (it will be forced to follow MCL).
Why do I care about this at all? If at some point we want to do arm feedforward, I thought the green PDH error signal is a great target signal for the Wiener filter calculations. So I'd like to keep the green locked to the arm for extended periods of time. Arm feedforward should help in lock acquisiton if we have reduced actuation range due to increased series resistances in the coil drivers.
As an aside - I noticed that the SLOW path has no digital low pass filter - I think I remember someone saying that since the NPRO controller itself has an in-built low pass filter, a digital one isn't necessary. But as this elog points out, the situation may not be so straightforward. For now, I just put in some arbitrary low pass filter with corner at 5Hz. Seems like a nice simple problem for optimal loop shaping...
gautam noon CNY2018: Looks like the green has been stably locked for over 8 hours (see Attachment #1), and the slow servo doesn't look to have railed. Note that 100 cts ~=30mV. For an actuation coefficient of 1GHz/V, this is ~30MHz, which is well above the PZT range of 10V-->10MHz (whereas the EY laser, by virtue of its higher actuation coefficient, has 5 times this range, i.e. 50MHz). Supports my hypothesis.
Having implemented the changes to the audio amplifier stage, I re-installed this unit at the LSC rack, and did some testing. The motivation was to determine the shape of the ALS error signal spectrum, so that I can design a whitening preamp accordingly. Attachment #1 is the measurement I've been after. The measurement was taken with EX NPRO PDH locked to the arm via green, and Xarm locked to MC via POX. Slow temperature relief servo for EX NPRO was ON. Here are the details:
Conclusion: In the current configuration, with x10 gain on the demodulated signals, we barely have SNR of 10 at ~500Hz. I think the generic whitening scheme of 2 zeros @15Hz, 2poles@150Hz will work just fine. The point is to integrate this whitening with the preamp stage, so we can just go straight into an AA board and then the ADC (sending this signal into D990694 and doing the whitening there won't help with the SNR). Next task is to construct a test daughter board that can do this...
The forline pressure of TP3 was 399 mTorr
It was replaced this morning at TP3 controller 134,638hrs with the "failed TP2 station" drypump. The foreline pressure now at TP3 is 100 mTorr at 6 hrs of operation.[ at day 3 63 mT ]
IFO pressure at CC Hornet 7.9e - 6 Torr
Valve configuration: vacuum normal as TP3 is the forepump of the Maglev & the annuloses are not pumped
PSL shutter closed at 6e-6 Torr-it
The foreline pressure of the drypump is 850 mTorr at 8,446 hrs of seal life
V1 will be closed for ~20 minutes for drypump replacement..........
9:30am dry pump replaced, PSL shutter opened at 7.7E-6 Torr-it
Valve configuration: vacuum normal as TP3 is the forepump of the Maglev & annuloses are not pumped.
TP3 drypump replaced at 655 mTorr, no load, tp3 0.3A
This seal lasted only for 33 days at 123,840 hrs
The replacement is performing well: TP3 foreline pressure is 55 mTorr, no load, tp3 0.15A at 15 min [ 13.1 mTorr at d5 ]
Valve configuration: Vacuum Normal, ITcc 8.5E-6 Torr
Dry pump of TP3 replaced after 9.5 months of operation.[ 45 mTorr d3 ]
The annulosses are pumped.
Valve configuration: vac normal, IFO pressure 4.5E-5 Torr [1.6E-5 Torr d3 ] on new ITcc gauge, RGA is not installed yet.
Note how fast the pressure is dropping when the vent is short.
IFO pressure 1.7E-4 Torr on new not logged cold cathode gauge. P1 <7E-4 Torr
Valve configuration: vac.normal with anunulossess closed off.
TP3 was turned off with a failing drypump. It will be replaced tomorrow.
All time stamps are blank on the MEDM screens.
c1mcs had died for some reason. Looking at dmesg, I see:
None of the other EPICS processes died. Not sure what to make of this. I was at the PSL table working, and had closed the PSL shutter to avoid MC autolocker trying to keep the MC locked while I was mucking about, but this shouldn't have had any effect on an EPICS process?
Anyway, I just logged into c1sus, stopped and restarted the model. IMC locks fine now.