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ID Date Authorup Type Category Subject
  1329   Fri Feb 20 03:52:23 2009 YoichiUpdateLockingLocking Tonight
Yoichi, Peter

Tonight, we had a problem with the DD hand off.
It failed when the RG filters of MICH for the bounce-roll modes are engaged.
The reason for the failure was that the MICH UGF was too low (~10Hz).
As in the Peter's elog entry, we found that the AS PDs are mis-centered.
Even after we fixed the centering, the MICH UGF was still too low. So we increased the MICH feedback gain by a factor of 10.
The reason for the gain decrease is unknown. It seems almost like the BS coils get weaker.
I checked the UGF of the BS OL loops. These are around 4Hz, so fine. We should check the HWP on the AP table tomorrow.

After the DD hand-off goes ok, the switching of DARM signal from DC to RF failed.
I found that the gain and the polarity of the RF signal were wrong.
AS166 is one of the PDs we found mis-centered (and re-centered). But how can you flip the sign of the signal ?

After this, the cm_step script goes until the activation of the moving zero, but fails when the arm power is increased to 0.7.
Also the ontoMCL script succeeds only 50% of the time.
  1330   Fri Feb 20 19:31:16 2009 YoichiUpdateLSCMICH low gain problem
Last night, we found that MICH UGF was too low. Even after re-aligning the PDs, it was still too low.
Today, I compared the UGFs of MICH and PRC when in the DRMI configuration locked with the single demod. signals.
In this configuration, MICH signal comes from REFL33Q and the PRC signal comes from REFL33I (the same PD).
The PRC UGF was about 100Hz whereas MICH was only ~10Hz.
Since they uses the same PD, the low gain is not caused by the PD.
I checked conlog history and confirmed there is no change in the MICH->BS path in the last few days.
I also checked the svn history of chans directory for changes in filters. Nothing problematic found.

Then I noticed that the susvme computers were overloaded.
This time, I rebooted all the FE computers just in case.

Then the MICH gain was somewhat recovered (by a factor of 3 or so). Don't know why.

I adjusted the DD_handoff script to set the MICH gain to 0.7 before the bounce-roll filter is engaged.
  1334   Tue Feb 24 02:23:40 2009 YoichiUpdateLockingLocking - MC board bad
Rob, Yoichi, Alberto, Kiwamu, Kakeru

We found that the OMC alignment feedback was on for the POS X loop even though the OMC was not locked.
This caused the PZT mirror to be tilted in yaw a lot. This was probably the reason for the mysterious shift in the AS beam last week, because the AS RF beam is picked up after this PZT mirror.
Rob aligned the OMC and we re-centered the AS PDs and the CCD.
This changed the DARM RF gain, so we changed it from 3 to 1. This gain used to be -1. It is still not understood why the polarity was changed.
The MC length was changed ? We should check the sideband transmission.

After this, we reached to the arm power 4. But the IFO loses lock immediately after the moving zero is turned off.
At this stage, the CARM loop bandwidth is supposed to be high enough that the moving zero is no longer necessary.
However, when we measured the MCL loop gain with several different AO path gains, the loop shape did not change at all.
This led us to suspect the AO path may not be connected. The cabling from the common mode board to the MC board seemed ok.
We tested the signal flow in the MC board using a signal generator and an oscilloscope.
Then we found that a signal injected to the IN2 (AO path) does not reach to the TP1A (right after the boost stages), though the signal is visible in the OUT2 (monitor BNC right after the initial amplifier (B-amp) for the AO path). The signal from IN1 (MC REFL) can be observed at TP1A. This means something is broken between the B-amp and the sum-amp in the AO path.
We will check the MC board tomorrow.
  1336   Wed Feb 25 03:10:24 2009 YoichiUpdateLockingLocking status
Rob, Yoichi, Kakeru, Kiwamu

Tonight, CARM -> MCL hand off was not stable. The MCF signal monotonically went up to +2V after CARM and MCL gain was turned down to zero.
This was repeatable and it only goes up (not down).
After a while, we found that putting sleep (~5sec) between the zeroing of CARM gain and MCL gain prevents this problem.

Handing off of CARM error signal from TR to PODC was also not robust.
It seems that the suitable gain changes every time.

tdsavg started to exit with errors. We rebooted fb40m.
When tdsavg returns an error, the cm_step script tries to write NaN into SPOB DC offset.
To prevent this, I put the tdsavg in a while loop which runs until tdsavg returns something other than NaN.

I was able to hand off to PODC several times, but could not proceed further because the IFO lost lock soon.
  1338   Thu Feb 26 00:36:53 2009 YoichiSummaryComputersC1:LSC-TRX_OUT broken (and fixed later).
Today, Kakeru tried to convert C1:LSC-TRX_OUT and C1:LSC-TRY_OUT to DAQ channels.
He edited C1LSC.ini in the chans/daq directory to add the channel but it did not work.
Then he reverted the file back to the original one.
But after we still could not access these channels from dataviewer nor tds tools.
We restarted daqd and tpman on fb40m, but the problem persisted. Even rebooting the whole fb40m did not help.
After inspecting the log file of daqd, it was clear that tpman was failing to create test points for those channels.
I rebooted c1daqawg and then restarted tpman and daqd on fb40m again.
This time, the problem went away.
  1339   Thu Feb 26 01:24:44 2009 YoichiUpdateComputersMartian wireless is back
Today, a new wireless router arrived.
I configured and installed it. Now the martian wireless network is back.
I updated the wiki page about the wireless network.
http://lhocds.ligo-wa.caltech.edu:8000/40m/Network
  1340   Thu Feb 26 19:20:08 2009 YoichiConfigurationGeneralETMX camera centered. POX, POY PDs centered
Alberto, Yoichi

We centered the ETMX camera.
Alberto centered the POX and POY PDs.
We also updated the offset values of PD3 and PD4.
  1341   Thu Feb 26 19:59:23 2009 YoichiUpdateLockingDaytime locking
Osamu, Yoichi

We tried locking today from about 2PM.
It took about 1000sec on average to acquire the initial lock.
After the initial lock is achieved, the hand-off/ramp-up steps were reasonably robust, although the AS beam sometimes fluctuates a lot (not good for mental health).

Like last night, the IFO loses lock at around arm-power=8.
We measured the CARM AO path loop gain at arm-power=4. We used the SR785 connected to the A-excitation channel of the common mode board through my TFSR785.py script.

The first attachment is the transfer function measured right after the arm power was ramped up to 4.
The overall bandwidth of the CM servo is only 400Hz. Note that since this is the loop gain of only the AO path, the low frequency gain is eaten by the MCL path.
The second attachment is the same transfer function measured after the AO path gain was increased by 6dB.
It is evident that the AO path is working.
We increased both the AO path and MCL gain by 18dB. The third attachment is the AO path TF in this state.
We then increased the arm power but lost lock at arm-power=6. We should have checked the DARM loop too.
BTW, these plots are automatically generated when you use TFSR785.py for transfer function measurements.


I added -notickle option to c1_watch_dr_bang, since tickling seems to be not necessary during the daytime (actually the initial lock was easier with no tickling).

As the construction work in the next building is now calmed down, I think it is ok to do locking during the day time, though I still plan to come at night.
The improvement of my brain efficiency during the day time may compensate for the longer wait time for initial lock.
Attachment 1: CM1.png
CM1.png
Attachment 2: CM2.png
CM2.png
Attachment 3: CM3.png
CM3.png
  1342   Thu Feb 26 20:09:32 2009 YoichiHowToComputersSR785 python scripts now produce plots
I updated the python scripts to remotely perform measurements with an SR785.
Now these scripts can plot the results immediately using python's matplotlib capability. The sample plots can be seen in my previous elog entry.
In addition to the transfer function (TFSR785.py) and spectrum measurement (SPSR785.py) scripts, I also wrote a script for time series measurements (TSSR785.py).
This is useful when you want to check the signal level flowing in the channels before determining the excitation amplitude.
TSSR785.py will measure and show the time series and histogram of the signal measured by the SR785.
More detailed usage is explained in this wiki page:
http://lhocds.ligo-wa.caltech.edu:8000/40m/netgpib_package
  1344   Mon Mar 2 03:57:44 2009 YoichiUpdateLockingSunday night locking
Tonight's locking started with a boot fest of the FE computers which were all red when I came in.
It also took me sometime to realize that C1:IOO-MC_F was returning always zero to tdsavg, causing the offloadMCF script to do nothing.
I fixed this by rebooting c1iovme and c1iool0.

Like Rob on the thursday night, I was only able to reach arm power around 10.
This time, I turned down the MC WFS gain to 0.02 (from 0.3).
I also checked gains of most of the loops (MICH, PRC, SRC, DARM, CARM-MCL, CARM-AO).
All the loops looked fine until the lock was lost suddenly. Also the spectrum of MC_F did not change as the arm power was ramped up.
Actually, I was able to reach arm power=10 only once because I spent a long time checking the loop gains and spectrum at fine steps of the arm power.
So it is quite possible that this loss of lock was just caused by a seismic kick.
  1346   Mon Mar 2 21:16:32 2009 YoichiUpdateLockingLow-gain High-gain PD switching may not be working well
Osamu, Yoichi

This afternoon, I run the locking script while doing calculations for the upgrade.
The IFO lost lock even at lower arm powers (around 6) if it was operated for a while (~ 5min).
It seemed as if there were some intermittent glitches (seismic? laser?) causing the lock losses.
We also saw once the TRX and TRY signals saturated at around arm power = 11 when there was a large fluctuation in the arm power.
Osamu suggested that it looked like the high-gain to low-gain PD switching was not working.

I won't come tonight as I may have caught a cold, but if someone comes tonight, it is worth checking the PD switching.
  1350   Tue Mar 3 19:26:44 2009 YoichiUpdateLockingLow-gain High-gain PD switching may not be working well
I checked the switching of the QPDX from high gain to low gain.
Switching happens as expected, but the low gain QPDX output was very low compared to QPDY.
Also the digital gain for the high gain TRX was not matched with the low gain one. So when the switching happens, there is a large jump in the TRX.

I also found that the offset values for the low gain QPDX were totally wrong. I adjusted it.
Then I removed a beam splitter in front of the QPDX to increase the power falling on it.
But still the low gain QPDX output is four times lower than the low gain QPDY.

I'm still working on it. So don't expect the switching to work correctly at this moment.
I'm planning to be back after the dinner.


Quote:
Osamu, Yoichi

This afternoon, I run the locking script while doing calculations for the upgrade.
The IFO lost lock even at lower arm powers (around 6) if it was operated for a while (~ 5min).
It seemed as if there were some intermittent glitches (seismic? laser?) causing the lock losses.
We also saw once the TRX and TRY signals saturated at around arm power = 11 when there was a large fluctuation in the arm power.
Osamu suggested that it looked like the high-gain to low-gain PD switching was not working.

I won't come tonight as I may have caught a cold, but if someone comes tonight, it is worth checking the PD switching.
  1351   Tue Mar 3 23:59:26 2009 YoichiUpdateLockingLow-gain High-gain PD switching may not be working well

Quote:
I checked the switching of the QPDX from high gain to low gain.
Switching happens as expected, but the low gain QPDX output was very low compared to QPDY.
Also the digital gain for the high gain TRX was not matched with the low gain one. So when the switching happens, there is a large jump in the TRX.

I also found that the offset values for the low gain QPDX were totally wrong. I adjusted it.
Then I removed a beam splitter in front of the QPDX to increase the power falling on it.
But still the low gain QPDX output is four times lower than the low gain QPDY.

I'm still working on it. So don't expect the switching to work correctly at this moment.
I'm planning to be back after the dinner.



This sounds like the QPD whitening gain sliders may be stuck. The slider twiddling script should be run, or the sliders should be twiddled by hand.
  1352   Wed Mar 4 03:37:51 2009 YoichiUpdateLockingLow-gain High-gain PD switching may not be working well

Quote:

This sounds like the QPD whitening gain sliders may be stuck. The slider twiddling script should be run, or the sliders should be twiddled by hand.


Yes, it was indeed the whitening gain slider problem.
I moved them and the QPDX gain went up suddenly. I reinstalled the BS in front of the QPDX and adjusted the offsets, gains accordingly.
Now the high-gain to low-gain switching is fine.
  1353   Wed Mar 4 03:50:17 2009 YoichiUpdateLockingStill won't go above arm power 10
Yoichi, Kentaro

The IFO still loses lock at around arm power 10.
I attached time series of various error signals when losing lock.
In all of the three cases, both of the arm powers go up rapidly just before losing lock.
(The first attachment was taken before I fixed the QPDX switching, so you can see saturation in TRX.)
But PD1_DC (the DC power in the PRC) did not go up in the third case.

I should also check correlations with laser power, CARM length (OSEM signals), seismic noise etc.
Attachment 1: lockLoss1.png
lockLoss1.png
Attachment 2: lockLoss2.png
lockLoss2.png
Attachment 3: lockLoss3.png
lockLoss3.png
  1356   Wed Mar 4 17:59:14 2009 YoichiConfigurationComputersezca tools and tds tools work around
Some of ezca commands and tds commands sporadically fail with a segmentation fault on linux machines.
As far as I know, ezcawrite, ezcastep, ezcaswitch, and tdswrite have this problem.
These are commands to write values into epics channels. So usually people do not check the exit status of those commands in their scripts.
This could cause incomplete execution of, for example, down scripts.
Ideally, this problem should be fixed in the source codes of the problematic commands.
However, I don't have a patience to wait it to happen, and I needed to fix these problems immediately for the lock acquisition.
So I resorted to a hacky solution.
I renamed those commands to *.bin, e.g. ezcawrite -> ezcawrite.bin.
Then wrote wrapper scripts to repeatedly call those commands until it succeeds.
For example, ezcawrite now looks like,
#!/bin/csh -f
setenv POSIXLY_CORRECT
while (! { ezcawrite.bin $* })
      echo "Retry $0 $*"
end
So, when ezcawrite.bin fails, the command retries it and show a message "Retry ....".

If you need to call the original commands, you can always do so by adding ".bin" at the end of the command name.
Currently the following commands are wrapped.
ezcawrite, ezcaservo, ezcastep, ezcaswitch, tdswrite, tdssine.

Please let me know if you have any trouble with this.
  1361   Thu Mar 5 05:07:09 2009 YoichiUpdateLockingWednesday night locking
Tonight, I was having a problem with the PO_DC hand-off.
It fails most of the time.
I increased the averaging time for the PD1_DC offset measurement.
I also wrote a script to match the gain of the transmission DC and the PO_DC signals.
This script (/cvs/cds/caltech/scripts/CM/matchPODCGain ) measures the gains of the old (TRX+TRY) and new (PO_DC) signals at 150Hz and returns the optimal value to be put into the input matrix.
cm_step script calls matchPODCGain to determine the matrix element value for the PO_DC signal.

Even with this script, the hand-off was still unreliable.
I checked the AO path loop gain just before the hand off. It looked normal.
Then I realized that the oscilloscope I hooked up to the PO_DC signal using a T-BNC may be introducing some noise into the channel.
So I removed it. Then the PO_DC hand off went well at least once.
The IFO still loses lock at around arm power 10.

I attached time series of the latest lock loss. The second attachment is a zoom of the first one.
This time, there is a glitch in the ETM feedback signals, which is also present in the DARM and CARM and error signals.
I saw this kind of glitches several times today.
Attachment 1: lockLoss5.png
lockLoss5.png
Attachment 2: lockLoss5-zoom.png
lockLoss5-zoom.png
  1364   Fri Mar 6 05:44:14 2009 YoichiUpdateLockingLocking distracted by the QPD whitenning problem again
Tonight, I was able to ramp up the arm power to around 20. Then the DARM loop started to oscillate and the IFO lost lock in a few seconds.
I repeated this several times, then realized that the transmission QPDs were not working properly again due to the well known sticky slider problem.
I should have run slider_twiddle script. Since the DARM RF signal is normalized by the sqrt(TRX+TRY), it is reasonable that the DARM loop got unstable.

The fact that I was able to go up to arm power = 20 means there is nothing saturating below this power level.
  1365   Fri Mar 6 15:23:39 2009 YoichiUpdateLockingLocking distracted by the QPD whitenning problem again
By looking at the time series of DARM signal at the time of a lock loss, the oscillation frequency was about 3.5kHz (see the attm1 and its zoomed version attm2).
I will measure the DARM loop gain around this frequency next.


Quote:
Tonight, I was able to ramp up the arm power to around 20. Then the DARM loop started to oscillate and the IFO lost lock in a few seconds.
I repeated this several times, then realized that the transmission QPDs were not working properly again due to the well known sticky slider problem.
I should have run slider_twiddle script. Since the DARM RF signal is normalized by the sqrt(TRX+TRY), it is reasonable that the DARM loop got unstable.

The fact that I was able to go up to arm power = 20 means there is nothing saturating below this power level.
Attachment 1: lockLoss3.pdf
lockLoss3.pdf
Attachment 2: lockLoss3-zoom.pdf
lockLoss3-zoom.pdf
  1366   Fri Mar 6 18:14:58 2009 YoichiUpdateComputersawg not working
Starting from this afternoon, the awg is not working.
I rebooted FE computers, c0daqawg as well as tpman and daqd processes on fb40m several times.
But the problem is still there.
I sent an email to Alex.
  1367   Fri Mar 6 18:22:42 2009 YoichiSummaryComputersScripts to restart the FE computers
While doing locking, the FE computers are overloaded sometimes and I have to reboot them.
Being sick of logging into the FE computers one by one to start front end codes, I wrote scripts to do this automatically.
The scripts are in /cvs/cds/caltech/scripts/FE/.
For example, you can restart c1lsc by typing
restartFE c1lsc
You can give multiple computer names to the restartFE command like,
restartFE c1lsc c1asc c1susvme1

To restart all the FE computers, type
restartFE all

For the scripts to work properly, the computers have to accept login, i.e. you either have to power cycle the computers or push "Reset" buttons on the RFMNETWORK medm screen prior to running the scripts.
  1368   Fri Mar 6 18:26:37 2009 YoichiConfigurationComputersezca tools and tds tools work around
I updated the wrapper scripts so that they do not retry more than 6 times.
Otherwise, the wrapper scripts loop over infinitely when you give wrong arguments.



Quote:
Some of ezca commands and tds commands sporadically fail with a segmentation fault on linux machines.
As far as I know, ezcawrite, ezcastep, ezcaswitch, and tdswrite have this problem.
These are commands to write values into epics channels. So usually people do not check the exit status of those commands in their scripts.
This could cause incomplete execution of, for example, down scripts.
Ideally, this problem should be fixed in the source codes of the problematic commands.
However, I don't have a patience to wait it to happen, and I needed to fix these problems immediately for the lock acquisition.
So I resorted to a hacky solution.
I renamed those commands to *.bin, e.g. ezcawrite -> ezcawrite.bin.
Then wrote wrapper scripts to repeatedly call those commands until it succeeds.
For example, ezcawrite now looks like,
#!/bin/csh -f
setenv POSIXLY_CORRECT
while (! { ezcawrite.bin $* })
      echo "Retry $0 $*"
end
So, when ezcawrite.bin fails, the command retries it and show a message "Retry ....".

If you need to call the original commands, you can always do so by adding ".bin" at the end of the command name.
Currently the following commands are wrapped.
ezcawrite, ezcaservo, ezcastep, ezcaswitch, tdswrite, tdssine.

Please let me know if you have any trouble with this.
  1369   Sat Mar 7 16:50:25 2009 YoichiUpdateComputersNot even data retrieval working
Now our digital system is really in trouble.
We can't even get data from tp channels.

I did another round of computer reboots, this time including the RFM bypass switch, c0daqctrl, c0dcu1 and fb40m itself.
But the problem still persists.

I guess there is nothing I can do until Alex comes in.
  1374   Mon Mar 9 12:04:18 2009 YoichiUpdateComputersTPs and AWG are back
I had to do one more reboot of tpman and daqd to get the TPs working.
I confirmed the alignment scripts run fine.

Now the oplevs of some optics are largely mis-centered. Alberto and I will center them after lunch.
  1380   Mon Mar 9 23:13:22 2009 YoichiUpdateComputer Scripts / Programstdsdata doesn't work

Quote:

We confirmed that new tds(/cvs/cds/caltech/apps/linux/tds_090304/) works well on linux 64, and replaced it to /cvs/cds/caltech/apps/linux/tds/

The old /cvs/cds/caltech/apps/linux/tds is put in /cvs/cds/caltech/apps/linux/tds.bak

 The tdscntr.pl in the new tds was probably the one from LLO, which is actually the version I sent to Tobin. It had paths and channel names defined for the LLO. So I copied back my original 40m version.

  1382   Tue Mar 10 04:55:41 2009 YoichiUpdateLockingLocking: 3.7kHz large oscillation
Yoichi, Jenne, Alberto,

As I reported on the last Thursday, there is a large oscillation in CARM and DARM error signals (attm1).
I put notch filters (3.75kHz, Q=10, 30dB) in the CARM and DARM loops. This let us go up to the arm power of more than 20 and stay there for a while.
The dashed curves in the attm1 are the spectra when the notches are off, and the solid curves are when the notches are used.
We could somewhat suppress the DARM peaks but not CARM.
Of course this is clearly not a good solution. We should find the cause of the oscillation and kill it.

Attm2 is the spectrum of the PO_DC signal flowing in the CM board measured by the SR785. More specifically, CH1 is TP1A and CH2 is TP2A of the CM board.
This was taken right after the AO path was engaged. At this stage, the AO path gain is very low. But you can already see a seed of the oscillation in the spectrum.

Attm3 shows the same spectra taken after the arm power is increased to 4 but before the PO_DC hand off. You can see large peaks around 3.75kHz.
After this, the peaks grow as the power goes up.

Attm4 is the loop gain of the AO path after the PO_DC hand off (arm power = 4).
Attm5 is the zoom of the same TF around 3.7kHz. Clearly there is something wrong at this frequency. We should check the CM board and the MC board as well as the SPOB PD.

One time I was able to go up to arm power = 27 or so. At this power level, the DARM loop started to oscillate, probably, around the UGF.
However because of the 3.7kHz problem, we can't stay at this power level long enough to make diagnostic measurements (like open loop TF).
We should tackle the 3.7kHz issue first.
Attachment 1: CARM_DARM_Spectra.pdf
CARM_DARM_Spectra.pdf
Attachment 2: PODC_Spe_AOPath_Engaged.png
PODC_Spe_AOPath_Engaged.png
Attachment 3: PODC_Spe_before_PODC_handoff.png
PODC_Spe_before_PODC_handoff.png
Attachment 4: AOGain3.png
AOGain3.png
Attachment 5: AOGain2.png
AOGain2.png
  1388   Wed Mar 11 16:53:48 2009 YoichiUpdateLockingJunks in around kHz
Rana, Yoichi

Last night, we tried to find out the source of the kHz region peaks in the DARM and CARM error signals.
These peaks are also present in the error signal of the single arm locking by RF (both X and Y).
The attachment 1 shows spectra of MC_F and XARM error signal when XARM is locked by the POX PDH signal.
There is a sharp peak at 3.8kHz in MC_F. This peak was there in a reference spectrum taken on June 24 2008.

In the XARM error signal, there is also a broad peak around 3.8kHz. This peak moves between 3.75kHz and 3.8kHz from time to time.
(the brown curve was taken when the peak moved to 3.75kHz).
Also there is a notch like structure at 3.8kHz in the XARM error spectrum. Looks like the peak in the MC_F is creating a notch here, but
no idea why.

We tapped on the PSL table, the end chambers and the SPOB table and looked at the spectra to see if there is any change.
Rana also developed a cool Walkie-Talkie excitation technique, where he put one of the walkie-talkies on the PSL table by the MZ and yelled at the other one while looking at a DTT screen in the control room.
None of these had any effect on the XARM error, while MC_F responded to the disturbances.

We also turned on and off the steering mirror PZT closed loop buttons, moved the PMC, MZ and the ISS gain sliders and changed the MC gain, offset.
Nothing affected the XARM error.

Osamu found old spectra of the XARM signal (attm2). The legends say DARM but these are XARM signals.
Almost the same structures can be seen including the notch at 3.8kHz. Seems like it's been like this for long time.

We should check, RF-AM, MC coil dirivers, Piezo-Jena noise etc.
Attachment 1: MC_F-XARM.pdf
MC_F-XARM.pdf
Attachment 2: old-xarm.pdf
old-xarm.pdf
  1390   Wed Mar 11 22:57:48 2009 YoichiUpdateLockingCalibrated XARM error signal spectrum
I did a rough calibration of the XARM error spectrum.
See the attached calibrated spectrum.

I started from this Rana's elog entry.
http://www.ldas-sw.ligo.caltech.edu/ilog/pub/ilog.cgi?group=40m&task=view&date_to_view=04/07/2005&anchor_to_scroll_to=2005:04:07:20:28:36-rana

I first injected a 20Hz sin signal into C1:SUS-ETMX_LSC_EXC and measured the response to the ETMX SUSPOS.
Using the calibration of the SUSPOS given in the above entry, I calibrated the ETMX coil actuation efficiency.
It was 3.4e-12 m/cnt @20Hz for C1:SUS-ETMX_LSC_EXC.

Then I locked the X-arm and injected a calibration peak at 20Hz.
From the ratio of the peaks in C1:SUS-ETMX_LSC_IN2 and C1:LSC-XARM_IN1, I calibrated the X-arm error signal to be 4.2e-13 m/cnt.
We have to also take into account the cavity pole of the arm, 1525Hz (the design value, may not be actual).
So I used the following calibration in the DTT:

G: 4.2e-13
P: 1525
Z:

Note that the attached spectrum shows the actual motion of the X-arm (or equivalent frequency noise) after suppressed by the feedback servo,
unlike conventional noise spectra showing "virtual" displacement which would have been induced in the absence of servos.
Attachment 1: XarmErrorSpeCalibrated.pdf
XarmErrorSpeCalibrated.pdf
  1393   Thu Mar 12 02:18:42 2009 YoichiUpdateLockingMC_I spectra (RF_AM)
I took several spectra of MC_I signal (see attm1).

The blue curve is when the MC was locked. The green curve (RF_AM) shows the MC_I spectrum when the MC is unlocked and MC2 is mis-aligned,
so that no resonance should happen. The brown curve is when the PSL shutter was closed (dark noise).
There are some structures in the green curve but not at 3.8kHz.

The second attachment compares the MC_I spectrum (the same as the green one in the first attachment) with the Xarm error signal.
Of course these two spectra were taken at different times.

Some of the peaks in the X-arm error signal seem to be coming from the MC RF_AM.
Attachment 1: MC_I_Spe.png
MC_I_Spe.png
Attachment 2: MC_I-Xarm.png
MC_I-Xarm.png
  1394   Thu Mar 12 15:57:53 2009 YoichiUpdateIOOMC drift is terrible
Yoichi, Osamu,

Last night's locking work was totally interrupted by the sabotage by the MC.

First, after I measured the RF_AM, the MC alignment was somehow shifted largely and the MC did not lock to TEM00 mode.
I only mis-aligned MC2 to measure the RF_AM, but the MC reflection beam was also shifted (looking at the WFS QPD), that means MC1 was mis-aligned somehow.
Moreover, even when the MC is not locked, i.e. no feedback to the mirrors, the OSEM values of the MC mirrors (all of them) drift a lot in 10min scale.
I was totally puzzled. So I rebooted c1iovme and c1sosvme. Then this strange drift of the OSEM values stopped.
Even though, the MC tended to lose lock within ten minutes because the WFS QPDs were not centered.
We did several iterations of re-centering and finally the MC started to stay locked happily. The MC reflection beam was symmetric.

Then this morning when I came in (to be honest, afternoon), the MC reflection looked asymmetric again. The WFS QPDs were mis-centered again.
The attached files show an 8-hour trend of various MC related signals.
There was a half-degree temperature change starting from around 11AM. Corresponding to that, the IOO-QPD signals drifted indicating that the PSL beam pointing
was shifted. The MZ PZT signal shows a similar trend, so the beam pointing may have been shifted by the MZ (not sure).
The MC WFS, transmission QPD signals show the same trend.
This is too bad.

Right now, the PSL beam pointing is monitored by the QPDs detecting the transmitted beam through the first mirror of the periscope.
This means even if we can track the beam pointing drift with the QPDs, we can't correct the beam pointing using the periscope mirrors.
I don't want to touch the MZ mirrors for this purpose.
I propose to put a pick-off mirror after the second mirror of the periscope to send light to the IOO-QPDs. This way, we can use the periscope
mirrors to restore the beam pointing screwed up by the MZ.
Attachment 1: MC_Drift-1.pdf
MC_Drift-1.pdf
Attachment 2: MC_Drift-2.pdf
MC_Drift-2.pdf
  1395   Thu Mar 12 18:44:02 2009 YoichiUpdatePSLMZ aligned
The MC lost the alignment somehow this afternoon.
So I thought it was good time to touch the MZ because I had to align the MC using the periscope anyway.

I mainly touched the mirror with a PZT. The MZ reflection went down from 0.5 to 0.3.
  1396   Thu Mar 12 18:48:37 2009 YoichiUpdateIOOMC aligned but ...
After the MZ alignment, I aligned the MC with the periscope mirrors.
It looked like the MC mis-alignment was mainly caused by the input beam change.
So I left the MC mirrors as they were to keep the output beam pointing.
However, after I finished the alignment, the MC output beam was too low on the Faraday.
Also the X-arm did not lock to TEM00 mode. So the MC mirrors must have also shifted to a weird alignment state.
I should have restored the MC mirror alignment to a good state using the OSEM DC signals.

Rana came in and restored the MC mirror alignment using the SUS drift mon.
He and Kakeru is now working on the periscope to align the beam into the MC.
  1399   Fri Mar 13 05:16:21 2009 YoichiUpdateLockingLocking update
Yoichi, Osamu,

With adjustments of the loop gains during the CARM offset reduction, the IFO reaches arm_power = 25 sort of robustly unless the 3.8kHz oscillation rings up.
At arm_power = 25, the CARM and DARM start to oscillate at around 400Hz. Probably I need more gain tweaks.
Annoying thing is that the 3.8kHz oscillation sometimes rings up suddenly and kills the lock.
This can happen anywhere above arm_power = 6 or so.
Because of a strange structure in the CARM loop gain around 3.8kHz, we cannot increase the CARM UGF beyond 1kHz.
The attached plots are the AO path open loop transfer function (attm2 is the zoom of attm1) measured at arm_power = 13.

Tomorrow, I will lock the X-arm and measure the transfer function from the AO path input to the X-arm error signal to see
if there is the same structure at 3.8kHz (X-arm error signal has the 3.8kHz peak).
Attachment 1: AOTF2.png
AOTF2.png
Attachment 2: AOTF2-zoom.png
AOTF2-zoom.png
  1400   Fri Mar 13 19:26:09 2009 YoichiUpdateDMFseisBLRMS compiled

 I compiled seisBLRMS.

The tricks were the following:

(1) Don't add path in a deployed command.
It does not make sense to add paths in a compiled command because it may be moved to anywhere. Moreover, it can cause some weird side effects. Therefore, I enclosed the addpath part of mdv_config.m in a "if ~isdeployed ... end" clause to avoid adding paths when deployed. Instead of adding paths in the code, we have to add paths to necessary files with -I options at the compilation time. This way, mcc will add all the necessary files into the CTF archive.

(2) Add mex files to the CTF archive by -a options.
For some reason, mcc does not add necessary mex files into the CTF archive even though those files are called in the m-file which is being compiled. We have to add those files by -a options.

(3) NDS_GetData() is slow for nodus when compiled.
NDS_GetData(), which is called by get_data() stops for a few minutes when using nodus as an NDS server.
This problem does not happen when not compiled. I don't know the reason. To avoid this, I modified seisBLRMS.m so that when an environmental variable $NDS is defined, it will use an NDS server defined in this variable.

I wrote a Makefile to compile seisBLRMS. You can read the file to see the details of the tricks.
I also wrote a script start_seisBLRMS, which can be found in /cvs/cds/caltech/apps/DMF/compiled_matlab/seisblrms/. To start seisBLRMS, you can just call this script.
At this moment, seisBLRMS is running on megatron. Let's see if it continues to run without crashing.

Quote:

The seisBLRMS has been running on megatron via an open terminal ssh'd into there from allegra with matlab running. This

is because I couldn't get the compiled matlab functionality to work.

Even so, this running script has been dying lately because of some bogus 'NDS' error. So for today I

have set the NDS server for mDV on megatron to be fb40m:8088 instead of nodus.ligo.caltech.edu. If this seems to fix the problem

I will make this permanent by putting in a case statement to check whether or not the mDV'ing machine is a 40m-martian or not.

  1401   Fri Mar 13 20:23:37 2009 YoichiUpdateLSCAO path transfer function with X-arm locked
I measured the AO path transfer function while the X-arm is locked with the POX PDH signal.
The POX-I signal was already connected to the input 1 of the CM board. So I injected a signal from the EXC-B channel of the board and measured the transfer function from TP2B to TP1A. To open the loop, I disabled the switch befor the EXC-B.
The attached plot shows the measured transfer function.
There is a bump around 2kHz, which can also be seen in the AO path TF posted in elog:1399, but not the large structure at around 3.8kHz.
The 3.8kHz structure is probably created by the feedback.
Attachment 1: AOPath-Xarm.png
AOPath-Xarm.png
  1402   Fri Mar 13 22:07:14 2009 YoichiUpdateLockingCalibrated XARM error signal spectrum
Of course I made a mistake.
I put a pole at 1525Hz whereas it should have been a zero.

The correct calibration factor is:
G: 4.2e-13
P:
Z: 1525

I attached a revised spectrum.


Quote:
I did a rough calibration of the XARM error spectrum.
See the attached calibrated spectrum.

I started from this Rana's elog entry.
http://www.ldas-sw.ligo.caltech.edu/ilog/pub/ilog.cgi?group=40m&task=view&date_to_view=04/07/2005&anchor_to_scroll_to=2005:04:07:20:28:36-rana

I first injected a 20Hz sin signal into C1:SUS-ETMX_LSC_EXC and measured the response to the ETMX SUSPOS.
Using the calibration of the SUSPOS given in the above entry, I calibrated the ETMX coil actuation efficiency.
It was 3.4e-12 m/cnt @20Hz for C1:SUS-ETMX_LSC_EXC.

Then I locked the X-arm and injected a calibration peak at 20Hz.
From the ratio of the peaks in C1:SUS-ETMX_LSC_IN2 and C1:LSC-XARM_IN1, I calibrated the X-arm error signal to be 4.2e-13 m/cnt.
We have to also take into account the cavity pole of the arm, 1525Hz (the design value, may not be actual).
So I used the following calibration in the DTT:

G: 4.2e-13
P: 1525
Z:

Note that the attached spectrum shows the actual motion of the X-arm (or equivalent frequency noise) after suppressed by the feedback servo,
unlike conventional noise spectra showing "virtual" displacement which would have been induced in the absence of servos.
Attachment 1: XarmErrorSpeCalibrated.pdf
XarmErrorSpeCalibrated.pdf
  1406   Mon Mar 16 12:26:59 2009 YoichiConfigurationIOOMC1 drift
There seems to be a large drift of MC1 even when there is no WFS feedback.
The attached plot is an example a 20min trend. You can see that MC1 OSEM signals drift significantly larger than that of MC2/MC3.
You can also be sure that there is no drifting voltage applied to the coils on the MC1 during this period.

If no one is working on the IFO today during the LV meeting, I'd like to leave the MC unlocked and see the trend of the MC1 OSEM signals.
Please do not turn on the MC auto locker unless you want to use the IFO.
If you want to do some measurements, please go ahead and lock the MC, but please write it down in the elog.
Thanks.
Attachment 1: MC1_Drift1.pdf
MC1_Drift1.pdf
  1408   Tue Mar 17 08:44:37 2009 YoichiConfigurationIOOMC1 drift
I'm done with the MC1 drift measurement.
The result is attached. It is clear that MC1 is in trouble. The small drifts in the MC2/MC3 are insignificant compared to the crazy MC1 behavior.
Since there is no drift in the coil feedback voltage monitors, it is probably not a problem of the DACs.
We may be able to fix this by pushing the cables for the MC1 satellite amplifier. But it may require replacement of the coil driver.


Quote:
There seems to be a large drift of MC1 even when there is no WFS feedback.
The attached plot is an example a 20min trend. You can see that MC1 OSEM signals drift significantly larger than that of MC2/MC3.
You can also be sure that there is no drifting voltage applied to the coils on the MC1 during this period.

If no one is working on the IFO today during the LV meeting, I'd like to leave the MC unlocked and see the trend of the MC1 OSEM signals.
Please do not turn on the MC auto locker unless you want to use the IFO.
If you want to do some measurements, please go ahead and lock the MC, but please write it down in the elog.
Thanks.
Attachment 1: MC1_Drift3.pdf
MC1_Drift3.pdf
  1409   Thu Mar 19 02:45:36 2009 YoichiConfigurationIOOA loose wire found for MC1
I found a loose connection of a wire in the cross-connect between an ADC and the MC1 coil driver's UL bias input.
I tightened it.
To see if this fixes the MC1 drift problem, I will do another round of MC1 drift measurement.
You can lock the MC if you need to use the IFO but please note it in the elog.

Thanks.
  1410   Thu Mar 19 10:45:43 2009 YoichiConfigurationIOOA loose wire found for MC1
I attached a 6-hour trend of the MC mirror OSEM signals with the MC unlocked.
The drift of the MC1 is within 20 counts (0.6um in terms of each OSEM).
This is comparable to the other MC mirrors.
Attachment 1: AfterWireFix-1.pdf
AfterWireFix-1.pdf
  1412   Fri Mar 20 12:07:19 2009 YoichiConfigurationASCETMY beam centering
I forgot to put this in the elog.
Last Sunday night, I centered the beam on the ETMY because it was too low.
To do so, I wrote scripts (beamCenterETMY-P and beamCenterETMY-Y) to continuously align the Y-arm while I'm moving the beam on the end QPD.
These scripts will continuously do the dithering servo and QPD centering in one direction (pitch for beamCenterETMY-P, yaw for the other).
So if you move the steering mirror in front of the end QPD, the servo will eventually move the beam spot on the ETM.
I centered the beam just by looking at the camera image.
No coupling measurements from Pitch/Yaw to length was done.
  1419   Tue Mar 24 03:05:25 2009 YoichiUpdateLockingLocking tonight
MC1 issue:
The MC1 seems to be drifting still. I found it was off from the SUS drift-mon reference values and restored the alignment using the SUS drift-mon before I went home for dinner.
But when I came back being happy with the Japanese victory over S-Korea at the WBC final, the MC was unhappy again.
I restored the alignment of the MC1 using the SUS drift-mon once again and centered the WFS QPDs.
I will leave the MC unlocked again tonight to see the drift. You are welcome to lock the MC in the morning as I will have corrected enough data by the time people come in.

Computer overloads:
I removed some filters from suspensions to off load susvme computers.
Nonetheless, both susvme1 and susvme2 are still over loaded during the dither alignment. The alignment results are in general ok. So this is not a too serious problem.
But still it would be nice to resolve.

3.8kHz hunting:
I made several measurements of the AO path loop gains (using the SR785) and the transfer functions from the CARM excitation (actuation to the ETMs) to the PO_DC signal as the arm powers are increased.
There is a similar structure as in the AO loop found also in the CARM->PO_DC transfer functions. This implies that the problem is likely to be in the PO_DC sensor not in the MC->VCO actuator. But the MC and the VCO could still be the
cause of the problem because they were in the control loop when the CARM->PO_DC TF were measured.
The peak frequency does not seem to depend on the arm power, but the conclusion is not definite because I was only able to measure the TFs from arm power 5 to 10 (not much difference).
I will make plots and post them later.

To Do for tomorrow:
Tonight the CARM error signal was noisier than the reference spectra (broad band white noise appeared). I should check the beam centering of the SPOB PD.
Also someone should center the oplevs of the mirrors as some of them are off.
Continue to measure the TFs at various power levels.
Try to put another (Thorlabs?) PD at the POB port to get PO_DC from it.
  1426   Wed Mar 25 04:18:28 2009 YoichiUpdateLockingTuesday Locking
After the new PO_DC PD was installed, I tweaked several gains to make the locking scripts work right.
First of all, I increased the gain of PD12 (PD12_I is SPOB) by a factor of 1.4 to compensate for the power decrease
by the insertion of the BS. SPOB is used by the PRM alignment script. I was too lazy to modify the scripts.

Then I optimized the SRC DD signal which is taken from the POB.

I also had to do some gain adjustments for the CARM loop.

The attachment (AO path open loop TF) shows a depressing fact that the 3.8kHz peak is still there with the new PO_DC PD. So it was not a problem of the SPOB PD.
Next, I will check the cross over frequencies of the PZT and PC paths in the FSS and the VCO/MCL cross over.
Attachment 1: AO-Loop-p9.png
AO-Loop-p9.png
  1428   Wed Mar 25 17:22:58 2009 YoichiUpdateIOOMC lock without FSS
I made 40k:4k passive filter in a POMONA box and connected it to IN1 (not TEST IN1) of the FSS box.
With this modification and cut-and-tries with the gain sliders, I was able to lock the MC with 80kHz bandwidth by feeding back directory to the laser frequency.
The attached figure shows the open loop transfer function.
The phase margin is thin at 80kHz. Because of this, I could not turn on the MC super boost filters.
But I believe that we can increase the gain further by modifying the filter shape.

I used the following settings:
[MC Board]
C1:IOO-MC_REFL_GAIN 14
C1:IOO-MC_REFL_OFFSET -4.2381
C1:IOO-MC_BOOST1 0   (You can turn it on if you want, but turn it off for locking)
C1:IOO-MC_BOOST2 0
C1:IOO-MC_POL 1   (Minus)
C1:IOO-MC_VCO_GAIN 4
C1:IOO-MC_LIMITER 1 (Disable)

[FSS box]
C1:PSL-FSS_SW1 0 (Test1 ON)
C1:PSL-FSS_INOFFSET 0.1467
C1:PSL-FSS_MGAIN 30
C1:PSL-FSS_FASTGAIN 14 (Do not increase it, at least while locking. Otherwise the phase lag from the PZT loop gets significant and the MC loop will be conditionally stable).
I also turned down the FSS slow servo's RC transmission threshold to zero so that the slow servo works even without the RC locked.
Attachment 1: MC-loop-gain.png
MC-loop-gain.png
  1431   Thu Mar 26 04:01:24 2009 YoichiUpdatePSLFSS Open Loop Gain
Yoichi, Peter, Jenne

Attached is the open loop transfer function of the FSS as of today with the common gain = 12dB and the fast gain = 16dB.
The UGF is only 250kHz. If we increase the common gain, the PC goes crazy. Exactly the same symptom as before I fixed the oscillating op-amp.

I wanted to check the cross over frequency but there is no excitation point in the fast path nor PC path. Therefore, it is not easy.
Attachment 1: OpenLoopTF.png
OpenLoopTF.png
  1432   Thu Mar 26 04:09:38 2009 YoichiUpdateIOOSingle X arm lock spectra with different MC lock schemes
The attached plots show MC_F, FSS_FAST_F and XARM IN/OUT spectra with different MC locking modes.
The conventional locking means the FSS is used. The direct frequency lock is the new way.
You can see that at low frequencies, the frequency actuator is working hard to suppress the MC pendulum motions.
The X-arm also sees a lot of frequency noise at low frequencies because of this.
The transmitted power of the X-arm fluctuates a lot making it difficult to align the mirrors.

The zoomed plots show that the structures in the kHz band are also present in the case of the direct frequency lock, although the frequencies are somewhat different.
Attachment 1: XarmSpectra.pdf
XarmSpectra.pdf
Attachment 2: XarmSpectraZoom.pdf
XarmSpectraZoom.pdf
  1433   Thu Mar 26 04:27:26 2009 YoichiUpdateLocking3.8kHz peak as a function of the arm power
During the power ramp-up, I actuated CARM using ETMs and measured the transfer functions to the PO_DC at several arm powers.
The peak grows rapidly with the power. It also seems like the frequency shifts slightly as the power goes up, but not much.

Some sort of an RSE peak ? An offset in the PRC lock point ?
Attachment 1: CARM-PODC.pdf
CARM-PODC.pdf
  1436   Fri Mar 27 02:50:54 2009 YoichiUpdateLockingDD demodulation phase suspicious
I noticed that the gain of PD6_Q (before the phase rotation) was 0 whereas PD6_I gain was 15.
This means the demodulation phase of the PD6 had no meaning other than changing the gain.
According to the conlog, it has been zero since March 2nd. I don't know how it happened.

While I was re-adjusting the DD phase, the MC started to unlock frequently (every 10 minutes or so).
MC1 is again drifting a lot (it is getting step-function like alignment changes intermittently).
This practically made it impossible to work on locking. So I decided to fix the MC first.
See Peter's elog entry for the MC work.
  1437   Fri Mar 27 15:05:42 2009 YoichiUpdateIOOMC glitch investigation
Attached plots are the result of the MC1 trend measurement.
See the attachment #1. The first two plots show the drift of the MC1 alignment as seen by the OSEMs. It is terrible. Other MC mirrors also drifted but the scale is smaller than the MC1.
From the VMon channels, you can see that the control voltages were quiet.
 
The monitor channels we added were:
 
MC_TMP1 = UL coil bias. Input to the coil driver board.
MC_DRUM1 = UL coil bias. Output of the current buffer.
OSA_APTEMP = LR coil bias. Input to the coil driver board.
OSA_SPTEMP = LR coil bias. Output of the current buffer.
 
The bias voltages show no drift except for a glitch around 7AM. This glitch did not show up in the SPTEMP channel (LR coil bias output). This was because the probe was connected to the coil side of the output resistor by mistake.
 
The second attachment shows a zoomed plot of MC1 OSEM signals along with the bias monitor channels (signals were appropriately scaled so that they all fit in +/-1).
There is no correlation between the OSEM signals and the bias voltages.
 
Since we were only monitoring UL and LR coils, I changed the monitor points as follows.
 
MC_TMP1 = LL coil bias. Output of the current buffer.
MC_DRUM1 = UL coil bias. Output of the current buffer.
OSA_APTEMP = UR coil bias. Output of the current buffer.
OSA_SPTEMP = LR coil bias. Output of the current buffer.
 
I will leave the MC unlocked for a while.

Quote:

Yoichi, Pete

The MC loses lock due to glitches in the MC1 coils. 
We do not know which coil for sure, and we do not know if it is a problem going into the board, or a problem on the board. 
We suspect either the UL or LR coil bias circuits (Pete would bet on UL).  If you look at the bottom 4 plots in the attached file, you can see a relatively large 3 minute dip in the UL OSEM output, with a corresponding bump in the LR (and smaller dips in the other diagonal).  
These bumps do not show up in the VMONS which is why we are suspicious of the bias.
To test we are monitoring 4 points in test channels, for UL and UR, both going into the bias driver circuit, and coming out of the current buffer before going into the coils. 
 

We ran cable from the suspension rack to the IOO rack to record the signals with DAQ channels.

The test channels:

UL coil      C1:IOO-MC_DRUM1  (Caryn was using, we will replace when we are done)

UL input   C1:IOO-MC_TMP1 (Caryn was using, we will replace when we are done)

LR coil      C1:PEM-OSA_SPTEMP

LR input   C1:PEM-OSA_APTEMP

We will leave these overnight; we intend to remove them tomorrow or Monday.

We closed the PSL shutter and killed the MC autolocker.

 

Attachment 1: MC1_Drift.pdf
MC1_Drift.pdf
Attachment 2: MC2_Drift.pdf
MC2_Drift.pdf
  1438   Fri Mar 27 17:52:16 2009 YoichiUpdateIOOMC glitch investigation
Per Rob's suggestion, I put the probes across the output resistors of the bias current buffers instead of measuring the output voltage with respect to the ground.
This way, we can measure the current flowing the resistor. The change was made around 17:30.

Quote:
Attached plots are the result of the MC1 trend measurement.
See the attachment #1. The first two plots show the drift of the MC1 alignment as seen by the OSEMs. It is terrible. Other MC mirrors also drifted but the scale is smaller than the MC1.
From the VMon channels, you can see that the control voltages were quiet.
 
The monitor channels we added were:
 
MC_TMP1 = UL coil bias. Input to the coil driver board.
MC_DRUM1 = UL coil bias. Output of the current buffer.
OSA_APTEMP = LR coil bias. Input to the coil driver board.
OSA_SPTEMP = LR coil bias. Output of the current buffer.
 
The bias voltages show no drift except for a glitch around 7AM. This glitch did not show up in the SPTEMP channel (LR coil bias output). This was because the probe was connected to the coil side of the output resistor by mistake.
 
The second attachment shows a zoomed plot of MC1 OSEM signals along with the bias monitor channels (signals were appropriately scaled so that they all fit in +/-1).
There is no correlation between the OSEM signals and the bias voltages.
 
Since we were only monitoring UL and LR coils, I changed the monitor points as follows.
 
MC_TMP1 = LL coil bias. Output of the current buffer.
MC_DRUM1 = UL coil bias. Output of the current buffer.
OSA_APTEMP = UR coil bias. Output of the current buffer.
OSA_SPTEMP = LR coil bias. Output of the current buffer.
 
I will leave the MC unlocked for a while.

 

 

 

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