Does anyone know where the Busby or Rai low noise pre-amp boxes are? 

I think I need one in order to measure the noise of the Marconi.  Right now, I am trying to measure the amplitude noise, but I'm not seeing anything on the SR785 above the analyzer's noise level.

The Rai box was in the Cryo lab, and the Busby box was in the TCS lab.  Neither had been signed out.  Lame.  Anyhow, thanks to Evan and Zach's memories of having seen them recently, they have been returned to the 40m where they belong.  (Also, I grabbed a spare Marconi while I was over there, for the phase noise measurement).

+1 to both Evan and Zach for prompt info and +2 to you for getting more stuff than you started looking for. -2 karma to whomever had swiped them and hoarded without signing. You should put a 40m sticker on both of them. Make sure to check / use fresh batteries. The Busby box is BJT based and works on low impedance sources, the Rai box works on anything, but (I am guessing) has less CMRR.

Just randomly found this old entry from 3 years ago. We should never have installed a GAP 2000 - they are an inferior type of InGaAs diode. We should add to our list replacing these with a 2 mm EG&G diode.

How many 2 mm EG&G InGaAs diodes do we have Steve? Can you please find a good clean diode case so that we can store them in the optics cabinet on the south arm?

RFpds box is moved from RF cabinet E4 to clean cabinet S15

Inventory updated at https://wiki-40m.ligo.caltech.edu/RF_Pd_Inventory

Large Area InGaAs PIN Photodiode -- C30642GH      6 pieces in stock

Large Area InGaAs PIN Photodiode with a 2,0 mm active diameter chip in TO-5 package with flat glass window

Large area InGaAs PIN photodiode with useful diameter of 2,0 mm in a T0-5 package with a flat glass window. The C30642GH provides high quantum efficiency from 800nm to 1700nm. It features high responsivity, high shunt resistance, low dark current, low capacitance for fast response time and uniformity within 2% across the detector active area.

I made a little box for the new RF amplifiers we'll be using for the green beatnotes, to keep things tidy on the PSL table. They are both Minicircuits model ZHL-3A-S.

I took TFs of their response with the agilient analyzer (calibrating out the cables, splitters, etc.) Powered at +24V, we get a solid ~27dB of gain up to around 200MHz, which is fine for our needs. The phase profile is mostly a 6-7 nsec delay, which is negligible for ALS. Data files are attached. 

Koji looked at me like I was crazy for using a BNC connector for the DC power. I haven't yet been able to find panel mount banana connectors, but when I do, I'll replace it. 

Banana'd:

As happened with the RF distribution box in the IOO rack a while back, the shiny blue power button in the LSC LO distribution box failed today. I replaced it with a simple switch, but since the original was a double throw, the replacement was way too big to fit without major panel surgery. So, instead, I installed it in the grille on the roof of the chassis. It a tight press/snap fit, though; I don't think it is at risk of easily coming loose. 

After reinstalling the box, I confirmed that POX POY and AS55 could all lock arms, so I deem the operation a success.

Before:

After:

I added the 0.1 uF and 47 nF caps that I mentioned so that we can now bypass the AA filters for these channels. (mistakenly installed 47 instead of 0.47 nF on the first round and we got 350 Hz poles instead of 35 kHz)

Gautam and I checked out the AA sit and it seems that the XYCOM-220 cable which ought to allow switching of the AA filter is not connected on the XYCOM side, so the LSC AA filters are always ON. In order to bypass them, we'll need to just short the bypass control pins or just set the +5V on the board to GND, by lifting the EMI3 filter and shorting C6.

I have so far only made the changes on s/n 115 (used for AS55, REFL55, and REFL165), other 2 boards to follow soon.

Before making the AA change, we want to measure the HF spectrum the ADC for each of our main signals in the PRFPMI state. In lieu of that, we'll measure the spectrum at the I/Q mon ports of the demod boards via SR785 and then use matlab to propagate the signals to the ADC to make our estimate of how much anti-aliasing we need.

Changes relative to D990694-B:

1. R215, R216, R217, R218, R219: 4.75k -> 9.53k.  This change was made long to make the DC gain of channels 4-8 be unity, the same as channels 1-3.
2. 0.1 uF NPO cap in parallel with R127, R128, R129, R130, R131, R132, R133, R134.
3. R127, R128, R129, R130, R131, R132, R133, R134 all 100k (was already like this) to keep LT1128 from floating up when input cables are disconnected.
4. C158, C159, C160, C161, C162, C163, C164, C165, C166, C167, C168, C169, C170, C171, C172, C173, all were empty, now are 0.47 nF NPO.

I also looked at the noise in a few different configurations to see what we ought to do next.

BLACK: AS55I_IN1 with 0 dB whitening gain and whitening filter OFF, so its all just ADC noise

RED: same but with +45 dB whitening gain and WF ON, so above 10 Hz this is now the noise of the PD / demod chain

BLUE: RED w/ the anti-WF applied

PURPLE: in-loop POX11_I spectrum with x-arm locked

The conversion from counts to volts 0.0006, so the black trace is ~5 uV/rHz as expected. Its clear that we would be sort of OK for most of our channels if we just had 1 stage of whitening. I think we ought to convert the input stage into a 100:20 stage and also change the other whitenings into a 100:20 instead of 150:15. Then we'll have less gain at 15 Hz, but more at 100 Hz.

We really need to buy some surface mount capacitors, Steve - we ought to have at least 100 of all the ones in that little gray cabinet.

At 1Y2 rack, I measured offset voltage of the common mode servo (D040180-B) with the gain of it varied.

For now, all signal cables that come into or go out of the common mode servo are not plugged.

I will upload the data I took and report the result later.

I report the results of the measurement to know how offset voltage of common mode servo changes when the gain is changed.

- Motivation: If discontinuous change of the offset happens when we change the gain, it could cause saturation somewhere and so make the length control down. So, we want to estimate effect of such discontinuous change.

- Method: In 1 (or In 2) was terminated with 50 ohm, and the output voltage at Out 2 was measured with a multimeter (D040180-B).

- Results are shown below. Acquired data are attached in .zip.

The upper shows input equiv. offset. The lower shows offset measured at Out 2.

As for both In1 and In2, strange behaviors can be seen between -17 dB and -16 dB.

This is because 5 amplifiers (or attenuators) are simultaneously enabled/disabled here. Similar situation occurs every change of 8 dB gain. 

Contacted Charles regarding use of Altium. Got to know that Altium is installed on cit40m iMac in Win7 on VirtualBox. Had to update Virtualbox to get it working. Altium now works for sometime, but then fails, saying that it is unlicensed.

I used a Eurocard extension board to peek at the inputs and outputs of each of the gain-ladder AD829s on input B of the CM board in the +31dB configuration with the input terminated. (i.e with the following stages active in this order: +16dB, +8dB, +4dB, +2dB, +1dB).

The voltages I observed imply that the +8dB stage has an input voltage offset of -2mV, whereas all the other positive gain stages show around +-0.5mV. This could explain the shift observed at the +15->+16 transition. (However, since both input channels show a jump here, maybe its something more systemic about the board...)

In any case, it should be simple enough to swap out a new AD829 in place of U9B and see if it improves things, before getting too deep into the muck. (In principle, the AD829 has offset nulling pins, but I'm not sure how to do it in a non-hacky way since the board doesn't have any pads for it.)

I replaced some of the AD829s with other AD829s, but the offset situation didn't improve.

However, I figured that we don't really need the ~100MHZ bandwidth of the AD829, since the IMC loop limits us to a ~10kHz CARM bandwidth. Also, since we don't routinely use IN2 for anything, I felt free to try something else. 

Specifically, I replaced all of the positive gain AD829s in the input 2 gain ladder with OP27s (U8B->U12B on D1500308), which should have input offset voltages ~30x lower than the AD829s. 

Here is a comparison of the outputs these configurations perform, normalized to the output at the +0dB gain setting - where all of the op amps in the gain ladder are bypassed. 

So, most of the transitions now result in an output offset change of less than 0.5mV, which is nice.

The exception seems to be where the +8dB stage is switched in or out. I may try replacing this one, as these transitions cause a lock loss now when trying to lock the arm with high bandwidth using POY.

Eric gave me a psd plot of a signal which would be the input of a channel of the AA filter. the Nyquist freq. is about 32.8kHz.

Following are plots depicting the ratio of the aliased downconverted signal and the signal below 32.8 kHz. The first plot is for (to-be) aliased signal frequencies from 32.8 to 65.5k, and the second plot is for (to-be) aliased signals from 65.5k to 98.3k. In case of the first plot, the 36kHz peak will alias to 29kHz, and is about 30 times (29.5dB) greater than the signal there. Hence, the filter should give about 70dB attenuation there. Since this attenuation is not required by most other frequencies up to 65.5k, an option could be to use a notch filter to remove the frequency peak at 36k, and put a requirement of 45-50 dB attenuation on other frequencies.

In case of the second plot, the frequencies between 90 to 100k again need to be attenuated by more than 70 dB. However, if there is a -20dB/decade slope in stop band, we already have about 10 dB attenuation here as compared to around 32k.

The X axis of both plots is in Hz.

Summary: The aim is to design an analog anti-aliasing (AA) filter placed before the ADC, whose function is to filter out components of the input spectrum that have frequencies higher than the Nyquist frequency. This needs to be done so that there is no contamination of aliased downconverted high-frequency signals into the ADC output. I have put down and simulated a circuit to do this, based on the spectra of a few interferometer signals that eric Provided. Attachment 1 shows such an input PSD, treated with whitening filter, before the AA. The sampling rate is 65536 Hz and hence the Nyquist freq. is 32768 Hz.

Motivation: Attachments 2 and 3 show the plot of required attenuation for various frequencies above the Nyquist. We can see a peak at 36 kHz, which will alias to about 29kHz. It will require about 70 dB attenuation here. This indicates that use of a notch filter combined with a low pass filter can be used.

Details of Schematic: Attachment 4 shows the schematic of a Boctor low pass notch filter, cascaded by a 2nd order LPF. The stopband frequency of the boctor filter can be tuned to around 36 kHz. Its main advantage for the boctor is better insensitivity to component value tolerances, use of a single op amp, and relatively independent tuning of parameters.  The various component values are calculated from here. The transfer functions for the circuit shown in attachment 4 were simulated using TINA - a spice based simulation software. The transfer function is shown in attachment 5.

A few more calculations: Attachment 6 shows the output psd after the signal has been treated with AA. Attachments 7 and 8 show the ratio of aliased downconverted signal and the unaliased signal of the output. Here, we can see that above about 13 kHz, the ratios go above -40dB, which is apparently undesirable. However, we also see from the transfer function of the filter that the gain falls to less than -20dB after about this frequency, and the aliased signals are atleast 20 dB lower than this, atleast upto about 29 kHz in attachment 7 and about 25 kHz in attachment 8. This means that the aliased signals are negligible as compared to the low frequencies even if they are not negligible as compared to the higher frequencies (above 13 kHz) into which they would get downconverted due to sampling. But these higher frequencies (above 13 kHz) themselves are small.

The filter overall, is 4th order. Considering this and the above discussion, I need to decide what changes to make in the existing schematic. For now, I could discuss with eric to finalize the opamp and start building the pcb board design.

I found an anti-aliasing circuit on the 40m wiki. It consists of A differential LPF made using THS4131 low noise differential op-amp (one of the main applications of which is preprocessing before the ADC), and a notch. I modified it to arrange for the desired bandwidth (about 8 kHz) and notch after the Nyquist frequency at 36 kHz. I simulated it to get the attached results:

Attachment 1: It shows the input PSD (same as the one posted in the previous elog), the filter transfer function, and The resulting output.

Attachment 2: The circuit schematic. The initial part using THS4131 is a differential LPF and the subsequent RC network is the notch.

Attachment 3: This shows the ratio of the aliased downconverted signal to the the in-band signal, representative of the contamination in each bin. Here too, the aliased signals are negligible as compared to the low frequencies but they are not negligible as compared to the higher frequencies (above 10 kHz) into which they would get downconverted due to sampling. However, here, the attenuation at 8kHz is less than 6 dB while in the previous circuit, it was about 12 dB. One problem with this circuit is at about 6kHz, there is aliased signal from the 65k to 98kHz band, but this can be taken care of by adding an LPF later.

There has been an ongoing memory error in optimus with the following messages:

controls@optimus|~ >
Message from syslogd@optimus at Jun 30 14:57:48 ...
 kernel:[1292439.705127] [Hardware Error]: Corrected error, no action required.

Message from syslogd@optimus at Jun 30 14:57:48 ...
 kernel:[1292439.705174] [Hardware Error]: CPU:24 (10:4:2) MC4_STATUS[Over|CE|MiscV|-|AddrV|CECC]: 0xdc04410032080a13

Message from syslogd@optimus at Jun 30 14:57:48 ...
 kernel:[1292439.705237] [Hardware Error]: MC4_ADDR: 0x0000001ad2bd06d0

Message from syslogd@optimus at Jun 30 14:57:48 ...
 kernel:[1292439.705264] [Hardware Error]: MC4 Error (node 6): DRAM ECC error detected on the NB.

Message from syslogd@optimus at Jun 30 14:57:48 ...
 kernel:[1292439.705323] [Hardware Error]: cache level: L3/GEN, mem/io: MEM, mem-tx: RD, part-proc: RES (no timeout)

Optimus is a Sun Fire X4600 M2 Split-Plane server. Based on this message, the issue seems to be in memory controller (MC) 6, chip set row (csrow) 7, channel 0. I got this same result again after installing edac-utils and running edac-util -v, which gave me:

mc6: csrow7: mc#6csrow#7channel#0: 287 Corrected Errors 

and said that all other DIMMs were working fine with 0 errors. Each MC has 4 csrows numbered 4-7. I shut off optimus and checked inside and found that it consists of 8 CPU slots lined up horizontally, each with 4 DIMMs stacked vertically and 4 empty DIMM slots beneath. I'm thinking that each of the 8 CPU slots has its own memory controller (0-7) and that the csrow corresponds to the position in the vertical stack, with csrow 7 being the topmost DIMM in the stack. This would mean that MC 6, csrow 7 would be the 7th memory controller, topmost DIMM. The channel would then correspond to which one of the DIMMs in the pair is faulty although if the DIMM was replaced, both channels 0 and 1 would be switched out. Here are some sources that I used:

http://docs.oracle.com/cd/E19121-01/sf.x4600/819-4342-18/html/z40007f01291423.html#i1287456

https://siliconmechanics.zendesk.com/hc/en-us/articles/208891966-Identify-Bad-DIMM-from-EDAC

http://martinstumpf.com/how-to-diagnose-memory-errors-on-amd-x86_64-using-edac/

I'll find the exact part needed to replace soon.

I am trying to design an antialiasing filter, which also has two switchable whitening stages. I have designed a first version of a PCB for this.

The board takes differential input through PCB mountable BNCs. It consists of an instrumentaiton amplifier made using quad opamp ADA4004, followed by two whitening blocks, also made using ADA4004, which can be bypassed if needed, depending upon a control input. The mux used for this purpose is Maxim MAX4158EUA. These two whitening blocks are followed by 2 the LPF stages. A third LPF stage could be added if needed. These use AD829 opamps. After the LPFs are two amplifiers for giving a differential output through two output BNCs. The schematic is shown in attachment 1: "AA.pdf". The top layers of the layout are shown in attachment 2 (AAtop.pdf), the bottom layers in attachment 3 (AAbottom.pdf), and the entire layout in attachment 4 (AAbrd.pdf). 

The board has 6 layers (in the order from top to bottom):

1) Top signal layer; 

2) Internal plane 1 (GND),

3) Internal plane 2 (+15V),

4) Internal plane 3 (-15V),

5) Internal plane 4 (GND),

6) Bottom signal layer. 

Power: +15, -15 and GND is given through a 4 pin header connector. 

The dimensions of the board are 1550 mil  6115 mil (38.1mm155.3mm) and the overall dimensions including the protruding BNC edges are 1550 mil  7675 mil (38.1mm194.9mm)

I would like to have inputs on the layout telling me if any component/trace needs to be changed/better placed, any other things about the board need to be changed, etc.

P.S.: I have also added a zipped folder "AA.zip" containing the schematic and board files, as well as the above pdfs.

Optimus' memory errors are back so I found the exact DIMM model needed to replace: http://www.ebay.com/itm/Lot-of-10-Samsung-4GB-2Rx4-PC2-5300P-555-12-L0-M393T5160QZA-CE6-ECC-Memory-/201604698112?hash=item2ef0939000:g:EgEAAOSwqBJXWFZh I'm not sure what website would be the best for buying new DIMMs but this is the part we need: Samsung 4GB 2Rx4 PC2-5300P-555-12-L0 M393T5160QZA-CE6.

Comments on the schematic:

1. Only the instrumentation amp should be made up of the ADA4004. Not the whitening parts.
2. Please think about the front panel design and make a drawing of the front and back panels. Power connectors, indicators, switches, etc. Take a look at some of our existing 1U rack electronics to see what standard arrangements are. Add a front and back panel drawing to the elog.
3. The whitening and anti-aliasing opamps can all be OP27 SOIC-8 for now. Later, if we need better noise performance or speed we can use faster opamps.
4. There should be a 3rd stage of AA. Each of the exisitng stages (U5, U6) can only be second order and we want the option to have a 6th order low pass.
5. There should be 100 nF decoupling capacitors on the power pins of all the single opamps.
6. There is a low noise power daugther board made by Ben Abbott which you can use on the DCC. It should accept the direct power connector from the back panel and supply regulated power to the board.
7. Take care to update the lower right hand corner info box with updated drawing version #'s and author name.
8. The MAX4158 is 16 years old. It may be good if you can find a newer parts so it doesn't go obsolete.
9. All of the R & C on the board should be sized 1206 for the SMD.
10. For the whitening and AA filtering stages, we want the capability to use larger size parts (e.g. the red WIMA caps that are in the blue spinny box). So you will have to use larger footprints for those.
11. The resistors should all be 0.1% thin film or metal film.

I recreated Den's microphone amplifier circuit on a solderless breadboard to test it and make sure it does what it's supposed to. So far it seems like everything is working- I'll do some testing tomorrow to see what the amplified output is like for some test noises. Here's the circuit diagram that Den made (his elog as well https://nodus.ligo.caltech.edu:8081/40m/6651):

I'm not sure why he set up the circuit the way he did- he has pin 7 grounded and pin 4 going to +12V while in the datasheet for the opamp (http://cds.linear.com/docs/en/datasheet/1677fa.pdf), pin 7 goes to positive voltage and pin 4 goes to negative voltage. There's some other strange things about the circuit that I don't really understand, such as the motivation for using no negative voltage source, but for now I'm going to stick with Den's design and then make some modifications after I have things working and a better understanding of the problem.

Here's my current plan:

-Make sure Den's amplifier works, test it out and make changes if necessary

-Make multiple amplifier circuits on soldering breadboard

-Either make a new amplifier box or reuse Den's old box depending on how many changes I make to the original circuit

-Solder EM172s to BNC connectors, set them up around the floor suspended

-Get the amplifier box hooked up, set up some data channels for the acoustic noise

-Add new acoustic noise tab to the summary pages

Den also mentioned that he wanted me to measure the coupling of acoustic noise to DARM.

I set up a test inverting amplifier circuit using the LT1677 opamp:

The input signal was a sine wave from the function generator with peak to peak amplitude of 20 mV and a frequency of 500 Hz and I received an output with an amplitude of about 670 mV and the same 500 Hz frequency, agreeing with the expected gain of -332k/10k = -33.2:

So now I know that the LT1677 works as expected with a negative supply voltage. My issue with Den's original circuit is that I was getting some clipping on the input to pin 2, which didn't seem to be due to any of the capacitors- I switched them all out. I set up a modified version of Den's circuit using a negative voltage input to see if I could fix this clipping issue:

I might reduce the input voltages to +5V and -5V- I couldn't get my inverting amp circuit to work with +12V and -12V. I'll start testing this new circuit next week and start setting up some amplifier boxes.

I could not get Den's circuit to work for some reason with microphone input, so I decided to try to use another circuit I found online. I made some modifications to this circuit and made a schematic:

Using this circuit, I have been able to amplify microphone input and adjust my passband. Currently, this circuit has a high-pass at about 7 Hz and a low-pass at about 23 kHz. I tested the microphone using Audacity, an audio testing program. I produced various sine waves at different frequencies using this program and confirmed that my passband was working as intended. I also used a function generator to ensure that the gain fell off at the cutoff frequencies. Finally, I measured the frequency response of my amplifier circuit:

ampTest_03-08-2016_180448.pdf

A text file with the parameters of my frequency response and the raw data is attached as well.

These results are encouraging but I wanted to get some feedback on this new circuit before continuing. This circuit seems to do everything that Den's circuit did but in this case I have a better understanding of the functions of the circuit elements and it is slightly simpler.

I took the spectrum of an EM172 connected to my amplifier inside and outside a large box filled with foam layers:

I also made a diagram with my plan for the microphone amplifier boxes. This is a bottom view:

The dimensions I got from this box: http://www.digikey.com/product-detail/en/bud-industries/CU-4472/377-1476-ND/696705

This seemed like the size I was looking for and it has a mounting flange that could make suspending it easier. Let me know if you have any suggestions.

I'll be doing a Huddle test next week to get a better idea of the noise floor and well as starting construction of the circuits to go inside the boxes and the boxes themselves.
 

I set up 3 of my circuits in the interferometer near MC2 to do a huddle test. I have the signals from my microphones going into C1:PEM-MIC_1_IN1, C1:PEM-MIC_2_IN1, and C1:PEM-MIC_3_IN1. These are channels C17-C19. Here are some pictures of my setup:

I'll likely be collecting data from this for a couple of hours. Please don't touch it for now- it should be gone soon. There are some wires running along the floor near MC2 as well.

In order to help Praful do his huddle test, I have temporarily arranged for the outputs of the 3 channels he wants to monitor to be acquired as DQ channels at 2048 Hz by editing the C1PEM model. No prior DQ channels were set up for the microphones. Data collected overnight should be sufficient for Praful's analysis, so we can remove these DQ channels from C1PEM before committing the updated model to the svn. There is in fact a filter that is enabled for these microphone channels that claims to convert the amplified microphone output to Pascals, but it is just a gain of 0.0005. 

In the long term, once we install microphones around the IFO, we can update C1PEM to reflect the naming conventions for the microphones as is appropriate.

The results of my first huddle test were not so good- one of the signals did not match the other two very well- so I changed the setup so that the mics would be better oriented to receive the same signal. Pictures of the new setup are attached.

I also noticed some problems with one of my microphones so I soldered a new mic to bnc and switched it out. Just judging from Dataviewer, the signals seem to be more similar now. I'll be taking data for another few hours to confirm.

I used the Wiener filtering method described by Ignacio and Jessica (https://dcc.ligo.org/DocDB/0119/T1500195/002/SURF_Final.pdf and https://dcc.ligo.org/public/0119/T1500194/001/Final_Report.pdf) and got the following results:

mic1_wiener.pdf

mic2_wiener.pdf

mic3_wiener.pdf

The channel readout has a gain of 0.0005 and the ADC is 16-bit and operates are 20V. The channel also reads the data out in Pa. I therefore had to multiply the timeseries by 1/0.0005=2000 to get it in units of counts and then by (20 Volts)/(2^16 counts) to get back to the original signal in volts. The PSDs were generated after doing this calibration. I also squared, integrated, and square rooted the PSDs to get an RMS voltage for each microphone as a sanity check:

Mic 1: 0.00036 V

Mic 2: 0.00023 V

Mic 3: 0.00028 V

These values seem reasonable given that the timeseries look like this:

timeseries_elog.pdf

For the past week, I've been trying to make a soldered amplifier circuit to use in a prototype box, However, I've been running into this same issue. The circuit, pictured below, works fine on a solderless breadboard.

simple_amp.png

When I amplify a sine wave, I get a clean looking result at the output on the solderless breadboard:

However, on my soldered circuit, if I turn up the negative voltage supply from the power supply past about -12.5V (the target is -15V), I get a strange signal that Gautam suggested looks like some kind of discharging.

At -12.3 V (soldered breadboard):

At -15.0 V (soldered breadboard):

The signal is much noisier. Zooming in on this second signal, this pattern appears:

This pattern is also showing up even when there is no input from the function generator and the circuit is just given a voltage supply of +/- 15V:

I have tried switching out both the positive and negative voltage regulators, the opamp, and remaking and resoldering the entire circuit but I'm still getting the same signal, which is absent from the solderless circuit. This output was produced with a function generator, so I have also ruled out the microphone as a source of this extra noise. The voltage dependence of this problem made me think it was the voltage regulator, but I've switched out the voltage regulator multiple times and it's still showing up. I'm not sure why this signal appears only as the negative voltage supply is increased- there is no problem with increasing the positive input voltage. Please let me know if you have any ideas as to what component or issue could be causing this.

I remade another soldered circuit, adding extra 100uF electrolytic bypass capacitors at the input and output of the voltage regulator and ensuring that every grounded component now has its own path to ground rather than going through other elements. This circuit now seems to be working just like the solderless circuit. Attached is the transfer function of the soldered circuit, which matches with the result from the solderless circuit.

soldered_transfer_function.png

solderless_transfer_function.png

Here are both on the same figure- they are about overlapping but are slightly different if you zoom in enough.

both_transfer.png

I have also attached a new version of the circuit schematic to reflect the changes and to make the physical layout more clear.

simple_ampv2.pdf

My next step for these last few days this summer will be designing a PCB using Altium. I've emailed Varun about how to use Altium on the iMac but he hasn't responded. If anyone else knows how to use the software, please let me know.

What I suggested was:
- For most cases, power decoupling capacitors for the regulators should be ~100nF "high-K ceramic capacitors" + 47uF~100uF "electrolytic capacitors".
- For opamps, 100nF high-K ceramic should be fine, but you should consult with datasheets.
- Usually, you don't need to use tantalum capacitors for this purpose unless specified.
- Don't use film capacitors for power decoupling.

79XXs are less stable compared to 78XXs, and tend to become unstable depending on the load capacitance.
One should consult with the datasheet of each chip in order to know the proper capacitors values.
But also, you may need to tweak the capacitor value when necessary. Above recipe works most of the case.

I added an EM172 to my soldered circuit and it seems to be working so far. I have taken a spectra using the EM172 in ambient noise in the control room as well as in white noise from Audacity. My computer's speakers are not very good so the white noise results aren't great but this was mainly to confirm that the microphone is actually working.

white_v_ambient.pdf

Do these look good for the ceramic capacitors? We're running low.

http://www.mouser.com/ProductDetail/Vishay-BC-Components/K104K15X7RF53L2/?qs=sGAEpiMZZMuMW9TJLBQkXmrXPxxCV7CRo6C15yUYAos%3d

Yes

Interesting articles how they should only be used for power decoupling and not in the signal path.

http://www.edn.com/design/analog/4416466/Signal-distortion-from-high-K-ceramic-capacitors

http://www.edn.com/design/analog/4426318/More-about-understanding-the-distortion-mechanism-of-high-K-MLCCs

Gautam helped me drill holes in a metal box and I set up my circuit inside. Everything seems to be working so far. Tomorrow I'll be suspending the box near the PSL and setting up a data channel. Attached are some pictures of the box- sorry some of the angles turned out weird.

My box has been suspended in the PSL using surgical tubing, and it has been connected to C1:PEM-MIC_1 (C17) with a BNC. I made a braided power cable as well but it turned out to be slightly too short... Once this is fixed, everything should be ready and we can see if it's working correctly. I also set up a new tab on the summary pages for this channel:

https://ldas-jobs.ligo.caltech.edu/~praful.vasireddy/1154941217-1154942117/pem/acoustic/

This data is back from when I had my solderless breadboard running near MC2. I'll add this tab to the real pages once the box is working (which could be a while since I'm gone for a month). Let me know if you see any issues with either the tab or the box/cables.

1. add photo of installation
2. no more secret personal pages! put channels into the actual pages that we look at
3. make it ASD instead of PSD, same as the other channels
4. add specgram (whitened and not)

I'll add a picture of the installation when I get back to campus and finish hooking up the power cable. I haven't added this channel to the actual pages yet because there's not any data right now- the box is still unpowered because my braided power cable wasn't long enough. I just changed the format of the spectrum to ASD and added spectrograms. Here's how the tab looks now: https://ldas-jobs.ligo.caltech.edu/~praful.vasireddy/1155014117-1155015017/pem/acoustic/

Let me know if there's anything else to change.

In November of 2010, Valera Frolov (LLO), investigated our satellite amplifiers and made some recommendations about how to increase the SNR.

In light of the recent issues, we ought to fix up one of the spares into this state and swap it in for the ITMY's funky box.

The sat amp schematic is (D961289). It has several versions. Our spare is labeled as version D (not a choice on the DCC page).

1. U13-17 seem superfluous. Why would we need a high current buffer to drive the slow EPICS ADCs ?
2. The Radd resistors indicated on the B2 schematic have not been added to this board. What would be the purpose of adding them anyway?
3. The transimpedance resistors are, in fact, 29.4k as indicated on the B1 schematic.
4. The LT1125: V_n = 3 nV w/ f_corner = 5 Hz. I_n = 0.4 pA w/ f_corner = 100 Hz. So at 1 Hz the current noise is limiting at ~120 nV/rHz or 650 nV/rHz using the 161k that Valera recommends.
5. Even in that case the ADC noise is higher than the opamp noise.
6. We should be using metal film resistors instead of the thick film junk that's installed now.

Edit (Sep 6): The purpose of the Radd resistors is to lower the resistance and thus up the current through the LED. The equivalent load becomes 287 Ohms. Presumably, this in series with the LED is what gives the 25 mA stated on the schematic. This implies the LED has an effective resistance of 100 Ohms at this operating point. Why 3 resistors? To distribute the heat load. The 1206 SMD resistors are usually rated for 1/4 W. Better to replace with 287 Ohm metal film resistors rated for 1 W, if Steve can find them online.

The attached PDF shows the output noise of the satellite amp. This was calculated using 'osempd.fil' in the 40m/LISO GitLab repo.

The mean voltage output is ~1 Vdc, which corresponds to a current with a shot noise level of 100 nV/rHz on this plot. So the opamp current noise dominates below 1 Hz as long as the OSEM LED output is indeed quantum limited down to 0.1 Hz. Sounds highly implausible.

To convert into meters, we divide by the OSEM conversion factor of ~1.6 V/mm, so the shot noise equivalent would be ~1e-10 m/rHz above 1 Hz.

After adding the sat amp to the 40m DCC tree (D1600348), I notice that not only is the PD readout not built for low noise, neither is the LED drive.  The noise should be dominated by the voltage noise of the LT1031 voltage reference. This has a noise of ~500 nV/rHz at 1 Hz. That corresponds to an equivalent current noise through the LED of 25 mA * (500e-9 / 10) ~ 1 nA/rHz. Or ~45 nV/rHz at the sat amp output. This would be OK as long as everything behaves ideally. BUT, we have thick film (i.e. black surface mount) resistors on the LED drive so we'll have to measure it to make sure.

Also, why is the OSEM LED included in the feedback loop of the driver? It means disconnecting the cable from the sat amp makes the driver go unstable probably. I think one concept is that including the device in the feedback loop makes it so that any EMI picked up in the cabling, etc. gets cancelled out by the opamp. But this then requires that we test each driver to make sure it doesn't oscillate when driving the long cable.  

If we have some data with one of the optics clamped and the open light hitting the PD, or with the OSEMs removed and sitting on the table, that would be useful for evaluating the end-to-end noise of the OSEM circuit. It seems like we probably have that due to the vent work, so please post the times here if you have them.

The ETMX OSEMs have been attached to its Satellite box and plugged in for the last 10 days or so, with the PD exposed to the unobstructed LED. I pulled the spectrum of one of the sensors (mean detrended, I assume this takes care of removing the DC value?). The DQed channels claim to record um (the raw ADC counts are multiplied by a conversion factor of 0.36). For comparison, re-converted the y-axis for the measured curve to counts, and multiplied the total noise curve from the LISO simulation by a factor of 3267.8cts/V (2^16cts/20V) so the Y axis is noise in units of counts/rtHz. At 1Hz, there is more than an order of magnitude difference between the simulation and the measurement which makes me suspect my y-axis conversion, but I think I've done this correctly. Can such a large discrepancy be solely due to thick film resistors?

In order to figure out the difference betweent simulated result and measurement, I tried to measuren the electronic noise by following ways as show in attachment 1

1.measure from the satellite box by SR785 at ETMY ,calibrate to counts by divide by 3267.8. while at that conditin, the set up is in suspension.

2. measure after ADC by diagnostics test tools, with set up on table in history and on uspension currently.

3. use the caculated butterfly channel.

the results are shown in attachmemt 2. The overall nosie level are still much higher than simulation.

REF33 was removed for taking picture of the bare C30362 InGaAs photodiode per Rana's request. All other rf photodiodes have their glass cover on.

Note: it is back to it's place but this pd will need alignment!

The small steering mirror was completly lose before it was removed.

I made an Altium schematic for the microphone amplifier circuit for fabrication.

mic_schematicv2.pdf

I got back to trying to engage the coil driver whitening today, the idea being to try and lock the DRMI in a lower noise configuration - from the last time we had the DRMI locked, it was determined that A2L coupling from the OL loops and coil driver noise were dominant from ~10-200Hz. All of this work was done on the Y-arm, while the X-arm CDS situation is being resolved.

To re-cap, every time I tried to do this in the last month or so, the optic would get kicked around. I suspected that the main cause was the insufficient low-pass filtering on the Oplev loops, which was causing the DAC rms to rail when the whitening was turned on. 

I had tried some loop-tweaking by hand of the OL loops without much success last week - today I had a little more success. The existing OL loops are comprised of the following:

• Differentiator at low frequencies (zero at DC, 2 poles at 300Hz)
• Resonant gain peaked around 0.6 Hz with a Q of ______ (to be filled in)
• BR notches 
• A 2nd order elliptic low pass with 2dB passband ripple and 20dB stopband attenutation

THe elliptic low pass was too shallow. For a first pass at loop shaping today, I checked if the resonant gain filter had any effect on the transmitted power RMS profile - turns out it had negligible effect. So I disabled this filter, replaced the elliptic low pass with a 5th order ELP with 2dB passband ripple and 80dB stopband attenuation. I also adjusted the overall loop gain to have an upper UGF for the OL loops around 2Hz. Looking at the spectrum of one coil output in this configuration (ITMY UL), I determined that the DAC rms was no longer in danger of railing.

However, I was still unable to smoothly engage the de-whitening. The optic again kept getting kicked around each time I tried. So I tried engaging the de-whitening on the ITM with just the local damping loop on, but with the arm locked. This transition was successful, but not smooth. Looking at the transmon spot on the camera, every time I engage the whitening, the spot gets a sizeable kick (I will post a video shortly).  In my ~10 trials this afternoon, the arm is able to stay locked when turning the whitening on, but always loses lock when turning the whitening off. 

The issue here is certainly not the DAC rms railing. I had a brief discussion with Gabriele just now about this, and he suggested checking for some electronic voltage offset between the two paths (de-whitening engaged and bypassed). I also wonder if this has something to do with some latency between the actual analog switching of paths (done by a slow machine) and the fast computation by the real time model? To be investigated.

GV 170628 11pm: I guess this isn't a viable explanation as the de-whitening switching is handled by the one of the BIO cards which is also handled by the fast FEs, so there isn't any question of latency.

With the Oplev loops disengaged, the initial kick given to the optic when engaging the whitening settles down in about a second. Once the ITM was stable again, I was able to turn on both Oplev loops without any problems. I did not investigate the new Oplev loop shape in detail, but compared to the original loop shape, there wasn't a significant difference in the TRY spectrum in this configuration (plot to follow). This remains to be done in a systematic manner. 

Plots to support all of this to follow later in the evening.

Attachment #1: Video of ETMY transmission CCD while engaging whitening. I confirmed that this "glitch" happens while engaging the whitening on the UL channel. This is reminiscent of the Satellite Box glitches seen recently. In that case, the problem was resolved by replacing the high-current buffer in the offending channel. Perhaps something similar is the problem here?

Attachment #2: Summary of the ITMY UL coil output spectra under various conditions.

Spare ILIGO electronics temporarly stored in the east arm. We need cabinet space.

Summary:

The analog de-whitening filters for MC2 are different from those on the other optics (i.e. ITMs and ETMs). They have one complex pole pair @7Hz, Q~sqrt(2), one complex zero pair @50Hz, Q~sqrt(2), one real pole at 2.5kHz, and one real zero @250Hz (with a DC gain of 10dB).

Details:

I took the opportunity last night to measure all 4 de-whitening channel TFs. Measurements and overlaid LISO fits are seen in Attachment #1. 

The motivation behind this investigation was that last week, I was unable to lock the IMC to one of the arms. In the past, this has been done simply by routing the control signal of the appropriate arm filter bank (e.g. C1:LSC-YARM_OUT) to MC2 instead of ETMY via the LSC output matrix (if the matrix element to ETMY is 1, the matrix element to MC2 is -1).

Looking at the coil output filter banks on the MC2 suspension MEDM screen (see Attachment #2), the positions of filters in the filter banks is different from that on the other optics. In general, the BIO outputs of the DAC are wired such that disengaging FM9 on the MEDM screen engages the analog de-whitening path. FM10 then has the inverse of the de-whitening filter, such that the overall TF from DAC to optic is unity. But on MC2, these filters occupy FM7 and FM8, and FM9 was originally a 28Hz Elliptic Low-pass filter.

So presumably, I was unable to lock the IMC to an arm because for either configuration of FM9 (ON or OFF), the signal to the optic was being aggressively low-passed. To test this hypothesis, I simply copied the 28Hz elliptic to FM6, put a gain of 1 on FM9, left it engaged (so that the analog path TF is just flat with gain x3), and tried locking the IMC to the arm again - I was successful. See Attachment #3 for comparison of the control signal spectra of the X-arm control signal, with the IMC locked to the Y-arm cavity.

In this test, I also confirmed that toggling FM9 in the coil output filter banks actually switches the analog path on the de-whitening boards.

Since I now have the measurements for individual channels, I am going to re-configure the filter arrangement on MC2 to mirror that on the other optics. 

Unrelated to this work: the de-whitening boards used for MC1 and MC3 are D000316, as opposed to D000183 used for all other SOS optics. From the D000316 schematic, it looks like the signals from the AI board are routed to this board via the backplane. I will try squishing this backplane connector in the hope it helps with the glitching MC1 suspension.

GV Aug 13 11:45pm - I've made a DCC page for the MC2 dewhitening board. For now, it has the data from this measurement, but if/when we modify the filter shape, we can keep track of it on this page (for MC2 - for the other suspensions, there are other pages). 

This kind of data fitting and analysis is really useful. We should figure out a way to archive it. Perhaps the data files and fitting stuff can be put into GIT in some smart way? The fit results can be added to the 40m MC electronics DCC tree. Then the links can be added to this elog.

Gautam and Steve,

All 3 show the same noise level ~80 nV / rt Hz at 1 kHz as shown. Batteries ordered to be replaced in the top 2

We'll do more measurement to see how can we get to 4 nV / rt Hz  specification level.

these are not the SR785 settings that you're looking for

To get low noise measurements on the SR785, you have to have the input range set to -50 dB, not +20 dB. Its not within the powers of commercial electronics ADCs to give you a 10 nV noise floor with +10 V input signals. The SR560 has an input referred noise of 5 nV/rHz, so the output noise should be 5e-9 x 500 = 2.5 uV/rHz. Your picture shows it giving 1 uV RMS, so you also need to use the PSD units.