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Entry  Fri Dec 20 01:24:11 2013, Den, Update, LSC, high bandwidth loop achieved for yarm CM_OL_meas.pdfcm_ol_sim.pdfCM_slow_fast_cross.pdf
    Reply  Fri Dec 20 03:31:07 2013, Koji, Update, LSC, lock acquisition path for the CM servo 
       Reply  Tue Apr 22 02:14:55 2014, ericq, Update, LSC, lock acquisition path for the CM servo 
    Reply  Fri Dec 20 03:34:40 2013, Koji, Update, LSC, high bandwidth loop achieved for yarm 
       Reply  Fri Dec 20 22:45:02 2013, Koji, Update, LSC, high bandwidth loop achieved for yarm 
Message ID: 9507     Entry time: Fri Dec 20 22:45:02 2013     In reply to: 9501
Author: Koji 
Type: Update 
Category: LSC 
Subject: high bandwidth loop achieved for yarm 

I checked the offset situation in the CM servo boost circuit. 

- The offset voltage on the CM servo screen is a raw DAC output. This number is diluted by the voltage divider before the amplifier.
  So, the actual offset of the boost circuit was much smaller. (~20mV)

- There is a offset trimmer on the board. This was adjusted so that the boost does not generate an output offset.

- So the default offset is 0V.

- When the arm was locked with (digital) POY11, the CM servo offset is necessary to be -2.7 (now).
  This means that analog POY11Q and digital POY11 has different offset for the best resonance transmission.
  That is believable if POY11I is contributing to the digital POY11 signal.

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