Summary:

Continued with tests on the PZT driver board. I made a few changes to replace defective components and also to modify the gain of the HV amplifier stage. I believe the board has been verified to be satisfactory, and is now ready for a piezo to be connected, tested and calibrated.

Changes made:

• I tested the board with the full 100V bias voltage today, working my way up from 30V in steps of about 20V and verifying the output at each stage.
• In order to deliver 100V to the board, it was necessary to change the maximum current limit on the KEPCO supply, which is set at default at ~1.6 mA. The KEPCO power supply placed near rack 1X2 (which I believe was used to power a piezo driver board) is labelled 150V, 12 mA, though I found that the board only drew 7mA of current when the power supply output 100V. I have set the limit to 10 mA for the time being.
• The potentiometer in the third stage (R44 in the schematic) was faulty so I replaced it with another 100K potentiometer, which was verified to work satisfactorily.
• We expect the DAC output to supply a voltage to the input of the PZT driver board in the range -10V to 10V. Today, I verified this by using my temporary break-out cable. I hooked this up to the DAC at 1Y4 and output a 3 Hz sine wave with amplitude of 32000 counts (the maximum) on channel 9. The output as observed on an oscilloscope (image attached) was a 10Vpp sinusoid, confirming the above hypothesis. As mentioned in my previous elog, the gain of the high-voltage amplifier stage is ~15, which would mean the output would saturate if the input were to be >6V. I have changed the gain of all 4 stages (M1-pitch, M1-yaw, M2-pitch and M2-yaw) to ~4.85 by swapping the 158k resistors (R43, R44, R69 and R70 in the schematic) for 51k resistors. 
• It was necessary to change the value of the biasing potentiometers after the change in gain so that 0 input voltage once again provided 50V at the output, as required by the PZTs for there to be no tilt. This was done and verified. This biasing voltage now is ~10.4V in all four stages.
• Having adjusted the gain, I tested the circuit over the expected full range of the input voltage from the DAC (from -10V to 10V) from the DS345 function generator (0.05Hz sinusoid). I monitored the output using a multimeter, as the monitor channels were peaking at ~7V, which was above the limit for the oscilloscope I was using. It was verified for all four channels that the output was between 0 V and 100 V (the safe range quoted in the datasheet for the tip-tilts, for this range of input voltages. So I think we are ready to connect a PZT to the board and conduct further tests, and calibrate the PZT. 

Pending Issues:

• Koji pointed out that there has to be an anti-imaging filter stage between the DAC output and the filter stage, which I had not considered till this point.Another subtle point is that the DAC output is differential while the driver boards have a single-ended input, which means we effectively lose half the range of the PZTs. 
• A suitable candidate is the D000186-rev D. Some information about the present state of this board is detailed in this elog. This board also solves the problem of the differential vs single input as the input to the AI board is differential while the output is single-ended. Koji has given me one of the boards he had collected. 
• Some changes will have to be made to this version of the board in order to make it compatible with the existing DAC. I will first have to measure the power spectrum of the DAC output to verify that the AI boards need notches at 64k and 128k. The existing notches are at 16k and 32k, and once the DAC power spectrum has been verified, I hope to affect the necessary changes by switching out the appropriate capacitors on the existing board. 
• The AI board is an extra element which I have now added to an updated wiring diagram, attached.

Revised Wiring Diagram:

DAC Max. Output Trace on Oscilloscope