This is mostly a reminder to myself about what I discussed with Jay and Alex this morning.
The big black IO chassis are "almost" done. Except for the missing parts. We have 2 Dolphin, 1 Large and 1 Small I/O Chassis due to us. One Dolphin is effectively done and is sitting in the test stand. However, 2 are missing timing boards, and 3 are missing the boards necessary for the connection to the computer. The parts were ordered a long time ago, but its possible they were "sucked to one of the sites" by Rolf (remember this is according to Jay). They need to either track them down in Downs (possibly they're floating around and were just confused by the recent move), get them sent back from the sites, or order new ones (I was told by one person that the place they order from them notoriously takes a long time, sometimes up to 6 weeks. I don't know if this is exaggeration or not...). Other than the missing parts, they still need to wire up the fans and install new momentary power switches (apparently the Dolphin boards want momentary on/off buttons). Otherwise, they're done.
We are due another CPU, just need to figure out which one it was in the test stand.
6 more BIO boards are done. When I went over the plans with Jay, we realized we needed 7 more, not 6, so they're putting another one together. Some ADC/DAC interface boards are done. I promised to do another count here, to determine how many we have, how many we need, and then report that back to Jay before I steal the ones which are complete. Unfortunately, he did not have a new drawing for the ASC/vertex wiring, so we don't have a solid count of stuff needed for them. I'll be taking a look at the old drawings and also looking at what we physically have.
I did get Jay to place the new LSC wiring diagram into the DCC (which apparently the old one never was put in or we simply couldn't find it). Its located at: https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=10985
I talked briefly with Alex, reminded him of feature requests and added a new one:
1) Single part representing a matrix of filter banks
2) Automatic generation of Simulated shared memory locations and an overall on/off switch for ADC/DACs
3) Individual excitation and test point pieces (as opposed to having to use a full filter bank). He says these already exist, so when I do the CVS checkout, I'll see if they work.
I also asked where the adl default files lived, and he pointed me at ~/cds/advLigo/src/epics/util/
In that directory are FILTER.adl, GDS_TP.adl, MONITOR.adl. Those are the templates. We also discovered the timing signal at some point was changed from something like SYS-DCU_ID to FEC-DCU_ID, so I basically just need to modify the .adl files to fix the time stamp channel as well. I basically need to do a CVS checkout, put the fixes in, then commit back to the CVS. Hopefully I can do that sometime today.
I also brought over 9 Contec DO-32L-PE boards, which are PCIe isolated digital output boards which do into the IO chassis. These have been placed above the 2 new computers, behind the 1Y6 rack.