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Entry  Mon Feb 8 14:13:03 2010, Alberto, Update, ABSL, PLL Characterization 2010-02-08_Old_PDH_Box_Filter_TF_gain_knob_0_Boost_OFF.png2010-02-08_PLL_OLG_gain_knob_0_Boost_OFF.png2010-02-08_PLL_Noise_Budget.png
    Reply  Tue Feb 9 09:07:06 2010, Alberto, Update, ABSL, PLL Characterization 2010-02-08_PRCtransmissivity_EntireFreqRange_VsFit.png
Message ID: 2576     Entry time: Mon Feb 8 14:13:03 2010     Reply to this: 2581
Author: Alberto 
Type: Update 
Category: ABSL 
Subject: PLL Characterization 

Lately I've been trying to improve the PLL for the AbsL experiment so that it could handle larger frequency steps and thus speed up the cavity scan.

The maximum frequency step that the PLL could handle withouth losing lock is given by the DC gain of the PLL. This is the product of the mixer's gain factor K [rad/V ], of the laser's calibration C [Hz/V] and of the PLL filter DC gain F(0).

I measured these quantities: K=0.226 V/rad; C=8.3e6 Hz/V and F(0)=28.7dB=21.5. The max frequency step should be Delta_f_max = 6.4MHz.

Although in reality the PLL can't handle more than a 10 KHz step. There's probably some other effect that I'm not.

I'm attaching here plots of the PLL Open Loop Gain, of the PLL filter and of a spectra of the error point measured in different circumstances.

I don't have much time to explain here how I took all those measurements. After I fix the problem, I'm going to go go through those details in an elog entry.

Does anyone have any suggestion about what, in principle, might be limiting the frequency step?

I already made sure that both cables going to the mixer (the cable with the beat signal coming from the photodiode and the cable with the LO signal coming from the Marconi) had the same length. Although ideally, for phase locking, I would still need 90 degrees of phase shift between the mixing signals, over the entire frequency range for which I do the cavity scan. By now the 90 degrees are not guaranteed.

Also, I have a boost that adds another 20 dB at DC to the PLL's filter. Although it doesn't change anything. In fact, as said above calculating the frequency step, the PLL should be able to handle 100KHz steps, as I would want the PLL to do.

Attachment 1: 2010-02-08_Old_PDH_Box_Filter_TF_gain_knob_0_Boost_OFF.png  23 kB  | Hide | Hide all | Show all
2010-02-08_Old_PDH_Box_Filter_TF_gain_knob_0_Boost_OFF.png
Attachment 2: 2010-02-08_PLL_OLG_gain_knob_0_Boost_OFF.png  45 kB  | Show | Hide all | Show all
Attachment 3: 2010-02-08_PLL_Noise_Budget.png  57 kB  | Hide | Hide all | Show all
2010-02-08_PLL_Noise_Budget.png
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