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Entry  Wed Dec 23 16:34:25 2009, Koji, Update, IOO, MCT QPD/MC REFL QPD disabled 
    Reply  Thu Dec 24 19:13:29 2009, Koji, Update, IOO, MCT QPD investigation D990692.png
       Reply  Sun Dec 27 23:44:59 2009, rana, Update, Electronics, MCT QPD investigation 
          Reply  Mon Dec 28 01:17:01 2009, Koji, Update, Electronics, MCT QPD investigation 
Message ID: 2455     Entry time: Mon Dec 28 01:17:01 2009     In reply to: 2454
Author: Koji 
Type: Update 
Category: Electronics 
Subject: MCT QPD investigation 

Unfortunately, the signals for individual segments also suffer from the voltage drop as all of the low impedance amplifiers are hung from the same input.
In order to utilize the individual channels, we anyway have to remove the resistors for the VERT/HOR/SUM amps.
That is possible. But does it disable some fast channels for future ASC purposes?



 This is indeed sad. But, we can perhaps bypass all of this by just using the individual segment outputs. According to the circuit diagram and the c1iool0 .db file, we should be able to just do the math on the segments and ignore the VERT/HOR/SUM signals completely. In that case, we can just use high impedance for the sum/diff buffers as Koji says and not suffer from the calibration errors at all I think.


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