40m QIL Cryo_Lab CTN SUS_Lab TCS_Lab OMC_Lab CRIME_Lab FEA ENG_Labs OptContFac Mariner WBEEShop
  40m Log  Not logged in ELOG logo
Entry  Mon May 16 14:46:35 2022, Tommy, Update, Electronics, RFSoC MTS Work 
    Reply  Fri May 27 15:53:17 2022, Tommy, Update, Electronics, RFSoC MTS Work 
Message ID: 16879     Entry time: Fri May 27 15:53:17 2022     In reply to: 16857
Author: Tommy 
Type: Update 
Category: Electronics 
Subject: RFSoC MTS Work 

With some help from the forums, we printed the status of the DAC MTS sync and were able to determined that our board's vivado design does not have MTS enabled on each tile. To fix this, we will need to construct a new Vivado desgin for the board. We were also warned to "make sure to generate correctly a PL_clock and a PL_sysref with your on board clock synthesizers and to capture them in the logic according to the requirements in PG269" of the RF Manual. From this we should be able to sync the DAC and ADC tiles as desired.

Quote:

We followed the manual's guide for setting up MTS to sync on external signal. In the xrfdc package, we update the RFdc class to have RunMTS, SysRefEnable, and SysRefDisable functions as prescribed on page 180 of the manual. Then, we attempted to run the new functions in the notebook and read the DAC signal outputs on an oscilloscope. The DACs were not synced. We were also unable to get FIFOlatency readings. 

 

ELOG V3.1.3-