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40m Log |
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Wed Nov 18 22:49:06 2020, gautam, Update, ASC, Some thoughts about AS WFS electronics
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Sun Nov 22 21:09:37 2020, gautam, Update, ASC, Planned mods for WFS head  
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Wed Nov 25 18:18:41 2020, gautam, Update, ASC, Planned mods for WFS head 
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Sat Nov 28 21:44:53 2020, rana, Update, ASC, Planned mods for WFS head
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Thu Dec 10 22:46:57 2020, gautam, Update, ASC, WFS head assembled 
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Thu Dec 17 15:23:56 2020, gautam, Update, ASC, WFS head characterization    
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Wed Nov 25 18:30:23 2020, gautam, Update, ASC, Some thoughts about AS WFS electronics
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Wed Dec 2 23:07:19 2020, gautam, Update, ASC, Electrical LO signal for AS WFS
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Thu Dec 3 11:02:35 2020, rana, Update, Electronics, Electrical LO signal for AS WFS
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Thu Dec 3 13:55:52 2020, Koji, Update, ASC, Electrical LO signal for AS WFS
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Thu Dec 3 20:38:46 2020, gautam, Update, ASC, Electrical LO signal for AS WFS  
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Thu Dec 3 21:14:38 2020, Koji, Update, ASC, Electrical LO signal for AS WFS
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Thu Dec 3 21:44:49 2020, gautam, Update, ASC, Electrical LO signal for AS WFS
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Fri Dec 4 03:02:40 2020, Koji, Update, ASC, Electrical LO signal for AS WFS
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Fri Dec 4 22:41:56 2020, gautam, Update, ASC, Freq Gen Box revamp
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Sat Dec 5 20:44:35 2020, gautam, Update, ASC, Freq Gen Box re-installed 6x
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Mon Dec 7 12:38:51 2020, gautam, Update, IOO, IMC loop char  
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Mon Dec 7 22:54:30 2020, gautam, Update, LSC, Modulation depth measurement
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Sat Jan 16 18:59:44 2021, gautam, Update, LSC, Modulation depth measurement   
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Message ID: 15689
Entry time: Wed Nov 25 18:18:41 2020
In reply to: 15683
Reply to this: 15691
15731
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Author: |
gautam |
Type: |
Update |
Category: |
ASC |
Subject: |
Planned mods for WFS head |
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I am confused by the discussion during the call today. I revisited Hartmut's paper - the circuit in Fig 6 is essentially what I am calling "only 2f_2 notch stuffed" in my previous elog. Qualitatively, the plot I presented in Attachment #2 of the preceeding elog in this thread shows the expected behavior as in Fig 8 of the paper - the impedance seen by the photodiode is indeed lower. In Attachment #1, I show the comparison - the "V(anode)/I(I1)" curve is analogous to the "PD anode" curve in Hartmut's paper, and the "V(vout)/I(I1)" curve is analogous to the "1f-out" curve. I also plot the sensitivity analysis (Attachment #2), by varying the photodiode junction capacitance between 100pF and 200 pF (both values inclusive) in 20 pF steps. There is some variation at 55 MHz, but it is unlikely that the capacitance will change so much during normal operation?
I understand the motivation behind stuffing the other notches, to reduce intermodulation effects. But the impression I got from the call was that somehow, the model I presented was wrong. Can someone help me identify the mistake?
I didn't bother to export the LTspice data and make a matplotlib plot for this quick analysis, so pardon the poor presentation. The colors run from green=100pF to grey=200pF. |
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