Summary:
The Y arm cavity length was locked to the PSL frequency with ~26kHz UGF, and 25 degrees phase margin. Slow actuation was done on ETMY using CM_Slow as an error signal, while fast actuation was done on the IMC error point via the IN2 input of the IMC servo board. Attachment #1 shows the comparison of the in-loop error signal spectra with only slow actuation and with the full CM loop engaged.
Details:
- LSC enable OFF.
- Configure the CM board for locking:
- CM board IN1 gain = 25dB.
- CM_Slow whitening gain = +18dB, make sure the offsets are correctly set. CM_Slow filter bank = -0.015.
- CM_Slow-->YARM matrix element in LSC input matrix is -2.5.
- YARM-->ETMY matrix element in LSC Output matrix is 1.
- AO gain set to +5dB. IMC Servo board IN2 gain starts at -32dB, the path is disabled. The polarity is Plus.
- Usual YARM FM triggers are set (FM1, FM2, FM3, FM6, FM8), usual YARM servo gain is used (0.01), usual triggering conditions (ON @ TRY>0.3, OFF @ TRY < 0.1), usual power normalization by TRY.
- Enable LSC mode, wait for the arm to acquire lock.
- Once the digital boosts are engaged, enable the IMC IN2 path, ramp up the gain to -2 dB. Note that this IN2 path is AC coupled, according to this elog. The corner frequency is 1/2/pi/2e3/6.8uF ~11 Hz. This was confirmed by measurement, see Attachment #3. I couldn't find a 2-pin LEMO-->BNC adaptor so I measured at the BNC connector for the IN2 input, which according to the schematic is shorted to the LEMO (which is what we use for the AO path).
- Enable the CM board boost.
- Ramp up the CM board IN1 gain to +31dB. In this config, the CM_Slow signal is ~18,000 cts pk (with the +18dB whitening gain), so not saturating the ADC.
- Ramp up the IMC IN2 gain to 3dB, engage 2 Super Boosts (can't turn on the third). Limiter is always ON.
- Use the CM board error point offset adjust to zero the POY11_I error signal average value - there seems to be some offsets when engaging the boosts. The value I used was 0.9 V (this is internally divided by 40 on the CM board).
- Whiten the CM_Slow signal - this doesn't seem to have any impact on the noise anywhere.
I hypothesize that the high-frequency noise (>100 Hz) is higher for POY than POX in Attachment #1 because I am using the "MON" port of the demod board - this has a gain of 2, and there could also be some flaky components in this path, hence the high frequency noise is a factor of a few greater in the POY spectrum relative to the POX spectrum (which is using the main demodulated output). For REFL11, we have a low noise preamp generating the input signal so I don't think we need to worry about this too much.
The PC Drive RMS didn't look any stranger than it usually does for the duration of the lock.
Attachment #2 shows the OLTF of the locking servo with the final gains / settings, which are in bold. The loop is maybe a bit marginal, could possibly benefit from backing off one of the super boosts. But the arm has stayed locked for >1 hour.
The purpose of this test was to verify the functionality of the CM board and also the IN2 of the IMC servo board in a low-pressure environment. Once I confirm that the modelled OLTF lines up with the measured, I will call this test a success, and move on to looking at REFL11 in the arms on ALS, PRMI on 3f config. I am returning the REFL11 signal to the input of the CM board, but the SR785 remains hooked up.
Unrelated to this work - PMC alignment was tweaked to improve input power to IMC by ~5%. |