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Entry  Fri Sep 20 12:55:02 2019, gautam, Update, CDS, c1iscaux testing 
    Reply  Mon Sep 23 10:49:34 2019, rana, Update, CDS, c1iscaux testing 
    Reply  Wed Sep 25 20:10:13 2019, Koji, Update, CDS, c1iscaux testing testDetectMons_190925.pngtestIPPOS_190925.png
       Reply  Thu Sep 26 20:09:40 2019, Koji, Update, CDS, c1iscaux testing Wht1.pdfWht2.pdfWht3.pdfWht4.pdflock.png
          Reply  Fri Sep 27 15:59:53 2019, gautam, Update, CDS, c1iscaux testing 
          Reply  Wed Oct 2 01:11:40 2019, Koji, Update, CDS, c1iscaux testing 8x
             Reply  Fri Oct 4 01:57:09 2019, Koji, Update, CDS, c1iscaux testing P_20191003_172956_vHDR_On.jpgTF.pdfPSD.pdf191003_AA_Filter.zip
                Reply  Sat Oct 5 00:03:21 2019, Koji, Update, CDS, c1iscaux testing REFL1_GAIN1.pdfREFL1_GAIN2.pdfREFL2_GAIN1.pdfREFL2_GAIN2.pdf
                   Reply  Tue Oct 8 03:32:42 2019, Koji, Update, CDS, CM servo board testing 7x
                      Reply  Tue Oct 8 17:59:29 2019, Koji, Update, CDS, CM servo board testing (portal) 6x
                         Reply  Tue Oct 8 18:42:39 2019, Koji, Update, CDS, CM servo board testing boosts.pdf
                            Reply  Mon Oct 14 16:06:28 2019, Koji, Update, CDS, CM servo board testing pole_zero_filter.pdf
                               Reply  Mon Oct 14 16:19:30 2019, Koji, Update, CDS, CM servo board testing testb2.pdf
                                  Reply  Mon Oct 14 16:25:03 2019, Koji, Update, CDS, CM servo board testing servo_out.pdf
                                     Reply  Mon Oct 14 16:34:42 2019, Koji, Update, CDS, CM servo board testing in12_output_offset.pdfin12_input_offset.pdfin12_input_offset2.pdf
                                        Reply  Mon Oct 14 17:32:28 2019, Koji, Update, CDS, Portal Elog entry for the recent CM servo board tests CM_Servo_Diagram.png
                         Reply  Tue Oct 8 20:23:03 2019, gautam, Update, CDS, c1iscaux testing 
    Reply  Mon Sep 30 11:20:43 2019, gautam, Update, CDS, c1iscaux testing - CM board code updated CMsoftTest.png
       Reply  Mon Sep 30 15:51:59 2019, gautam, Update, CDS, c1iscaux - some admin 
Message ID: 14921     Entry time: Wed Oct 2 01:11:40 2019     In reply to: 14908     Reply to this: 14939
Author: Koji 
Type: Update 
Category: CDS 
Subject: c1iscaux testing 

I worked on more troubleshooting of the whitening filters Tuesday afternoon

== Test Status ==

[done] Whitening gain switching test => Remaining issues ASDC overall behavior
[done] AA enable/disable switching
[0th order] LO Det Mon channel check
[none] PD I/F board check
[done] QPD I/F board check
[none] CM Board
[none] ALS I/F board

Issue 1: POP110Q did not show any gain switching [Resolved]

A DB37 breakout board was connected to the acromag front panel. I found that Ch6 (POP110Q) did not show any differential DC output. I searched around the other pins and found that the corresponding signal showed up on PIn36  instead of Pin35. Opening the front panel revealed that the internal wiring was wrong (Attachment 1). The wire which should have gone to Pin 35 was connected to Pin 36. By correcting the wiring, POP110Q started to show identical behavior to POP110I. (Attachment 2)

Issue 2: LSC reboot [Resolved]

A rough activity around the acromag chassis crashed c1lsc realtime processes (as usual). I ran usual rebooting script /opt/rtcds/caltech/c1/scripts/cds/rebootC1LSC.sh. This successfully restored the status of the vertex RT processes.

Issue 3: REFL33 different behavior between I and Q [Resolved]

REFL33I and Q consistently showed a difference (Attachment 3). The whitening board was pulled out and powered with an extension card. The raw outputs were checked with a function generator and an oscilloscope connected. The outputs for 33I and Q were identical (Attachment 4). So I concluded that the observed difference was an artifact of the checking script.

Issue 4: Whitening 3_8 did not switch at all [Resolved]

To switch the gain stages, each channel of the whitening board takes a DAC output from acromag and convert it into 4bit digital signals. For CH8 of the WF#3, this signal did not reach the instrumentation amplifier AD620. After tracing the signal on the electronics bench, it was found that the CH8 gain input to the DIN96 connector is not conducive to the input of the AD620. As there were no exposed pads between the DIN96 connector and the AD620 input (pin2), a wire was additionally soldered (forgot to take a photo). This solved the gain switching issue as the test result indicates (Attachment 5). The noisiness came from the whitening filter which can not be turned off right now. For this reason, the test of the whitening part is pending too.

The StripTool plot during the overall WF#3 test is shown in Attachment 6.

Issue 5: ASDC behavior [Unresolved]

First of all, at this test, I found that WF#4 was not responding to the gain change at all. This issue was restored by power cycling the acromag chassis (as usual).

The whitening filter #4 was pulled, and the behavior of CH5,6,7,8 (CH8=ASDC) was compared. It was found that the analog outputs were identical and the problem lies further downstream.

Issue 6: Illeagal REFL11 LO cable [Unresolved]

This is a newly found issue. The cable between the LO distributor and the REFL11 demodulator is not the legit solder soaked RG402 coax, but flexible coax (Attachment 7). This cable needs to be replaced in the end. But for today, it was not so that we can have a consistent configuratin as before.

Issue 7: Signature of a damaged POPDC cable [Resolved]

The cable for POPDC cale indicated some damage at the WF#4 side. It was not a complete damage, and therefore the solder coating was added (Attachment 8).

Attachment 1: WF3_wiring.png  402 kB  Uploaded Wed Oct 2 02:12:09 2019  | Hide | Hide all
Attachment 2: POP110.pdf  24 kB  Uploaded Wed Oct 2 02:12:41 2019  | Hide | Hide all
Attachment 3: REFL33.pdf  25 kB  Uploaded Wed Oct 2 02:13:03 2019  | Hide | Hide all
Attachment 4: P_20191001_174548_vHDR_On.jpg  1.889 MB  Uploaded Wed Oct 2 02:13:10 2019  | Hide | Hide all
Attachment 5: Whitening3_8.pdf  20 kB  Uploaded Wed Oct 2 02:13:20 2019  | Hide | Hide all
Attachment 6: Screenshot_WF3_191001.png  17 kB  Uploaded Wed Oct 2 02:13:25 2019  | Hide | Hide all
Attachment 7: P_20191001_181052_vHDR_On.jpg  444 kB  Uploaded Wed Oct 2 02:13:40 2019  | Hide | Hide all
Attachment 8: POPDCcable.png  574 kB  Uploaded Wed Oct 2 02:13:47 2019  | Hide | Hide all
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