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Fri Sep 20 12:55:02 2019, gautam, Update, CDS, c1iscaux testing
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Mon Sep 23 10:49:34 2019, rana, Update, CDS, c1iscaux testing
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Wed Sep 25 20:10:13 2019, Koji, Update, CDS, c1iscaux testing 
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Thu Sep 26 20:09:40 2019, Koji, Update, CDS, c1iscaux testing    
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Fri Sep 27 15:59:53 2019, gautam, Update, CDS, c1iscaux testing
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Wed Oct 2 01:11:40 2019, Koji, Update, CDS, c1iscaux testing 8x
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Fri Oct 4 01:57:09 2019, Koji, Update, CDS, c1iscaux testing   
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Sat Oct 5 00:03:21 2019, Koji, Update, CDS, c1iscaux testing   
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Tue Oct 8 03:32:42 2019, Koji, Update, CDS, CM servo board testing 7x
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Tue Oct 8 17:59:29 2019, Koji, Update, CDS, CM servo board testing (portal) 6x
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Tue Oct 8 18:42:39 2019, Koji, Update, CDS, CM servo board testing
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Mon Oct 14 16:06:28 2019, Koji, Update, CDS, CM servo board testing
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Mon Oct 14 16:19:30 2019, Koji, Update, CDS, CM servo board testing
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Mon Oct 14 16:25:03 2019, Koji, Update, CDS, CM servo board testing
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Mon Oct 14 16:34:42 2019, Koji, Update, CDS, CM servo board testing  
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Mon Oct 14 17:32:28 2019, Koji, Update, CDS, Portal Elog entry for the recent CM servo board tests
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Tue Oct 8 20:23:03 2019, gautam, Update, CDS, c1iscaux testing
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Mon Sep 30 11:20:43 2019, gautam, Update, CDS, c1iscaux testing - CM board code updated
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Mon Sep 30 15:51:59 2019, gautam, Update, CDS, c1iscaux - some admin
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Message ID: 14905
Entry time: Mon Sep 23 10:49:34 2019
In reply to: 14903
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Author: |
rana |
Type: |
Update |
Category: |
CDS |
Subject: |
c1iscaux testing |
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- I'd say permanently enable AA and AI. There's no reason to turn these off for usual channels. We can always undo one switch later if we want to use aliasing to sample a high frequency signal (ala SoCal).
- The PD output should ~20 nV/rHz into the mixer, so that's ~7 nV into the whitening filter. We need 60 dB to be above the ADC noise.
- I've forgotten what the current config is, but in iLIGO we hacked in a fixed whtiening on the Lt1128 input amp to the WF board so that the lock acquisition could be a little easier (better SNR). On Ch1, that's replacing R60 with a RC network. We want to make sure that the lock acq transients are not saturating the ADC, but can maybe put in a 40:200 stage.
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