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ID Date Author Typedown Category Subject
  8591   Thu May 16 11:50:25 2013 KojiConfigurationElectronicsMeasurement and empirical models of the AI board TFs

Yesterday, I pulled out the AI board for the PRM/BS SUSs. (After the investigation it was restored)

Contrary to our expectation, the board D000186 was not Rev. A but Rev. B.

According to Jay's note in D000186 (for Rev.D), the differences of the Revs are as follows

Rev.A: Initial Release (Analog Biquad version, 4dB 4th order elliptic with notches)
Rev.B: Filter implemented by Freq Devices chip
Rev.C: Differential input version with better RF filtering
Rev.D: 3rd order 0.5dB ripple Cheby with notches at 16K&32K, DB25 input version


I went to the WB EE shop and found bunch of AI filter modules. At least I found one Rev.A and six Rev.D.
I found at least one Rev. C.

I took Rev.A and Rev. D to see the difference of the transfer functions.
Rev.A has more ripple but steeper roll-off. Rev. D is flater at the pass band with slower roll-off.
Rev.D has more phase lag, but it will be fine once the entire frequency response is shifted to x4 high frequency.
The notch frequency of the Rev. D looked right.

I made the empirical pole/zero modeling of the transfer functions.
The LISO models are attached as the ZIP file.
I faced an unexplainable phase behavior at around one the notches for Rev.A.
This may suggest there could have been internal saturation is the stage during the sweep.

More importantly, Rev. D has differential inputs although the connector formfactor is different from the current 40pin IDC.
In fact we should not use Rev.A or Rev.B as they have single end inputs.
Currently the inputs of the AI's for the SUSs are single ended while the DACs are differential.
This means that
1) We waste a half of the DAC range.
2) The negative outputs of the DACs are short-circuited. OMG
3) The ground level fluctuation between the DAC and the SUS rack fluctuates the actual actuation voltage.

Now I am looking at the noise performance of the filters as well as the DAC output noise and range.
I hope we can use Rev.D by replacing the connector heads as this will remove many of the problems we currently have.

  8592   Thu May 16 22:03:16 2013 KojiConfigurationLSCY Green BBPD returned to the PSL table

I borrowed the GTRY BBPD  for the REFL165 trial before.

Now the PD is back on the PSL table.

The PD is intentionally misaligned so that anyone can find it is not aligned.

  8654   Thu May 30 10:40:59 2013 JamieConfigurationCDSAttempt to cleanup c1ioo ADC connections

I have attempted to reconcile all of the ADC connections to c1ioo.  Upon close inspection, it appears that there was a lot of legacy stuff hanging around.  Either that or things have not been properly connected.

The c1ioo front end machine has two ADC cards, ADC0 and ADC1, which are used by two models, c1ioo and c1als.  The CURRENT ADC connections are listed in the table below.  The yellow cells indicate connections that were moved.  The red cells indicate connections that were removed/unplugged:

  channel block connection channel usage  model
ADC0 8-15 MC WFS1 interface   MC WFS1 c1ioo
16-23 MC WFS2 interface   MC WFS2 c1ioo
0-7

generic interface card (2 pin lemo)

0    
1    
2    
3 ALS TRX c1als
4 ALS TRY c1als
5    
6 MCL c1ioo
7 MCF c1ioo

 

  channel block connection channel usage model
ADC1 0-31 1U interface board 0/1 (J1A) PSL FSS MIXER/NPRO c1ioo
2/3 (J2) ALS BEAT X/Y DC c1als
4/5 (J3) PSL eurocrate DAQ interface J4  
6/7 PSL eurocrate DAQ interface J5  
8/9 PSL eurocrate DAQ interface J6  
10/11 MC eurocrate DAQ interface J1  
12/13 MC servo board DAQ  
14/15 (J8)    
16/17 (J9A) UNLABELLED ("DAQ ISS1"???)  
18/19 (J10) "DAQ ISS2"  
20/21 "DAQ ISS3"  
22/23 ALS BEAT X I/Q c1als
24/25 ALS BEAT Y I/Q c1als
26/27    
28/29    
30/31 (J16)    

The following changes were made:

  • "MC L" had been connected to ADC_0_0, moved to ADC_0_6
  • "MC F" had been connected to ADC_0_6, moved to ADC_0_7

The c1ioo model was rebuilt/restarted to reflect this change.

The PSL-FSS_MIXER and PSL-FSS_NPRO connections were broken in the c1ioo so I fixed them when I moved the MC channels.

All the removed connections from ADC1 were not used by any of the front end models, which is why I unplugged them.  Except for the MC DAQ interface J1 and MC servo DAQ connections, I left all other cables plugged in to wherever they were coming from.  The MC cables I did fully remove.

I don't know what these connections were meant for.  Presumably they expose they expose some useful DAQ channels that we're now getting elsewhere, but I'm not sure.  We don't currently have an ISS, which is presumably why the cables labelled "ISS" are not going anywhere.

TODO

I would like to see some more 4-pin lemo --> double BNC cables made.  That would allow us to more easily use the ADC1 generic interface board:

  • Moved ALS TRX/Y to ADC1, so that we can keep all the ALS connections together in ADC1.
  • POP QPD X/Y/SUM

We should also figure out if we're sub-optimally using the various "DAQ" connections to the DAQ cable connectiosn to the eurocrate DAQ interface cards and servo boards.

  8656   Thu May 30 11:28:34 2013 JamieConfigurationCDSc1als model cleanup

The c1als model was pulling out some ADC0 connections that were no longer used for anything:

  • ADC_0_1 --> sfm "FD" --> IPC "C1:ALS-SCX_FD"
  • ADC_0_5 --> sfm "OCX" --> term
  • ADC_0_6 --> sfm "ADC" --> term

The channels would have shown up as C1:ALS-FD, C1:ALS-OCX, C1:ALS-ADC.  The IPC connection that presumably was meant to go to c1scx is not connected on the other end.

I removed all this stuff from the model and rebuilt/restarted.

  8657   Thu May 30 11:33:26 2013 JamieConfigurationComputer Scripts / ProgramsASS medm/model changes need to be committed to SVN

There are a lot of changes to the ASS stuff that have not been committed to the SVN:

controls@rossa:/opt/rtcds/userapps/release/isc/c1 0$ svn status | grep -v '?'
M       medm/c1als/C1ALS_X_SLOW.adl
D       medm/c1ass/C1ASS_TRY_YAW_LOCKIN.adl
D       medm/c1ass/ASS_SERVOS.adl
D       medm/c1ass/ctrl_yaw_mtrx.adl
D       medm/c1ass/C1ASS_QPDS.adl
D       medm/c1ass/C1ASS_SEN_YAW_MTRX.adl
M       medm/c1ass/C1ASS_XARM_SEN_MTRX.adl
D       medm/c1ass/SITEMODEL_LOCKINNAME.adl
D       medm/c1ass/C1ASS_TRX_YAW_LOCKIN.adl
D       medm/c1ass/C1ASS_LOCKIN1.adl
D       medm/c1ass/C1ASS_LOCKIN2.adl
D       medm/c1ass/C1ASS_LOCKIN3.adl
D       medm/c1ass/C1ASS_LOCKIN4.adl
D       medm/c1ass/C1ASS_LOCKIN5.adl
D       medm/c1ass/C1ASS_LOCKIN6.adl
D       medm/c1ass/C1ASS_LOCKIN7.adl
D       medm/c1ass/C1ASS_LOCKIN8.adl
D       medm/c1ass/C1ASS_LOCKIN9.adl
D       medm/c1ass/C1ASS_REFL11I_PIT_LOCKIN.adl
M       medm/c1ass/C1ASS.adl
D       medm/c1ass/C1ASS_LOCKIN10.adl
D       medm/c1ass/C1ASS_LOCKIN11.adl
D       medm/c1ass/C1ASS_LOCKIN12.adl
D       medm/c1ass/C1ASS_LOCKIN13.adl
D       medm/c1ass/C1ASS_LOCKIN14.adl
D       medm/c1ass/C1ASS_LOCKIN15.adl
D       medm/c1ass/sen_yaw_mtrx.adl
D       medm/c1ass/C1ASS_LOCKIN16.adl
D       medm/c1ass/C1ASS_LOCKIN17.adl
D       medm/c1ass/C1ASS_DOF_YAW.adl
D       medm/c1ass/C1ASS_LOCKIN18.adl
D       medm/c1ass/C1ASS_LOCKIN19.adl
D       medm/c1ass/C1ASS_TRY_PIT_LOCKIN.adl
D       medm/c1ass/ctrl_pit_mtrx.adl
D       medm/c1ass/C1ASS_SEN_PIT_MTRX.adl
D       medm/c1ass/C1ASS_LOCKIN20.adl
D       medm/c1ass/C1ASS_LOCKIN21.adl
D       medm/c1ass/C1ASS_LOCKIN22.adl
D       medm/c1ass/C1ASS_LOCKIN23.adl
D       medm/c1ass/C1ASS_LOCKIN24.adl
D       medm/c1ass/C1ASS_LOCKIN25.adl
D       medm/c1ass/C1ASS_LOCKIN26.adl
D       medm/c1ass/C1ASS_LOCKIN27.adl
D       medm/c1ass/C1ASS_TRX_PIT_LOCKIN.adl
D       medm/c1ass/C1ASS_LOCKIN28.adl
D       medm/c1ass/C1ASS_LOCKIN29.adl
D       medm/c1ass/C1ASS_XARM_QPDS.adl
D       medm/c1ass/C1ASS_YARM_QPDS.adl
M       medm/c1ass/C1ASS_XARM_OUT_MTRX.adl
D       medm/c1ass/ASS_SEN_MTRX.adl
D       medm/c1ass/ASS_LOCKINS.adl
D       medm/c1ass/sen_pit_mtrx.adl
D       medm/c1ass/C1ASS_REFL11I_YAW_LOCKIN.adl
D       medm/c1ass/C1ASS_LOCKIN30.adl
D       medm/c1ass/C1ASS_DOF_PIT.adl
M       models/c1ass.mdl
controls@rossa:/opt/rtcds/userapps/release/isc/c1 0$
  8673   Tue Jun 4 20:19:07 2013 ranaConfigurationIOOChanged threshold for FSS SLOW loop

The FSS SLOW actuator often runs off away from zero and into a region where the mode hopping is bad and makes a lot of frequency noise (e.g. that 8 hour period a few weeks ago when Jamie couldn't lock the MC).

It should not have this behavior. The SLOW loop should only be running when the MC is locked.

Today I found that the threshold was set back to 0.2 V (which is approximately the correct value for the RefCav locking). Its being compared to the MC TRANS, so the correct value should be ~1/2 of the maximum MC TRANS.

To find this out, I read this piece of text:

    # Make sure the loop is supposed to be active
    if (get_value("C1:IOO-MC_TRANS_SUM") < get_value("C1:PSL-FSS_LOCKEDLEVEL")) {
    print("Reference Cavity not locked -- control loop disabled.\n");
    next;
    }

from scripts/PSL/FSS/FSSSlowServo. I set the threshold using the commmand:

caput -c -t C1:PSL-FSS_LOCKEDLEVEL 12000

Then I restarted the code on op340m, by typing:

> nohup FSSSlowServo

and then closing the terminal. Seems to be behaving correctly now. Previously, the value was so low that the SLOW loop was never turning itself off.

  8725   Wed Jun 19 16:04:56 2013 JamieConfigurationComputer Scripts / Programsconlog startup fixed, and restarted

I cleaned up a bunch of conlog stuff to make it all a little more sane and simple.  I also fixed the messy startup shenanigans, so that it should now start up sanely and on it's own (using Ubuntu's native upstart system).  The conlog wiki page was updated with all the new info.

  8726   Wed Jun 19 16:47:34 2013 JamieConfigurationComputer Scripts / Programsconlog startup fixed, and restarted

Quote:

I cleaned up a bunch of conlog stuff to make it all a little more sane and simple.  I also fixed the messy startup shenanigans, so that it should now start up sanely and on it's own (using Ubuntu's native upstart system).  The conlog wiki page was updated with all the new info.

 By the way, I also did confirm that it is running and registering EPICS changes.

  8734   Thu Jun 20 17:47:44 2013 AnnalisaConfigurationSUSETMY oplev servo

[Jenne, Annalisa]

The ETMY Oplev servo didn't work properly, when it was activated the ETMY moved too much.

We measured the oplev TF for Pitch and Yaw and it turned out that the gain was too low by a factor 3, so we increased the gain from -.250 to -.750 on both.

We also locked the Y arm and we could see that the mirror's oscillations are actually suppressed.

 

  8746   Tue Jun 25 19:18:07 2013 gautamConfigurationendtable upgradeplan of action for PZT installation

  This entry is meant to be a sort of inventory check and a tentative plan-of-action for the installation of the PZT mounted mirrors and associated electronics on the Y-endtable. 

Hardware details:

  •  PZT mounts are cleaned and ready to be put on the end-tables.
  • The PZTs being used are PI S-330.20L Piezo Tip/Tilt Platforms. Each endtable requires two of these. The input channels have male single-lemo connectors. There are 3 channels on each tip/tilt platform, for tilt, yaw and a bias voltage.
  • The driver boards being used are D980323 Rev C. Each board is capable of driving 2 piezo tip/tilt platforms. I am not too sure of this but I think that the SMA female connector on these boards is meant to be connected with the bias voltage from our Kepco high-voltage power supplies. The outputs on these boards are fitted with SMB female connectors, while the piezo tip/tilt platforms have male single-lemo connectors. We will have to source cables with the appropriate connectors to run between the end-table and rack 1Y4 (see below). The input to these boards from the DAC will have to be made with a custom ribbon connector as per the pin out configuration given in the circuit drawing.
  • High-voltage power supply: KEPCO BHK 300-130 MG. This will supply the required 100V DC bias voltage to the piezo tip/tilts via the driver board. Since each board is capable of driving two piezos, we will only need one unit per end-table. The question is where to put these (photo attached). It doesn't look like it can be accommodated in 1Y4 (again photo attached) and the power cable the unit came with is only about 8ft long. If we put these under the end-tables, then we will need an additional long (~10m) cable to run from these to the driver boards at 1Y4 carrying 100 V. 
  •  We will need long (~10m by my rough measurement at the X and Y ends) cables to run from rack 1Y4 to the endtable to drive the piezos. These will have to be high-voltage tolerant (at least to 100V DC) and should have SMB male connectors at one end and female single-lemo connectors at the other. I have emailed 3 firms (CD International Technologies Inc., Stonewall Cables, and Fairview Microwave) detailing our requirements and asking for a quote and estimated time for delivery. We will need 6 of these, plus another cable with an SMA connector on one end and the other end open to connect the 100V DC bias voltage from the high voltage power supply to the driver boards (the power supply comes with a custom jack to which we can solder open leads). We will also possibly need ~3m long lemo-to-?(I need to check what the input connector for the data acquisition channels) cables for the monitoring channels, I am not sure if these are available, I will check with Steve tomorrow.

Other details:

  • I have attached a wiring diagram with the interconnects between various devices at various places and the type of connectors required etc. The error signal will the the transmitted green light from the cavity, and there is already a DQ channel logging this information, so nothing additional wiring is required to this end.
  • Jamie had detailed channel availability in elog 8580. I had a look at rack 1Y4, and there were free DAC channels available, but I am not sure as to which of the ones listed in the elog it corresponds to. In any case, Jamie did mention that there are sufficient channels available at the end-stations for this purposes, but all of these are fast channels. What needs to be decided is if we are going ahead and using the fast channels, or if we need to find slow DAC channels. 
  • I spoke to Koji about gluing the mirrors to the PZTs, and he says we can use superglue, and also to be sure to clean both the mirror and the tip/tilt surfaces before gluing. In any case, all the other hardware issues need to be sorted out first before thinking about gluing the mirrors.

High-Voltage Power Supply

photo_3.JPG

 

Situation at rack 1Y4

 

photo_4.JPG

 Wiring diagram

ASC_schematic.pdf

  8800   Wed Jul 3 21:19:04 2013 gautamConfigurationendtable upgradeplan of action for PZT installation

 This is an update on the situation as far as PZT installation is concerned. I measured the required cable (PZT driver board to PZT) lengths for the X and Y ends as well as the PSL table once again, with the help of a 3m long BNC cable, just to make sure we had the lengths right. The quoted cable lengths include a meter tolerance. The PZTs themselves have cable lengths of 1.5m, though I have assumed that this will be used on the tables themselves. The inventory status is as follows.

  1. Stuff ordered:
    • RG316 LEMO 00 (female) to SMB (female) cables, 10 meters - 6pcs (for the Y-end)
    • RG316 LEMO 00 (female) to SMB (female) cables, 11 meters - 6pcs (for the X-end)
    • RG316 LEMO 00 (female) to SMB (female) cables, 15 meters - 8pcs (6 for the PSL, and two spares)
    • RG316 SMA (male) to open cables, 3 meters - 3pcs (1 each for the X end, Y end and PSL table, for connecting the driver boards to the 100V DC power supply)
    • 10 pin IDC connectors for connecting the DAC interface to the PZT driver boards 
  2. Stuff we have:
    • 40 pin IDC connectors which connect to the DAC interface
    • PZT driver boards
    • PZT mounts
    • Twisted ribbon wire, which will be used to make the custom ribbon to connect the 10 pin IDC to the 40 pin IDC connector

I also did a preliminary check on the driver boards, mainly to check for continuity. Some minor modifications have been made to this board from the schematic shown here (using jumper wires soldered on the top-side of the PCB). I will have to do a more comprehensive check to make sure the board as such is functioning as we expect it to. The plan for this is to first check the board without the high-voltage power supply (using an expansion card to hook it up to a eurocrate). Once it has been verified that the board is getting powered, I will connect the high-voltage supply and a test PZT to the board to do both a check of the board as well as a preliminary calibration of the PZTs.

To this end, I need something to track the spot position as I apply varying voltage to the PZT. QPDs are an option, the alternative being some PSDs I found. The problem with the latter is that the interfaces to the PSD (there are 3) all seem to be damaged (according to the labels on two of them). I tried connecting a PSD to the third interface (OT301 Precision Position Sensing Amplifier), and hooked it up to an oscilloscope. I then shone a laser pointer on the psd, and moved it around a little to see if the signals on the oscilloscope made sense. They didn't on this first try, though this may be because the sensing amplifier is not calibrated. I will try this again. If I can get one of the PSDs to work, mount it on a test optical table and calibrate it. The plan is then to use this PSD to track the position of the reflected beam off a mirror mounted on a PZT (temporarily, using double sided tape) that is driven by feeding small-amplitude signals to the driver board via a function generator. 

 

Misc

The LEMO connector on the PZTs have the part number LEMO.FFS.00, while the male SMB connectors on the board have the part number PE4177 (Pasternack)

Plan of Action:

  • The first task will be to verify that the board is working by the methods outlined above.
  • Once the board has been verified, the next task will be to calibrate a PZT using it. I have to first identify a suitable way of tracking the beam position (QPD or PSD?)
  • I have identified a position in the eurocrate at 1Y4 to install the board, and I have made sure that for this slot, the rear of the eurocrate is not hooked up to the cross-connects. I now need to figure out the exact pin configuration at the DAC interface: the bank is marked 'DAC Channels 9-16' (image attached) but there are 40 pins in the connector, so I need to map these pins to DAC channels, so that when making the custom ribbon, I get the pin-to-pin map right.

DAC_bank.png

 

The wiring scheme has been modified a little, I am uploading an updated one here. In the earlier version, I had mistaken the monitor channels as points from which to log data, while they are really just for debugging. I have also revised the coaxial cable type used (RG316 as opposed to RG174) and the SMB connector (female rather than male).

ASC_schematic.pdf 

 

 

 

 

  8804   Mon Jul 8 13:45:19 2013 gautamConfigurationendtable upgradeDriver board verification

With the help of an expansion card,  I verified that the + 15V and + 24V from the eurocrate in the slot I've identified for the PZT driver boards are making their way to the board. The slot is at the right-most end of the eurocrate in 1Y4, and the rack door was getting in the way of directly measuring these voltages once I hooked up the driver board to the expansion card. So I just made sure that all the LEDs on the expansion card lit up (indicating that the eurocrate is supplying + 5, + 15 and + 24V), and then used a multimeter to check continuity between the expansion card and the driver board outside of the eurocrate. The circuit only uses + 15V and + 24V, and I checked for continuity at all the IC pins marked with these voltages on the schematic.

Since the whole point of this test was to see if the slot I identified was delivering the right voltages, I think this is sufficient. I will now need to fashion a cable that I can use to connect a DC power supply to the PZT driver boards so that these can be tested further.

The high voltage points (100V DC) remain to be tested.

  8823   Wed Jul 10 22:41:06 2013 gautamConfigurationendtable upgradePZT Driver Board

 I did the following with the PZT Driver Board: 

 

  •  With an expansion card attached to the driver board, I used an Agilent E3620A power supply to verify that the 15V and 24V supplies were reaching the intended ICs. It turns out that the +24 V supply was only meant to power some sort of on-board high voltage supply which provided the 100V bias for the PZTs and the MJE15030s. This device does not exist on the board I am using, jumper wires have been hooked up to an SMA connector on the front panel that directly provides 100V from the KEPCO high voltage supply to the appropriate points on the circuit.

  •  All the AD797s as well as the LT1125CS ICs on the board were receiving the required +15V.

      

The next step was to check the board with the high-voltage power supply connected.

 

  •  The output from the power supply is drawn from the rear output terminal strip of the power supply via pins TB1-2 (-OUT) and TB1-7 (+OUT). I used a length of RG58 coaxial cable from the lab and crimped a BNC connector on one end, and stripped the other to attach it to the above pins.

  •  There are several options that can be configured for the power supply. I have left it at the factory default: Local sensing (i.e. operating the power supply using the keypad on the front of it as opposed to remotely), grounding network connected (the outputs of the power supply are floating), slow mode, output isolated from ground.

  • I was unsure of whether the grounding network configuration or the 'positive output, negative terminal grounded' configuration was more appropriate. Koji confirmed that the former was to be used so as to avoid ground loops. When installed eventually, the eurocrate will provide the ground for the entire system.
  • I then verified the output of the HV power supply using a multimeter from 2V up to 150V.
  • I then connected the high voltage supply to the PZT driver board with a BNC-SMA adaptor, set, for a start, to output 30V. Ensured that the appropriate points on the circuit were supplied with 30V.

 

I then hooked up a function generator in order to simulate a control signal from the DAC. The signal was applied to pin 2 of the jumpers marked JP1 through JP4 on the schematic, one at a time. The signal applied was a 0.2 Vpp, 0.1 Hz sine wave.

 

 

 

  •  The output voltage was monitored both using a DMM at the SMB output terminals, and at the monitor channels using an oscilloscope. The outputs at both these points were as expected.
  • There are 4 potentiometers on the board, which need to be tuned such that the control output to the piezos are 50V when the input signal is zero (as this corresponds to no tilt). The gain of the amplifier stage (highlighted in the attached figure) right now is ~15, and I was using 30V in place of 100V, so an input signal of 2V would result in the output saturating. This part of the circuit will have to be tuned once again after applying the full 100V bias voltage. 
  • Koji suggested decreasing the gain of the amplifier stage by switching out resistor R43 (and corresponding resistor in the other 3 stages on the board) after checking the output range of the DAC so that possibility of unwanted saturation is minimised. I need to check this and will change the resistors after confirming the DAC output range. 
  • The potentiometers will have to be tuned after the gain has been adjusted, and with 100V from the high-voltage DC power supply. 

  

To Do:

 

  • Switch out resistors
  • Tune potentiometers with 100V from the HV supply
  • Verify that the output from the board after all the tuning lies in the range 0-100V for all possible input voltages from the DAC.
  • Once the output voltage range has been verified, the next step would be to connect a PZT to the board output, affix a mirror to the tip/tilt, and perform some sort of calibration for the PZT. 

HV_Amplifier.pdf

 

 

 

 

 

 

  8832   Thu Jul 11 23:50:57 2013 gautamConfiguration PZT Driver Board-changes made

 Summary:

Continued with tests on the PZT driver board. I made a few changes to replace defective components and also to modify the gain of the HV amplifier stage. I believe the board has been verified to be satisfactory, and is now ready for a piezo to be connected, tested and calibrated.

Changes made:

  • I tested the board with the full 100V bias voltage today, working my way up from 30V in steps of about 20V and verifying the output at each stage.
  • In order to deliver 100V to the board, it was necessary to change the maximum current limit on the KEPCO supply, which is set at default at ~1.6 mA. The KEPCO power supply placed near rack 1X2 (which I believe was used to power a piezo driver board) is labelled 150V, 12 mA, though I found that the board only drew 7mA of current when the power supply output 100V. I have set the limit to 10 mA for the time being.
  • The potentiometer in the third stage (R44 in the schematic) was faulty so I replaced it with another 100K potentiometer, which was verified to work satisfactorily.
  • We expect the DAC output to supply a voltage to the input of the PZT driver board in the range -10V to 10V. Today, I verified this by using my temporary break-out cable. I hooked this up to the DAC at 1Y4 and output a 3 Hz sine wave with amplitude of 32000 counts (the maximum) on channel 9. The output as observed on an oscilloscope (image attached) was a 10Vpp sinusoid, confirming the above hypothesis. As mentioned in my previous elog, the gain of the high-voltage amplifier stage is ~15, which would mean the output would saturate if the input were to be >6V. I have changed the gain of all 4 stages (M1-pitch, M1-yaw, M2-pitch and M2-yaw) to ~4.85 by swapping the 158k resistors (R43, R44, R69 and R70 in the schematic) for 51k resistors. 
  • It was necessary to change the value of the biasing potentiometers after the change in gain so that 0 input voltage once again provided 50V at the output, as required by the PZTs for there to be no tilt. This was done and verified. This biasing voltage now is ~10.4V in all four stages.
  • Having adjusted the gain, I tested the circuit over the expected full range of the input voltage from the DAC (from -10V to 10V) from the DS345 function generator (0.05Hz sinusoid). I monitored the output using a multimeter, as the monitor channels were peaking at ~7V, which was above the limit for the oscilloscope I was using. It was verified for all four channels that the output was between 0 V and 100 V (the safe range quoted in the datasheet for the tip-tilts, for this range of input voltages. So I think we are ready to connect a PZT to the board and conduct further tests, and calibrate the PZT. 

Pending Issues:

  • Koji pointed out that there has to be an anti-imaging filter stage between the DAC output and the filter stage, which I had not considered till this point.Another subtle point is that the DAC output is differential while the driver boards have a single-ended input, which means we effectively lose half the range of the PZTs. 
  • A suitable candidate is the D000186-rev D. Some information about the present state of this board is detailed in this elog. This board also solves the problem of the differential vs single input as the input to the AI board is differential while the output is single-ended. Koji has given me one of the boards he had collected. 
  • Some changes will have to be made to this version of the board in order to make it compatible with the existing DAC. I will first have to measure the power spectrum of the DAC output to verify that the AI boards need notches at 64k and 128k. The existing notches are at 16k and 32k, and once the DAC power spectrum has been verified, I hope to affect the necessary changes by switching out the appropriate capacitors on the existing board. 
  • The AI board is an extra element which I have now added to an updated wiring diagram, attached.

Revised Wiring Diagram:

ASC_schematic.pdf

 

DAC Max. Output Trace on Oscilloscope

 

DAC_Max_output.JPG

 

 

 

  8845   Mon Jul 15 11:51:18 2013 gautamConfigurationendtable upgradeDAC at 1Y4-Max Output and Power Spectrum

 Summary:

I measured the maximum output of the DAC at 1Y4 as well as its power spectrum. The results are as follows (plots below):

  • Maximum amplitude of differential output: + 10V.
  • Power spectrum has a peak at 64 kHz.

Therefore, the gain of the high-voltage amplification stage on the PZT driver boards do not need to be changed again, as the required output range of 0-100V from the DAC board was realised when the input voltage ranged from -10V to +10 V w.r.t ground. The AI board converts the differential input to a single ended output as required by the driver board.

I will now change some resistors/capacitors on the AI board such that the position of the notches can be moved from 16k and 32k to 64k and 128k.

Procedure:

 Max. amplitude measurement

My previous measurement of the maximum output amplitude of the DAC was flawed as I made the measurement using a single channel of the oscilloscope, which meant that the negative pin of the DAC channel under test was driven to ground. I redid the measurement to avoid this problem. The set up this time was as follows:

  • Positive pin of DAC connected to channel 1 of oscilloscope using break out cable and mini-grabber probe
  • Negative pin of DAC connected to channel 2 of oscilloscope
  • Grounds of channels 1 and 2 connected (I just hooked the mini-grabbers together)
  • Measurement mode on oscilloscope set to channel 1 - channel2
  • Used excitation points set up earlier to output a 3 Hz sine wave with amplitude of 32000 counts from channel 9 of the DAC. 

The trace on the oscilloscope is shown below;

max_amp.JPG

So with reference to ground, the DAC is capable of supplying voltages in the range [-10V 10V]. This next image shows all three traces: positive and negative pins of DAC w.r.t ground, and the difference between the two.

max_amp_all_channels.JPG

 Power spectrum measurement

 

I used the SR785 to make the measurement. The set up was as follows:

  • Positive pin of DAC to A-input of SR560
  • Negative pin of DAC to B-input of SR560
  • A-B output to Channel 1 input A of the SR785
  • SR785 configured to power spectrum measurement

Initially, I output no signal to the DAC, and obtained the following power spectrum. The peak at 65.554 kHz is marked.

DACOffPowerSpec.pdf

I then re-did the measurement with a 200 Hz (left) and 2000 Hz(right), 1000 counts amplitude (I had to change the Ch1 input range on the SR785 from -18dBm to -6dBm) sine wave from channel 9 of the DAC, and obtained the following. The peaks at ~64 kHz are marked.

DACOnPowerSpec.pdf    DAC2kPowerSpectrum.pdf

Now that this peak has been verified, I will work on switching out the appropriate resistors/capacitors on the AI board to move the notches from 16k and 32k to 64k and 128k. 

  8846   Mon Jul 15 13:51:17 2013 KojiConfigurationendtable upgradeDAC at 1Y4-Max Output and Power Spectrum

We need the unit of the voltage power spectrum density to be V/sqrt(Hz).
Otherwise we don't understand anything / any number from the plot.

  8848   Mon Jul 15 15:54:20 2013 gautamConfigurationendtable upgradeDAC at 1Y4- Power Spectrum -with the right units

Quote:

We need the unit of the voltage power spectrum density to be V/sqrt(Hz).
Otherwise we don't understand anything / any number from the plot.

 I redid the measurement with the appropriate units set on the SR785. Power spectral density plots for no output (top), 500Hz, 1000 counts amplitude sine wave (middle) and 2000Hz, 1000 counts amplitude (bottom) are attached, with the right unit on the Y-axis.

 

DACOffPSD.pdf

 

DAC500PSD.pdf

 

DAC2000PSD.pdf

  8850   Mon Jul 15 16:51:37 2013 AlexConfiguration Planned AS Table addition

 [Eric, Alex]

We are planning to add our reference PD to the southern third of the AS Table as pictured in the attachment. The power supply will go under the table.

  8852   Mon Jul 15 17:20:43 2013 JenneConfigurationendtable upgradeDAC at 1Y4- Power Spectrum -with the right units

Those 'peaks' for the oscillations seem ridiculously broad.  I think you should look again, really quickly, with smaller bandwidth at, say, the 2kHz oscillation, to make sure it looks reasonable.

  8853   Mon Jul 15 17:59:31 2013 gautamConfigurationendtable upgradeDAC at 1Y4- Power Spectrum -6.4kHz bandwidth

Quote:

Those 'peaks' for the oscillations seem ridiculously broad.  I think you should look again, really quickly, with smaller bandwidth at, say, the 2kHz oscillation, to make sure it looks reasonable.

 I did just this, and it looks okay to me:

DAC-6.4_kHz_BW_PSD.pdf

  8857   Tue Jul 16 14:51:09 2013 gautamConfigurationendtable upgradeAI Board-D000186-Modified notches

 I tried shifting the notch frequencies on the D000186-revision D board given to me by Koji. The existing notches were at ~16 kHz and ~32 kHz. I shifted these to notches at ~64 kHz and ~128 kHz by effecting the following changes (see schematic for component numbering) on Channel 8 of the board-I decided to check things out on one channel before implementing changes en masse:

  • R6 and R7 replaced with 511 ohm smts
  • R8 replaced with 255 ohm smt
  • R14 and R15 replaced with 549 ohm smts
  • R16 replaced with 274 ohm smt

=> New notches should be at 66.3 kHz and 131.7 kHz.

I then measured the frequency response of the modified channel using the SR785, and compared it to the response I had measured before switching out the resistors. The SR785 only goes up to 102 kHz, so I cannot verify the 128 kHz notch at this point. The position of the 64 kHz notch looks alright though. I think I will go ahead and switch out the remaining resistors in the evening.

Note 1: These plots are just raw data from the SR785, I have not tried to do any sort of fitting to poles and zeros. I will do this at some point. 

Note 2: All these smts were taken from Downs. Todd helped me locate the non-standard value resistors. I also got a plastic 25-pin D-sub backshells (the spares are in the rack), with which I have fashioned the required custom ribbon cables (40 pin IDC to 25 pin D-sub with twisted ribbon wire, and a short, 10pin IDC to 10pin IDC with straight ribbon wire).

D000186_Frequency_Response.pdf

  8859   Tue Jul 16 17:02:41 2013 Alex ColeConfigurationElectronicsAS Table Additions

 [Eric, Alex]

We added our reference photodetector (Newport 1611, REF DET) to the southern edge of the AS table, as pictured. The detector's power supply is located under the southwest corner of the table, as pictured. We have connected the detector to its power supply, and will connect the detector's fiber input and RF output tomorrow.

EDIT: this is about the RFPD frequency response setup...

  8862   Wed Jul 17 11:13:36 2013 Alex ColeConfigurationElectronicsAS Table Additions

[Eric, Alex]

For the RFPD frequency response project, we routed the fiber that will connect our REF DET (on the AS table) to our 1x16 optical splitter (in the OMC_North rack), as pictured. (The new fiber is the main one in the picture, which ends at the right edge near REF DET) Note that we secured the fiber to the table in two places to ensure the fiber would remain immobile and out of other optical paths already in place.

At 2:00 we plan to run fiber from our laser module (in rack 1Y1) to our 1x16 optical splitter (in the OMC_North rack) and measure the power output at one of the splitter's output ports. We plan to keep the output power limited to less than 0.5 mW per optical splitter output.

  8863   Wed Jul 17 16:15:42 2013 Alex ColeConfigurationElectronicsAS Table Additions

[Eric, Alex]

We decided that the POY Table would be a better home for our REF DET (Newport 1611 FC-AC) than the AS Table. We moved the PD to the POY Table (1st attachment) and routed a fiber from our 1x16 Optical Splitter in the OMC_North rack to the POY Table. REF DET's power supply is now located under the POY table (2nd attachment). We left the fiber described in the previous post on the AS Table.

Afterwards, we hooked a fiber up to our laser module to test it (3rd attachment). The laser was not being distributed, just going to one fiber with a power meter at its end. Everything turns out, but we realized we need to read the power supply's manual before continuing. 

 

 

  8873   Thu Jul 18 19:09:08 2013 gautamConfigurationendtable upgradeQPD Calibration for PZT Calibration

Summary 

I have been working on setting up a QPD which can eventually be used to calibrate the PZT, and also orient the PZT in the mount such that the pitch and yaw axes roughly coincide with the vertical and horizontal.

The calibration constants have been determined to be:

X-axis: -3.69 V/mm

Y-axis: -3.70V/mm

Methodology:

I initially tried using the QPD setup left behind by Chloe near MC2, but this turned out to be dysfunctional. On opening out the QPD, I found that the internal circuitry had some issues (shorts in the wrong places etc.) Fortunately, Steve was able to hand me another working unit. For future reference, there are a bunch of old QPDs which I assume are functional in the cabinet marked 'Old PDs' along the Y-arm. 

I then made a circuit with which to read out the X and Y coordinates from the QPD. This consists of 4 buffer amplifiers (one for each quadrant), and 3 summing amplifiers (outputs are A+B+C+D = sum, B+C-A-D = Y-coordinate, and A+B-C-D = X-coordinate) that take the appropriate linear combinations of the 4 quadrants to output a voltage that may be calibrated against displacement of the QPD. 

The output from the QPD is via a sub-D connector on the side of the pomona box enclosing the PD and the circuitry, with 7 pins- 3 for power lines, and 4 for the 4 quadrants of the QPD. It was a little tricky to figure the pin-out for this connector, as there was no way to use continuity checking to map the pins to quadrants. Therefore, I used a laser pointer, and some trial and error (i.e. shine the light on a given quadrant, and check the sign of the X and Y voltages on an oscilloscope) to map the pin outs. Steve tells me that these QPDs were made long before colour code standardisation, but I note here the pin outs in any case for future reference (the quadrant orientations are w.r.t the QPD held with all the circuitry above it, with the active surface facing me):

Red= +Vcc

Black= -Vcc

Green = GND

Blue = Upper Left Quadrant

White = Upper Right Quadrant

Purple = Lower Left Quadrant

Grey = Lower Right Quadrant

Chloe had noted that there was some issue with the voltage regulators on her circuit (overheating) but I suspect this may have been due to the faulty internal circuitry. Also, she had used 12 V regulators. I checked the datasheet of the QPD, Op-Amp LF347 (inside the pomona box) and the OP27s on my circuit, and found that they all had absolute maximum ratings above 18V, so I used 15V voltage regulators. The overheating problem was not a problem anymore.

I then proceeded to arrange a set up for the calibration (initially on the optical bench next to MC2, but now relocated to the SP table, and a cart adjacent to it). It consists of the following:

  • He-Ne laser source
  • Y2 2-inch mirror (AR and HR coated for 532nm) glued onto the PZT and mounted on a machined Newport U100P  - see this elog for details.
  • QPD mounted on a translational stage whose micrometers are calibrated in tenths of an inch (in the plots I have scaled this to mm)
  • A neutral density filter (ND = 2.0) which I added so that the QPD amplifier output did not saturate. I considered using a lens as well to reduce the spot size on the QPD but found that after adding the ND filter, it was reasonably small.
  • High-voltage power supply (on cart)
  • Two SR power supplies (for the PZT driver board and my QPD amplifier
  • SR function generator
  • Laser power source
  • Two oscilloscopes
  • Breadboard holding my QPD amplifier circuit

Having set everything up and having done the coarse alignment using the mirror mount, I proceeded to calibrate the X and Y axes of the QPD using the translational stage. The steps I followed were:

  • Centre spot on QPD using coarse adjustment on the mirror mount: I gauged this by monitoring the X and Y voltage outputs on an oscilloscope, and adjusted things till both these went to zero.
  • Used the tilt knob on the translational stage to roughly decouple the X and Y motion of the QPD.
  • Kept Y-coordinate fixed, took the X-coordinate to close to its maximum value (I gauged this by checking where the voltage stopped changing appreciably for changes in the QPD position.
  • Using this as a starting point, I moved the QPD through its X range, noting voltage output of the X-coordinate (and also the Y) on an oscilloscope.
  • Repeated the procedure for the Y-coordinate.
  • Analysis follows largely what was done in these elogs. I am attaching the script I used to fit an error function to the datapoints, this is something MATLAB should seriously include in cftool (note that it is VERY sensitive to the initial guess. I had to do quite a bit of guessing).

The plots are attached, from which the calibration values cited above are deduced. The linear fits for the orthogonal axis were done using cftool. There is some residual coupling between the X and Y motions of the QPD, but I think this os okay my purposes. 

My next step would be to first tweak the orientation of the PZT in the mount while applying a small excitation to it in order to decouple the pitch and yaw motion as best as possible. Once this is done, I can go ahead and calibrate the angular motion of the PZT in mrad/V.

 

                                                            X-Axis                                                                                                                                Y-axis                                                

QPD-XCalib.pdf  QPD-YCalib.pdf

 

 

  8874   Thu Jul 18 20:20:52 2013 gautamConfigurationendtable upgradeFirst mirror glued to PZT and mounted in modified mounts

 

 Yesterday, I mounted the first PZT in one of the modified mounts, and then glued a 2-inch Y2 mirror on it using superglue.

Details:

-The mirror is a 2-inch, Y2 mirror with HR and AR coatings for 532 nm light.

-The AR side of the mirror had someone's fingerprint on it, which I removed (under Manasa's guidance) using tweezers wrapped in lens cleaning paper, and methanol.

-Before gluing the mirror, I had to assemble the modified mount. Manasa handed over the remaining parts of the mounts (which are now in my newly acquired tupperware box along with all the other Piezo-related hardware). I took the one labelled A, and assembled the holder part. I then used one of the new mounts (2.5 inches, these are with the clean mounts in a cardboard box in the cupboard holding the green optics along the Y-arm) and mounted the holder on it. 

-Having assembled the mount, I inserted the piezo tip-tilt into the holder. The wedge that the machine shop supplied is useful (indeed required) for this. 

-I then cleaned the AR surface of the mirror and the top-surface of the tip-tilt. 

-The gluing was done using superglue which Steve got from the bookstore (the remaining tube is in the small fridge). We may glue the other mirror using epoxy. I placed 4 small drops of superglue on the tip-tilt's top surface, placed the mirror with its AR face in contact with the piezo, and applied some pressure for a short while until the glue spread out fairly evenly. I then left the whole setup to dry for about half an hour.

-Steve suggested using a reference piece (I used two small bolts) to verify when the glue had dried.

-Finally, I attached the whole assembly to a base.

Here it is in action in my calibration setup (note that it has not been oriented yet. i.e. the two perpendicular axes of the piezo are for the time being arbitrarily oriented. And maybe the spreading of the glue wasn't that even after all...):

Piezo-mirror.jpg

 

Sidenote:

Yesterday, while setting stuff up, I tested the piezo with a 0.05 Hz, 10Vpp input from the SR function generator just to see if it works, and also to verify that I had set up all my electronics correctly. Though the QPD was at this point calibrated, I did observe periodic motion of both the X and Y outputs of my QPD amp! Next step- calibration... 

  8875   Thu Jul 18 21:12:58 2013 gautamConfigurationendtable upgradeAI Board-D000186-All channels modified

 

 I carried some further modifications and tests to the AI Board. Details and observations here:

  • I switched out the resistors for all the remaining 7 channels, using the same substitutions as detailed here
  • I then verified that the modified transfer function for all 8 channels using the SR785. I did not collect data for all the channels as netgpib was taking ages, but I did use the cursor on the screen to verify the position of the first notch at ~64 kHz. I noticed that all the channels did not have the lowest point of the notch at the same frequency. Rather, (at least on the screen), this varied between 63kHz and 67kHz. I would put this down to component tolerance. Assuming 5% tolerance shifts the theoretical notch frequency from 66268 Hz to 63112 Hz. 
  • After verifying the transfer functions, I went to 1Y4 and plugged the AI board into the eurocrate. I then connected the input of the AI board to the DAC output using my custom ribbon cable. Next, I used the excitation points set up earlier to send a 1 kHz, 32000 counts amplitude sine wave through the channels one at a time. I monitored the output using an oscilloscope and the LEMO monitor channels on the front panel of the board.
  • I found that the single-ended output of the AI board swings between -10 V and 10 V (w.r.t ground, oscilloscope trace attached). This is good because this is the range of input voltage to the PZT driver boards required to realize the full actuation range of the PZTs.
  • I also verified that the connections on the custom ribbon cable are correct (channel map was right) and that there were no accidental shorts (I checked other channels' output monitor while driving one channel). 

I think the board is okay to be used now.

AI_Board_Output.jpg

 

  8877   Thu Jul 18 23:34:40 2013 gautamConfigurationendtable upgradeCoarse adjustment of PZT axes orientation in mount

 I have managed to orient the PZT in the mount such that its axes are approximately aligned with the vertical and the horizontal. 

In the process, I discovered that the 4 screws on the back face of the PZT correspond to the location of the piezoelectric stacks beneath the tip-tilt platform. The PZT can therefore be oriented during the mounting process itself, before the mirror is glued onto the tip-tilt platform.

In order to verify that the pitch and yaw motion of the mirror have indeed been roughly decoupled, I centred the spot on the QPD, fed to the 'pitch' input of the PZT driver board (connected to channel 1 of the PZT) a 10 Vpp, 1 Hz sine wave from the SR function generator (having turned all the other relevant electronics, HV power supply etc ON. The oscilloscope trace of the output observed on the QPD is shown. The residual fluctuation in the Y-coordinate (blue trace) is I believe due to the tilt in the QPD, and also due to the fact that the PZT isnt perfectly oriented in the mount.

It looks like moving the tip-tilt through its full range of motion takes us outside the linear regime of the QPD calibration. I may have to rethink the calibration setup to keep the spot on the QPD in the linear range if the full range is to be calibrated, possibly decrease the distance between the mirror and the QPD. Also, in the current orientation, CH1 on the PZT controls YAW motion, while CH2 controls pitch.

Oscilloscope Trace:

Yellow: X-coordinate

Blue: Y-coordinate

PZT_out_waveform.jpg

  8883   Fri Jul 19 22:51:40 2013 gautamConfigurationendtable upgradeSecond mirror glued to PZT and mounted

 

I mounted the second PZT in a modified mount, and then glued a 1-inch Y2 mirror on it using superglue.

 Details:

-The mirror is a Laseroptik 1-inch, Y2 mirror with HR and AR coatings for 532 nm light.

-The procedure for mounting the mirror was the same as detailed in elog 8874. This time, I tried to orient the Piezo such that the four screws on the back face coincided with the horizontal and vertical axes, as this appeared to (somewhat) decouple the pitch and yaw motion of the tip-tilt on the first PZT.

-One thing I forgot to mention in the earlier elog: it is best to assemble the mount fully before inserting the tip-tilt into it and gluing the mirror to the tip-tilt. In particular, the stand should be screwed onto the mount before inserting the tip-tilt into the holder, as once it is in, it will block the hole through which one can screw the stand onto the mount. 

-I have placed the mirror on the SP table along with the rest of my QPD/Piezo calibration setup. I will attempt to calibrate this second PZT once I am done with the first one. 
 
Here is an image of the assembly:
Piezo-mirror_2.JPG

 

 

 

 

 

 

 

  8884   Fri Jul 19 23:35:31 2013 gautamConfigurationendtable upgradePreliminary Calibration of PZT

 I recalibrated the QPD today as I had shifted its position a little. I then identified the linear range of the QPD and performed a preliminary calibration of the Piezo tip-tilt within this range.

 


Details:

-I recalibrated the QPD as I had shifted it around a little in order to see if I could move it to a position such that I could get the full dynamic range of the piezo tilt within the linear regime of the QPD. This proved difficult because there are two reflections from the mirror (seeing as it is AR coated for 532nm and I am using a red laser). At a larger separation, these diverge and the stray spot does not bother me. But it does become a problem when I move the QPD closer to the mirror (in an effort to cut down the range in which the spot on the QPD moves). In any case, I had moved the QPD till it was practically touching the mirror, and even then, could not get the spot motion over the full range of the PZTs motion to stay within the QPD's linear regime (as verified by applying a 20Vpp 1Hz sine wave to the PZT driver board and looking at the X and Y outputs from the QPD amplifier. 

-So I reverted to a configuration in which the QPD was ~40cm away from the mirror (measured using a measuring tape).

-The new calibration constants are as follows (see attached plots):

X-Coordinate: -3.43 V/mm
Y-Coordinate: -3.41 V/mm


-I then determined the linear range of the QPD to be when the output was in the range [-0.5V 0.5V]. 

-Next, at Jenne's suggestion, I decided to do a preliminary calibration of the PZT within this linear range. I used an SR function generator to supply an input voltage to the PZT driver board's input (connected to Channel 1 of the piezo). In order to supply a DC voltage, I set a DC offset, and set the signal amplitude to 0V. I then noted the X and Y-coordinate outputs, being sure to run through the input voltages in a cyclic fashion as one would expect some hysteresis. 

-I did this for both the pitch and yaw inputs, but have only superficially analysed the latter case (I will put up results for the former later). 

 


Comments:

-There is indeed some hysteresis, though the tilt seems to vary linearly with the input voltage. I have not yet included a calibration constant as I wish to perform this calibration over the entire dynamic range of the PZT. 

 

-There is some residual coupling between the pitch and yaw motion of the tip tilt, possibly due to its imperfect orientation in the holder (I have yet to account for the QPD's tilt).

 

-I have not included a graphical representation here, but there is significantly more pitch to yaw coupling when my input signal is applied to the tip-tilts pitch input (Channel 2), as compared to when it is input to channel 1. It is not clear to me why this is so.

 

-I have to think of some smart way of calibrating the PZT over its entire range of motion, keeping the spot in the QPD's linear regime throughout. One idea is to start at one extreme (say with input voltage -10V), and then perform the calibration, re-centering the spot to 0 on the QPD each time the QPD amp output reaches the end of its linear regime. I am not sure if this will work, but it is worth a shot. The other option is to replace the red laser with a green laser (from one of the laser pointers) in the hope that multiple reflections will be avoided from the mirror. Then I will have to recalibrate the set up, and see if I can get the QPD close enough to the mirror such that the spot stays within the linear regime of the QPD. More investigation needs to be done.


Plots:

QPD Calibration Plots:
QPD-XCalib.pdf            QPD-YCalib.pdf

 

 

Piezo tilt vs input voltage plots:

 

                                                          Yaw Tilt                                                                                                                                         Pitch Tilt

Piezo_Yaw_Calib-in_QPD_linear_range-Yaw_tilt.pdf               Piezo_Yaw_Calib-in_QPD_linear_range-Pitch_tilt.pdf 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

  8912   Tue Jul 23 20:41:40 2013 gautamConfigurationendtable upgradeFull range calibration and installation of PZT-mounted mirrors

 Given that the green beam is to be used as the reference during the vent, it was decided to first test the PZT mounted mirrors at the X-endtable rather than the Y-endtable as originally planned. Yesterday, I prepared a second PZT mounted mirror, completed the full range calibration, and with Manasa, installed the mirrors on the X-endtable as mentioned in this elog. The calibration constants have been determined to be (see attached plots for aproximate range of actuation):

M1-pitch: 0.1106 mrad/V

M1-yaw: 0.143 mrad/V

M2-pitch: 0.197 mrad/V

M2-yaw: 0.27 mrad/V


Second 2-inch mirror glued to tip-tilt and mounted:

  • The spot sizes on the steering mirrors at the X-end are fairly large, and so two 2-inch steering mirrors were required.
  • The mirrors already glued to the PZTs were a CVI 2-inch and a Laseroptik 1-inch mirror.
  • I prepared another Laseroptik 2-inch mirror (45 degree with HR and AR coatings for 532 nm) and glued it to a PZT mounted in a modified mount as before.
  • Another important point regarding mounting the PZTs: there are two perforated rings (see attached picture) that run around the PZT about 1cm below the surface on which the mirror is to be glued. The PZT has to be pushed in through the mount till these are clear of the mount, or the actuation will not be as desired. In the first CVI 2-inch mirror, this was not the the case, which probably explains the unexpectedly large pitch-yaw coupling that was observed during the calibration [Thanks Manasa for pointing this out]. 

Full range calibration of PZT:

Having prepared the two steering mirrors, I calibrated them for the full range of input voltages, to get a rough idea of whether the tilt varied linearly and also the range of actuation. 

Methodology:

  • The QPD setup described in my previous elogs was used for this calibration. 
  • The linear range of the QPD was gauged to be while the output voltage lay between -0.5V and 0.5V. The calibration constants are as determined during the QPD calibration, details of which are here.
  • In order to keep the spot always in the linear range of the QPD, I stared with an input signal of -10V or +10V (ie. one extreme), and moved both the X and Y micrometers on the translational stage till both these coordinates were at one end of the linear range (i.e -0.5V or 0.5V). I then increased the input voltage in steps of ~1V through the full range from -10V to +10V DC. The signal was applied using a SR function generator with the signal amplitude kept to 0, and a DC offset in the range -5V to 5V DC, which gave the desired input voltages to the PZT driver board (between -10V DC and 10V DC).
  • When the output of the QPD amp reached the end of the linear regime (i.e 0.5V or -0.5V), I moved the appropriate micrometer dial on the translational stage to take it to the other end of the linear range, before continuing with the measurements. The distance moved was noted. 
  • Both the X and Y coordinates were noted in order to investigate pitch-yaw coupling.

Analysis and remarks:

  • The results of the calibration are presented in the plots below. 
  • Though the measurement technique was crude (and maybe flawed because of a possible z-displacement while moving the translational stage), the calibration was meant to be rough, and I think the results obtained are satisfactory. 
  • Fitting the data linearly is only an approximation, as there is evidence of hysteresis. Also, PZTs appear to have some drift, though I have not been able to quantify this (I did observe that the output of the QPD amp shifted by an amount equal to ~0.05mm while I left the setup standing for an hour or so).  
  • The range of actuation seems to be different for the two PZTs, and also for each degree of freedom, though the measured data is consistent with the minimum range given in the datasheet (3.5 mrad for input voltages in the range -20V to 120V DC). 

 

PZT Calibration Plots

The circles are datapoints for the degree of freedom to which the input is applied, while the 'x's are for the other degree of freedom. Different colours correspond to data measured with the position of the translational stage at some value.

                                            M1 Pitch                                                                                             M1 Yaw

M1_Pitch_calib.pdf     M1_Yaw_calib.pdf

 

                                              M2 Pitch                                                                                        M2 Yaw 

M2_Pitch_calib.pdf     M2_Yaw_calib.pdf

 



Installation of the mirrors at the X-endtable:

The calibrated mirrors were taken to the X-endtable for installation. The steering mirrors in place were swapped out for the PZT mounted pair. Manasa managed (after considerable tweaking) to mode-match the green beam to the cavity with the new steering mirror configuration. In order to fine tune the alignment, Koji moved ITMx and ETMx in pitch and yaw so as to maximise green TRX. We then got an idea of which way the input pointing had to be moved in order to maximise the green transmission.

 

  8932   Mon Jul 29 13:39:25 2013 gautamConfigurationendtable upgradePZT Driver Board-further changes

 

 

I have updated the schematic of the D980323 PZT driver boards to reflect the changes made. The following changes were made (highlighted in red on the schematic):

  • Gain of all four HV amplifier stages changed from ~15 to ~5 by swapping 158k resistors R43, R44, R69 and R70 for 51k resistors.
  • Electrolytic 10 uF capacitors C11, C12, C29 and C31 swapped for 470pF, 500V mica capacitors.
  • Fixed resistor in voltage divider (R35, R40, R59 and R64) replaced with 0 ohm resistors so as to be able to apply a bias of -10V to the HV amplifier
  • The DC-DC Series components, which I think were originally meant to provide the 100V DC voltage, have been removed.
  • The path between the point at which +100V DC is delivered and jumpers J3 and J6 has been shorted (bypassing R71 and R11 for J3, R73 and R12 for J6).
  • Tantalum capacitors C38 and C39 have been replaced with electrolytic capacitors (47 uF, 25V). One of the original tantalum capacitors had burned out when I tried installing the board in the eurocrate, shorting out -15V to ground. At Koji's suggestion, I made this switch. The AD797s do not seem to be oscillating after the switch.


I have also changed the routing of the 100V from the HV power supply onto the board, it is now done using an SMA T-connector and two short lengths of RG58 cable with SMA connectors crimped on.

The boards are functional (output swings between 0 and 100V as verified with a multimeter for input voltages in the range -10V to +10V applied using a function generator.

 



Revised schematics:

D980323-C-modified.pdf

D980323-C-modified-pg2.pdf

 

 

 

  8935   Mon Jul 29 21:57:45 2013 gautamConfigurationendtable upgradeHardware installed at 1X9

 The following hardware has been installed on rack 1X9;

  • KEPCO high voltage power supply (kept in a plastic box at the bottom of the rack, with the 3m SMA cable carrying 100V running along the inside side wall of the rack). The HV supply has not been connected to the driver board yet.
  • AI board D000186 installed in top eurocrate. The board does not seem to fit snugly into the slot, so I used a longish screw to bolt the front panel to the eurocrate.
  • PZT driver board D980323 installed in top eurocrate adjacent to the AI board.
  • Six 11m SMB-LEMO cables have been laid out from 1X9 to the endtable. I have connected these to the PZT driver board, but the other end (to the PZTs) is left unconnected for now. They have been routed through the top of the rack, and along the cable tray to the endtable. All the cables have been labelled at both ends. 


I have also verified that the AI board is functional in the eurocrate by using the LEMO monitoring points on the front panel.


The driver boards remain to be verified, but this cannot be done until we connect the HV supply to the board. 

 

 

  8942   Tue Jul 30 19:40:47 2013 gautamConfigurationendtable upgradeDAC-PZT Driver Board Output Signal Chain Tested

 

 [Alex, Gautam]

The signal chain from the DAC output to the output of the PZT driver board (including the HV supply) has been verified. 

I had installed the two boards in the eurocrate yesterday and laid out the cables from 1X9 to the endtable. The output of the AI board had been verified using the monitor port on the front panel, but the output from the PZT driver board was yet to be checked because I had not connected the HV supply yesterday.

When I tried this initially today, I was not getting the expected output from the monitor channels on the front panel of the PZT driver board, even though the board was verified to be working. Alex helped debug the problem, which was identified as the -15V supply voltage not making it onto the board.

I changed the slot the board was sitting in, and used a long screw to bolt the board to the crate. Both the AI board and the PZT driver board seem to be slightly odd-sized, and hence, will not work unless firmly pushed into the eurocrate and bolted down. This would be the first thing to check if a problem is detected with this system. 

In any case, I have bolted both boards to the eurocrate, and the output from the PZT driver board is as expected when I sent a 10Vp sine wave out from the DAC. I think the cables can now be hooked up to the PZTs once we are pumped down.

  8943   Tue Jul 30 19:44:05 2013 gautamConfigurationendtable upgradeSecond mirror glued to PZT and mounted

 

 I have glued a fourth mirror to a PZT (using superglue) and inserted it into a modified mount. This is to be used together with the 1-inch Laseroptik mirror I had glued a couple of weeks back at the Y-endtable. I will be calibrating both these mirrors tonight such that these are ready to put in as soon as we are pumped down.

The mirror was one of those removed from the X-endtable during the switch of the steering mirrors. It is a CVI 2-inch mirror, with HR and AR coatings for 532 nm. 

  8967   Mon Aug 5 18:48:44 2013 gautamConfigurationendtable upgradeFull range calibration of PZT mounted mirrors for Y-endtable

 I had prepared two more PZT mounted mirrors for the Y-end some time back. These are:

  • A 2-inch CVI mirror (45 degree, HR and AR for 532nm, was originally one of the steering mirrors at the X-endtable, and was removed while switching those out for the PZT mounted mirrrors).
  • A 1-inch Laseroptik mirror (45 degree, HR and AR for 532nm).

I used the same QPD set-up and the methodology described here to do a full-range calibration of these PZTs. Plots attached. The calibration constants have been determined to be:

CVI-pitch: 0.316 mrad/V

CVI-yaw:  0.4018 mrad/V

Laseroptik pitch: 0.2447 mrad/V

Laseroptik yaw:  0.2822 mrad/V

Remarks:

  • These PZTs, like their X-end counterparts, showed evidence of drift and hysteresis. We just have to deal with this.
  • One of the PZTs (the one on which the CVI mirror is mounted) is a used one. While testing it, I thought that its behaviour was a little anomalous, but the plots do not seem to suggest that anything is amiss.

Plots:

                                                        CVI YAW                                                                                                                         CVI PITCH

2-inch-CVI-Yawcalib.pdf      2-inch-CVI-Pitchcalib.pdf

                                                        Laseroptik YAW                                                                                                             Laseroptik PITCH

1-inch-Laseroptik-Yawcalib.pdf   1-inch-Laseroptik-Pitchcalib.pdf

 

  8971   Tue Aug 6 12:43:23 2013 Alex ColeConfigurationElectronicsAS Table and Rack 1Y1 Additions

For the photodetector frequency response project, I finished the construction of our baluns chassis and mounted it in rack 1Y1 (1st picture).

After consulting with Jenne, I mounted the fiber launcher for REFL165 on the AS table such that it would not cause an obstruction. I aligned the launcher using a multimeter to monitor the DC output of REFL165, but looking at the data I got, it seems I need to do a better alignment/focusing job to get rid of a bunch of noise.

  8979   Wed Aug 7 15:51:53 2013 Alex ColeConfigurationElectronicsRF Switch Change

For the photodetector frequency response project, our new RF Switch Chassis (NI pxie-1071) arrived today. I took the switches out of the old chassis (Note for future generations: you have to yank pretty darn hard) and put them in the new chassis, which I mounted in rack 1Y1 as pictured. 

The point of this new chassis is that its controller is compatible with our control room computer setup. We will be able to switch the chassis using TCP/IP or telnet, aiding in our automation of the measurement of photodetector frequency response.

  9006   Tue Aug 13 13:30:41 2013 Alex ColeConfigurationElectronicsCable Routing

 I routed cables (RG405 SMA-SMA) from several demodulator boards in rack 1Y2 to the RF Switch in rack 1Y1 using the overhead track. Our switch chassis contains two 8x1 switches. The COM of the "right" switch goes to channel 7 of the "left" switch to effectively form a 16x1 switch. The following is a table of correspondences between PD and RF Switch input.

 

PD Left/Right Switch Channel Number
REFL11

R

0
POX11 L 0
AS55 R 1
REFL55 R 7
POP22 R 6
REFL165 R 5
REFL33 L 7

 

ThePOP110 demod board has not yet had a cable routed from it to the switch because I ran out of RG405.

We should also consider how important it is to include MCREFL in our setup. Doing so would require fabrication of a ~70 ft RG405 cable. 

  9062   Mon Aug 26 18:55:18 2013 JenneConfigurationElectronicsputting together a 110 MHz LSC demod board for AS

I have modified one of the spare demod boards that was sitting above the electronics bench (the one which was unlabeled - the others say 33MHz, 55MHz and 165MHz) to be the new AS110 demod board.  In place of the T1 coil, and the C3 and C6 resistors, I have put the commercial splitter PSCQ-2-120+.  In place of U5 (the low pass for the PD input) I have put an SCLF-135+. 

In order to figure out how to make the pinout of the PSCQ match up with the available pads from T1, I first pulled the "AS11" board (it's not something that we use, so it would be less of a tragedy if something happened while I had the board pulled).  However, while the PCB layout is the same, the splitter for the low frequencies (PSCQ-2-51W) has a different pinout than the one I need for the 110MHz.  So, I put AS11 back, and pulled the POP110 board. (After I noted the pinout on POP110, I reinstalled that board.  To get it out, I had to unplug the I and Q outs of POP22, but I have also replugged those in).

For my new AS110 demod board, I copied the pin connections on POP110.  I have made a little diagram, so you can see what pins went where.  The top 2 rectangles are the "before" installation cartoon, and the bottom is the "as installed" cartoon.

AS110_demod_board_modifications.pdf

The one thing that must be noted is that, because of the pinout of the splitter and the constraints of the board layout, the +0 degrees (I-phase) output of the splitter is connected to the Q channel for the rest of the demod board.  This means that the +90 degrees (Q-phase) output of the splitter is connected to the I channel for the rest of the demod board.  This is not noted for POP110, but is true for both:  The I and Q channels of the 110 MHz demod boards are switched.  In practice, we can handle this with our digital phase rotation.

Daytime tomorrow, I will test my new board as Suresh did in elog 4736.  Before we get to use AS110, we need (a) some LO juice from the RF distribution box, and (b) a spot to plug the board in, in the LSC rack.  Meditating on how those are going to happen are also tasks for daytime tomorrow.

  9067   Mon Aug 26 20:13:17 2013 ranaConfigurationElectronicsputting together a 110 MHz LSC demod board for AS

Quote:

I have modified one of the spare demod boards that was sitting above the electronics bench (the one which was unlabeled - the others say 33MHz, 55MHz and 165MHz) to be the new AS110 demod board.  In place of the T1 coil, and the C3 and C6 resistors, I have put the commercial splitter PSCQ-2-120+.  In place of U5 (the low pass for the PD input) I have put an SCLF-135+.

OK, but what kind of filter should we be actually using? i.e. what purpose the 135 MHz low pass serve in contrast to a PHP-100+ ?

  9069   Tue Aug 27 15:31:48 2013 JenneConfigurationElectronicsputting together a 110 MHz LSC demod board for AS

Quote:

Quote:

I have modified one of the spare demod boards that was sitting above the electronics bench (the one which was unlabeled - the others say 33MHz, 55MHz and 165MHz) to be the new AS110 demod board.  In place of the T1 coil, and the C3 and C6 resistors, I have put the commercial splitter PSCQ-2-120+.  In place of U5 (the low pass for the PD input) I have put an SCLF-135+.

OK, but what kind of filter should we be actually using? i.e. what purpose the 135 MHz low pass serve in contrast to a PHP-100+ ?

 Hmmm. Indeed. This is just cutting off higher frequency stuff, but anything from other lower sidebands still gets through.  I should actually stick in the SXBP-100's, which will band pass from 87-117 MHz.  These have an insertion loss at 100 MHz of 1.64 dB. 

Jamie ordered 2 of these, so I can put one in each of AS110 and POP110. 

  9071   Tue Aug 27 17:32:52 2013 JenneConfigurationElectronicsputting together a 110 MHz LSC demod board for AS

I measured the phase split between the I and Q signals of my AS110 board.  To do so, I plugged the board into an empty slot next to the PD DC readout / whitening board in the LSC rack.  I borrowed the POP110 local oscillator, and used a Marconi to generate a "PD input".  (I'm roughly following what Suresh did in elog 4736).  Our 11MHz is currently 11.066134MHz, so I had the Marconi going at 110.662340 MHz (1kHz from 10*11MHz), and I had the Marconi source at -13dBm.  

I took a transfer function using the SR785 between the I and Q outs of the AS110 demod board, and got a magnitude misbalance of 0.809 dB, and a phase split of 110.5 degrees.  This isn't so close to 90 degrees, but this may be a problem with the splitter that we're using, as Suresh detailed in elog 4755.  In that elog, he measured a phase split of POP110 of 105 degrees, unless the power going into the splitter was pretty high.  As with POP110, since I expect that we'll usually only look at one channel (I, for instance), this isn't such a big deal for AS110. 

I have left, for now, the board in the empty slot.  It looks like (I'm going to go check) there are 3 open channels on the whitening board that has the PD DC signals.  So, the only thing left to figure out is how we want to get some local oscillator action for this new board.

EDIT: Yes, those channels are available.  Right now (as a remnant from testing the whitening filters waaaay back in the day) they are called C1:LSC-PDXXX I, Q, DC.  I'll use 2 of those for the AS110 I and Q. 

  9072   Tue Aug 27 18:21:35 2013 JenneConfigurationElectronics110 MHz LO options

As I see it, we have a few options for getting the 110 MHz LO to both the POP110 and AS110 demod boards.  

The current situation is described by Kiwamu in elog 5746.  The 55 MHz signal comes into the box, and is split 4 ways, with each path having 19.7 dBm.  One of these 4 is for 110.  It has a 2dB attenuator (giving us ~17.7 dBm), and then it goes to an MK-2 frequency multiplier.  I'm a little lost on why we're giving the MK-2 17 dBm, since it says that it can handle an input power between 1 - 15 dBm.  It has ~16 dB conversion loss, so the 110 output of the distribution board has (according to the drawing) 1.9 dBm.  The demod boards have a 10 dB attenuator as the first element on the LO path, so we're giving the ERA-5 -8 dBm. 

We can either amplify the 110 leaving the distribution box, split it, and then attenuate it to the appropriate level for the demod boards, or we can change the attenuators on the POP110 and AS110 demod boards. 

Since we seem to be over driving the 2x frequency multiplier, I think I should change the 2dB attenuator to a 5dB attenuator, so we're giving the 2x multiplier ~15 dBm.  The conversion loss of ~16 dB means we'll have -1 dBm of 110 MHz.  I want to amplify that by ~10 dB, to give 9 dBm.  Attenuate by 5 dB to get to 4 dBm, then split into 2, giving me 2 110 MHz spigots, each of ~1 dBm.  Since the demod boards expect between 0-2 dBm for the LO's, this should be just fine.

Thoughts, before I start scrounging parts, and pulling the RF distribution box?

  9073   Tue Aug 27 18:58:52 2013 KojiConfigurationElectronics110 MHz LO options

- Do we have an appropriate amplifier?

- True challenge could be to find a feedthrough for the new port. (or to find a space for the amplifier in the box)

- PDXXX channels is on the DC whitening filter module. There could be some modification on this module (like diabling the whitening gain selector).

- We don't have AS11 and AS165, and so far it is unlikely to use AS11. i.e. The feedthrough, the slot on the crate, the whitening, and the channels can be trasnsition from 11 to 110.

Quote:

I want to amplify that by ~10 dB, to give 9 dBm.  Attenuate by 5 dB to get to 4 dBm, then split into 2, giving me 2 110 MHz spigots, each of ~1 dBm. 

Thoughts, before I start scrounging parts, and pulling the RF distribution box?

 

  9074   Tue Aug 27 19:34:36 2013 JamieConfigurationCDSfront end IPC configuration

So the IPC situation on the front end network is not so great right now.  For various no-longer-valid reasons, c1lsc had no RFM card, all the IPC connections were routed through the c1rfm model on c1sus, and routed to c1lsc via dolphin PCIe as needed.  As things grew, c1rfm became overloaded.  Koji tried to fix the situation by breaking things out of c1rfm to make direct connections where we could.  This cleared up c1rfm a bit, but not c1mcs is overloading.

Reminder: PCIe (dolphin) is faster and higher bandwidth than RFM.  The more things we can put on PCIe the better.

Attached is a graph of my rough accounting of the intended direct IPC connections between the front ends.  By "intended direct" I mean what should be direct connections if we had all the appropriate hardware.  Right now the actual connection graph is more convoluted than this since things are passing through c1rfm.  I note this graph was NOT particularly easy to make, which is very unfortunate.  I had to manually look through every model and determine the ultimate source of every incoming IPC.  Kind of a pain in the butt.  It would be nice if there was a simple way to represent this.

Here are some various solutions to the problem as I see it:

a) put c1lsc on the RFM network

This would allow c1lsc to talk to c1ioo, c1iscex, and c1iscey without having to go through c1sus, thereby eliminating c1rfm altogether.  I'm not sure why we didn't just do this originally.

Requires:

  • One RFM card for c1lsc

b) put c1ioo on the PCIe network (and move c1sus's RFM card to c1lsc)

This is probably the most robust solution.

b1) There are roughly 8 IPCs going from c1ioo to c1sus, and 4 going the other way, and 3 IPCs from c1ioo to c1lsc.  If we put c1ioo on PCIe all of these now RFM connections would become direct PCIe connections, which would be a big win.

At this point only the end station front ends would be on RFM, and most of the connections to those come from c1lsc, so it would make sense to give c1lsc the RFM card, thereby eliminating a lot of stuff from c1rfm.

Requires:

  • dolphin card for c1ioo (do the old sun machines support these?  if they don't we could swap the old sun machine with a new spare aLIGO-approved supermicro machines, which we have spares of)
  • dolphin fibre to go to dolphin switch in 1X3 rack

b2) OR, we could move c1ioo to 1X4 with c1lsc and c1sus, and get a OneStop fibre cable to connect to its IO chassis.  We would still need a dolphin card, but we could use coper instead of fibre.  This is my preferred solution, since it moves c1ioo out of 1X1, where it's really in the way and making a lot of noise.  It would also be easier to manage all the machines if they're together in one rack.

Requires:

  • dolphin card for c1ioo
  • dolphin coper cable for c1ioo
  • OneStop fibre for c1ioo

c) put another cpu in c1sus

c1sus is (I believe) able to support another 6-core cpu.  If we added more cores to c1sus, we could break up c1rfm into c1rfm0, c1rfm1, etc.  This is a less elegant solution imho, but it would probably do the job.

Requires:

  • one new CPU for c1sus
  9075   Tue Aug 27 19:50:06 2013 JamieConfigurationComputer Scripts / Programscdsutils checked out into /opt/rtcds

I have checked out the new cdsutils repository at:

/opt/rtcds/cdsutils/release

This is a new repository that is intended to hold all of our python libraries and command-line utilities for interacting with the IFO, things like:

  • get/write values EPICS channels
  • interact with filter module switches
  • average a test point for some amount of time
  • etc.

Basically everything that used to be ez* or tds*.

There's not much in there at the moment, but hopefully it will start to get filled in soon.

WARNING:

This code in here will be used by the sites to interact with the real aLIGO IFOs.  Please be careful as you develop things in here, and o so conscientiously.  If you do bad things here and it messes things up at the sites people will be angry.  Particularly me, since I have to support everything in here for Guardian use.

Usage

<cdsutils>/lib/cdsutils is the primary python library.  For each function you want to add, put it in a new file named after the function.  So for instance function "foo" should be in a file called <cdsutils>/lib/cdsutils/foo.py.

There is a command line utility at <cdsutils>/bin/cdsutils.  It will automatically find anything you add to the library and expose it as a sub command (e.g. "cdsutils foo")

We'll try to put together a wiki page describing development and usage of this soon.

  9076   Tue Aug 27 20:43:34 2013 KojiConfigurationCDSfront end IPC configuration

The reason we had the PCIe/RFM system was to test this mixed configuration in prior to the actual implementation at the sites.
Has this configuration been intesively tested at the site with practical configuration?

Quote:

Attached is a graph of my rough accounting of the intended direct IPC connections between the front ends. 

It's hard to believe that c1lsc -> c1sus only has 4 channels. We actuate ITMX/Y/BS/PRM/SRM for the length control.
In addition to these, we control the angles of ITMX/Y/BS/PRM (and SRM in future) via c1ass model on c1lsc.
So there should be at least 12 connections (and more as I ignored MCL).

I personally prefers to give the PCIe card to c1ioo and move the RFM card to c1lsc.
But in either cases, we want to quantitatively compare what the current configuration is (not omitting the bridging by c1rfm),
and what the future configuration will be including the addtional channels we want add in close future,

because RFM connections are really costly and moving the RFM card to c1lsc may newly cause the timeout of c1lsc
just instead of c1sus.

  9086   Wed Aug 28 19:47:28 2013 jamieConfigurationCDSfront end IPC configuration

Quote:

It's hard to believe that c1lsc -> c1sus only has 4 channels. We actuate ITMX/Y/BS/PRM/SRM for the length control.
In addition to these, we control the angles of ITMX/Y/BS/PRM (and SRM in future) via c1ass model on c1lsc.
So there should be at least 12 connections (and more as I ignored MCL).

Koji was correct that I missed some connections from c1lsc to c1sus.  I corrected the graph in the original post.

Also, I should have noted, that that graph doesn't actually include everything that we now have.  I left out all the simplant stuff, which adds extra connections between c1lsc and c1sus, mostly because the sus simplant is being run on c1lsc only because there was no space on c1sus.  That should be corrected, either by moving c1rfm to c1lsc, or by adding a new core to c1sus.

I also spoke to Rolf today and about the possibility of getting a OneStop fiber and dolphin card for c1ioo.  The dolphin card and cable we should be able to order no problem.  As for the OneStop, we might have to borrow a new fiber-supporting card from India, then send our current card to OneStop for fiber-supporting modifications.  It sounds kind of tricky.  I'll post more as I figure things out.

Rolf also said that in newer versions of the RCG, the RFM direct memory access (DMA) has improved in performance considerably, which reduces considerably the model run-time delay involved in using the RFM.  In other words, the long awaited RCG upgrade might alleviate some of our IPC woes.

We need to upgrade the RCG to the latest release (2.7)

  9087   Wed Aug 28 23:09:55 2013 jamieConfigurationCDScode to generate host IPC graph
ELOG V3.1.3-