we did a bunch of tests to figure out the feasibility of the plan I outlined last night. Bottom line is: we appear to have a working 64 channel ADC (but with differential receiving that means 32 channels). But we need an aLIGO ADC adaptor card (I'm not sure of the DCC number but I think it is D0902006). See attached screenshot where we managed to add an ADC block to the IOP model on c1lsc, and it recognizes the additional ADC. The firmware on the (newly installed) working card is much newer than that on the existing card inside the expansion chassis (see Attachment #1).
Note that we have left the working ADC card inside the c1lsc expansion chassis. Plan is to give Rolf the faulty ADC card and at the same time ask him for a working adapter board.
Unrelated to this work: we have also scavenged 4 pcs of v2 of the differential receiving AA board from WB EE shop, along with a 1U chassis for the same. These are under my desk at the 40m for the moment. We will need to re-stuff these with appropriate OpAmps (and also maybe change some Rs and Cs) to make this board the same as v6, which is the version currently in use.
Todd E. came by this morning and gave us (i) 1x new ADC card and (ii) 1x roll of 100m (2017 vintage) PCIe fiber. This afternoon, I replaced the old ADC card in the c1lsc expansion chassis, and have returned the old card to Todd. The PCIe fiber replacement is a more involved project (Steve is acquiring some protective tubing to route it from the FE in 1X6 to the expansion chassis in 1Y3), but hopefully the problem was the ADC card with red indicator light, and replacing it has solved the issue. CDS is back to what is now the nominal state (Attachment #1) and Yarm is locked for Jon to work on his IFOcoupling study. We will monitor the stability in the coming days.
(i) to replace the old generation ADC card in the expansion chassis which has a red indicator light always on and (ii) to replace the PCIe fiber (2010 make) running from the c1lsc front-end machine in 1X6 to the expansion chassis in 1Y3, as the manufacturer has suggested that pre-2012 versions of the fiber are prone to failure. We will do these opportunistically and see if there is any improvement in the situation.
Looks like the ADC was not to blame, same symptoms persist.
The PCIe fiber replacement is a more involved project (Steve is acquiring some protective tubing to route it from the FE in 1X6 to the expansion chassis in 1Y3), but hopefully the problem was the ADC card with red indicator light, and replacing it has solved the issue.
Gautam and I restarted the models on c1lsc, c1ioo, and c1sus. The LSC system is functioning again. We found that only restarting c1lsc as Rolf had recommended did actually kill the models running on the other two machines. We simply reverted the rebootC1LSC.sh script to its previous form, since that does work. I'll keep using that as required until the ongoing investigations find the source of the problem.
I shorted the inputs on three channels and the outputs on three channels of the Guralp box, and I did similar things with the accelerometers. I was going to move the instruments themselves back, but I didn't have time, so they are still in the box in the corner. If the setup could stay as-is for at least a few hours, that would be awesome.
Gautam and I measured the noise of the ADC for channels 17, 18, and 19. We plan to use those channels for measuring the noise of the temperature sensors, and we need to figure out whether or not we will need whitening and if so, how much. The figure below shows the actual measurements (red, green and blue lines), and a rough fit. I used Gautam's elog here and used the same function, (with units of nV/sqrt(Hz)) to fit our results. I used a = 1, b = 1e6, c = 2000. Since we are interested in measuring at lower frequencies, we must whiten the signal from the temperature sensors enough to have the ADC noise be negligible.
We want to be able to measure to accuracy at 1Hz, which translates to about current from the AD590 (because it gives ). Since we have a 10K resistor and V=IR, the voltage accuracy we want to measure will be . We would need whitening for lower frequencies to see such fluctuations.
To do the measurements, we put a BNC end cap on the channels we wanted to measure, then took measurements from 0-900Hz with a bandwidth of 0.001Hz. This setup is shown in the last two attachments. We used the ADC in 1X7.
I ceated a simple circuit that takes in 15V and outputs precisely 5V by using a 12V voltage regulator LM7812 and an AD586 that takes the output of the voltage regulator and outputs 5V (attachment 1). We plugged this into the slow channel and will leave it running for a few hours to see if we still have the fluctuations we observed earlier and also fit the noise curve. We'll also test the fast channel later as well. Attachment 2 shows the setup we have in the lab, with the red and white cable plugged into the +15V power supply and the red and black cable connected to the slow channel.
ADC noise is not a limiting noise source in a current ALS setup.
Below is the calibrated spectrum of C1:ALS-COARSE_I_ERR when
Y arm swinging with just damping (red; taken last night)
terminated before AA (green)
blocked PSL green beam (blue)
Blue and green curve tells us that noise from the beat PD to ADC is not contributing to the Y arm length sensing noise.
Yesterday I wired the outputs from the seismometers directly to the ADC input bypassing the old AA board circuit as is described in this elog. The old circuit converted the single-ended output from the seismometers to a differential signal. Today I looked at whether 60 Hz noise is worse going directly into the ADC due to the loss of the common mode rejection previously provided by the conversion to differential signals.
I split the output from the BS Z seismometer to the new board and to an SR785. On the SR785 I measured the difference between the inner and outer conductors of the seismometer output, i.e. A-B with A the center conductor and B the outer conductor, with grounded input. At the same time I took a DTT spectrum of C1:PEM-SEIS_BS_Z_IN1. Both spectra were taken with 1 Hz bandwidth and 25 averages. The setup is shown in attachment 1.
The spectra are shown in attachment 2. The DTT spectrum was converted from counts to volts by multiplying by 2 * 10 V/32768 cts where the extra factor of 2 is from converting from single-ended to differential input. If there was common 60 Hz noise that the ADC was picking up we would expect to see less noise at 60 Hz in the SR785 spectrum measured directly at the output from the seismometer since that was a differential measurement. Since both spectra have the same 60 Hz noise, this noise is differential.
As described in this elog, the ADC for the seismometers now has the signals wired directly to the ADC instead of going through an AA board or other circuit to remove any common mode noise. This elog describes one test of the common mode rejection of this setup. Guantanamo suggested comparing directly with a recent spectrum taken a few months before the new setup described in this elog.
Today I took a spectrum (attachment 1) of C1:PEM-MIC_2 (Ch17) and C1:PEM-MIC_3 (Ch18) with input to the ADC terminated with 50 Ohms. These are two of the channels plotted in the previous spectrum, though I don't know how that plot was normalized. It's clear that there are now strong 60 Hz harmonic peaks that were not there before, so this new setup does have worse common mode rejection.
connector J9B of hardware ADC --> ch1 in software ADC --> GCY_ERR
connector J14 of hardware ADC --> ch11 in software ADC --> GCY_PZT
connector J15 of hardware ADC --> ch13 in software ADC --> GCY_REFL_DC
Since the classification finally works (or seems to work..), I wrote triangulation scripts in Python which triangulate the signals, and a plotting script in Matlab which generates a heat map of seismic noise source locations. I switched the ADC Streckeisen and Trillium connections in order to better triangulate with the current channels, and will return them either tomorrow, or when I come back from Livingston so that we can have weekday data as well.
5x 16bit ADC adapter boards (D0902006) assembled.
ADC 3 INPUT 4 (#3 in the c1pem model if you count from 0) is bad. It adds DC = ~1 V to the signal as well as noise. I plugged in GUR2 channels to STS1 channels (7-9).
I have installed ACAD 2002 on one of the Windows machines in the Control Room. It is on the machine which has Solid Works (called C21530).
The installation files are in MyDocuments under Acad2002. This a shared LIGO license which Christian Cepada had with him.
I hope we will be able to open our optical layout diagrams with this and update them even though it is an old version.
The air cond was off for 2 hrs. I just switched it back on at 15:51
Koji, Manasa, Jenne, Jamie, Bob and Steve
Access connector removed this morning and work has began in the IOO chamber. BE WARE OF ANTS !
Manasa, Eric, Evan, Koji and Steve,
Access connector removed in order to complete alignment. Light aluminum with acetate windows AC installed.
Prior to the access connector removal, Manasa and I aligned the IFO mirrors.
The arms were locked and aligned by ASS.
ETMY sus damping was disabled. Green locking laser and associated electronics turned off. Computers and power supplies turned off at rack 1Y4
The electricians picking up ac power from 1Y4 manual disconnect box and installing conduit line to ISCT-ETMY east end optical table.
There will be no more daisy chaining this way.
The power is back on at ETMY . c1iscey has not been restarted.
Now I'm turning ac power off at ETMX for the same job to be done.
I was notified by CIT Utilities that there was a power surge or short power outage this after noon.
Lab conditions are normal: c1ioo is down. The south arm AC was off......I turned it back on.
CALIFORNIA INSTITUTE OF TECHNOLOGY
UTILITY & SERVICE INTERRUPTION
Date: Saturday, June 23, 2012
Time: 3:46 P.M.
Interruption: Electrical Power Disturbance
Contact: Tom Brennan, x-625-395-4984
*The City of Pasadena Water & Power Department had a 34,000-volt line event on Saturday June 23 at 3:46 p.m. This caused a city wide disturbance on the power grid. The Campus did not lose electrical power. However, the disturbance may have affected sensitive electronic equipment.
(If there is a problem with this Interruption, please notify the Service Center X-4717 or the above Contact as soon as possible.
If no response is received we will proceed with the interruption.)
Interim Director of Campus Operations & Maintenance
The power was turned back on at 4pm It took some time for Suresh to restart the computers. We have damping but things are not perfect yet. Auto BURTH did not work well.
Koji and I wanted to turn off the IFO-room AC so the wind would not blow on MC1-3. We could not. The switches were probably bypassed when the power transformer was replaced at the last scheduled power outage.
There is one three position manual/off/auto switch next to the filter for each unit at CES. They have to be in AUTO position when we want to turn AC on/off from the lab.
I turned it back on, maybe around 11am? Definitely a little while before the 12:30 meeting.
EDIT by KI:
Sorry, it's me. I was checking if AC was doing something bad on the ALS noise.
** The notation here is [UL, UR, LR, LL]
you asked for: diff 2008/09/25,0:00 2008/09/25,8:50:19 utc 'FSS[-_]SLOW'
LIGO controls: differences, 2008 09/25 00:00:00 utc vs. 2008 09/25 08:50:19 utc
__Epics_Channel_Name______ __Description__________ __value1____ __value2____
C1:PSL-FSS_SLOWKD 0.000000 0.001000
C1:PSL-FSS_SLOWKI -0.001000 -0.001700
C1:PSL-FSS_SLOWKP -0.000300 -0.001000
In this past weekend the ABSL laser was successfully frequency-locked to the PSL laser with a frequency offset of about 100 MHz.
In the current setup a mixer-based frequency discriminator is used for detection of the beat-note frequency.
Setup for frequency locking
The diagram below shows the setup for the frequency locking.
The shutter of the ABSL laser is closed for the vent work.
I found that the ref cav trans CCD view was blinking with 30-50 fringe amplitudes. This meant the laser freq was swinging ~50GHz.
I checked the ABSL laser and the SG out of a lock-in amplifier was connected to the slow input.
This was shaking the laser temp from 29degC to 46degC. This was the cause of the fringe swinging.
This big excitation changing the output power too as the temp was changed across it mode-hop region.
I have disconnected the excitation from the laser no matter how useful experiments were took place as there was no e-log entry about this.
I need the explanations
1. Why our precious laser is exposed to such a large swing of temperature?
2. Why the excitation is left like that without any attendance?
3. Why there was no elogging about this activity?
Hmm. Should have only been +/- 1 GHz. Some setting got changed apparently...
This is a part of the RefCav temperature measurement setup. You'll get an elog from Jenny very soon.
According the plan, I started to use the IR beam dumped after the doubling crystal for the IR beat lock (Sonali's project). The beat lock was disturbed when I shifted some clamps to make way for a few mirrors. So I set about fixing the beat lock. I reobtained the lock but noticed that the net beam power reaching the Newfocus 1611 detector was around 15mW. 10mW from the ABSL and 5mW from PSL.
I therefore started to adjust the power levels by using Y1-1064-45S mirrors at non-45 deg angles. However Rana pointed out that this would lead to amplitude noise due to the mirror vibrations. I then switched to using beam splitters as pick offs. This is better than using neutral density filters since the back scatter is lower this way.
David wanted some of the ABSL beam for his SURF student. So I changed the mirror after beam expanding telescope on the ABSL route to provide this power. We also installed a pair of half wave plates and a PBS to allow us smooth power level control on this beam.
The beat lock setup is now down and needs to be completed for PRCL and SRCL measurements.
What this means:
Of course we'll have to investigate the AA/AI situation as well. I'll try to asses that in a follow up post.
It looks like we have spare channels in the AA chassis for the existing c1ioo ADC inputs to accommodate the POP QPD.
We need AI interfaces for the ALS PZTs. What we ideally need is 3x D000186, which are the eurocard AI boards that have the flat IDC input connects that can come straight from the DAC break-out interfaces. I'm not finding any in the spares in the spare electronics shelves, though. If we can't find any we'll have to make our own AI interfaces.
I have the setup built for the AA/AI board testing around the PD testing area. Please let me leave it like that for a week or so.
12/4 TF Tested 5 PCBs
12/6 TF Tested 19 PCBs (12min/PCB) - found 1 failure (S2001479 CH1) -> Fixed 12/11
12/8 TF Tested 16 PCBs (12min/PCB)
PSD Tested 4 PCBs (11min/PCB)
12/11 TF Tested 10 PCBs + 1 fixed channel (All channels checked)
PSD Tested 10 PCBs (11min/PCB)
12/14 PSD Tested 4 PCBs (6.5min/PCB) fixed noise issue of 2 ch, TF issue of 1 ch
12/15 PSD Tested 32 PCBs (6.5min/PCB) fixed noise issue of 1ch
Temp dependence measurement
Here is the associated filter file:
# SAMPLING ULYAW 16384
# DESIGN ULYAW 0 zpk([0.512+i*1024;0.512-i*1024;2.048+i*2048;2.048-i*2048], \
# [515.838+i*403.653;515.838-i*403.653;318.182+i*623.506;318.182-i*623.506;59.2857+i*827.88; \
# DESIGN ULYAW 1 zpk([0.512513+i*1024;0.512513-i*1024;1.53754+i*2048;1.53754-i*2048], \
# DESIGN ULYAW 2 zpk([0.768769+i*1024;0.768769-i*1024;1.53754+i*2048;1.53754-i*2048], \
ULYAW 0 21 3 0 0 DAQAA 0.00091455950698073 -1.62010355523604 0.67259370084279 -1.84740554170818 0.99961738977942
-1.72089534598832 0.78482029284220 -1.41321371411946 0.99858678588255
-1.85800352005967 0.95626992044093 2.00000000000000 1.00000000000000
ULYAW 1 21 2 0 0 FEAA 0.018236566955641 -1.83622978049494 0.85804776530302 -1.84740518752455 0.99961700649533
-1.89200532023258 0.96649324616546 -1.41346289594856 0.99893883979950
ULYAW 2 21 2 0 0 ELP 0.015203943102927 -1.84117829296043 0.86136943504058 -1.84722827171918 0.99942556512240
-1.89339022414279 0.96048849609619 -1.41346289594856 0.99893883979950
We changed the range of the two SUS AA boards in the corner from +/-2 V to +/-10 V by changing the supply voltage from +/-5 V to +/-15 V. The change was made by switching the AA power feed wires on the cross connect. The max supply according to the spec of DRV134/INA134 is +/-18 V.
We checked the new range by applying the voltage to the input of AA and measuring the output going to the ADCs. The local damping MC1,2,3 appears to work.
Koji and Haixing,
We did a tolerance analysis to specify the conner frequency for passive low-pass filtering in the AA filter of Cymac. The
link to the wiki page for the AA filter goes as follows (one can have a look at the simple schematics):
Basically, we want to add the following passive low-pass filter (boxed) before connecting to the instrumentation amplifier:
Suppose (i) we have 10% error in the capacitor value and (ii) we want to have common-mode rejection
error to be smaller than 0.1% at low frequencies (up to the sampling frequency 64kHz), what would be
conner frequency, or equivalently the values for the capacitor and resistor, for the low-pass filter?
Given the transfer function for this low-pass filter:
and the error propagation equation for its magnitude:
we found that the conner frequency needs to be around 640kHz in order to have
This is sort of OK, except the capacitor connects across the (+) terminals of the two input opamps, and does not connect to ground.
Also, we don't care about the CMRR at 64 kHz. We care about it at up to 10 kHz, but not above. The sample frequency of the ADC is 64 kHz, but all of the models run at 16 kHz or less, so the Nyquist frequency is 8 kHz.
And doesn't the value depend on the resistors?
>> This sort of OK, except the capacitor connects across the (+) terminals of the two input opamps, and does not connect to ground:
>> Also, we don't care about the CMRR at 64 kHz. We care about it at up to 10 kHz, but not above.
In this case, the conner frequency for the low-pass filter would be around 100kHz in order to satisfy the requirement.
>>And doesn't the value depend on the resistors?
Yes, it does. The error in the resistor (typically 0.1%) is much smaller than that of the capacitor (10%). Since the resistor error propagates in the same as the capacitor,
we can ignore it.
Note that we only specify the conner frequency (=1/RC) instead of R and C specifically from the tolerance analysis, we still need to choose appropriate
values for R and C with the conner frequency fixed to be around 100kHz, for which we need to consider the output impedance of port 1 and port 2.
Given this new setup, we realized that the previous tolerance analysis is incorrect. Because the uncertainty in the capacitance value
does not affect the common mode rejection, as two paths share the same capacitor. Now only the imbalance of two resistors is relevant.
The error propagation formula goes as follows:
We require that the common-mode rejection error at low frequency up to 8kHz, namely
with , one can easily find out that the corner frequency needs to be around 24kHz.