• DitherLock_sweep: Sweep of the IN2/IN1 for the dither lock error point showing 600 Hz UGF
  
• HiResPZTDither_sweep: Sweep of the PZT dither input compared to the PDH error signal. I restarted the front end before the sweep was finished accounting for the blip.
  
• HiResPZTDither_sweep2: Finish of the PZT dither sweep
  

• FIgure 1: PZT dither path. Most of the features in this plot are understood: There is a 2kHz high pass filter in the PZT drive which is otherwise flat. The resonance features above 5 kHz are believed to be the tombstones. I don't understand the extra motion from 1-2 kHz.
  
• Figure 2: PZT dither path zoom in. Since I want to dither the PZT to get an error signal, it helps to know where to dither. The ADC Anti-aliasing filter is a 3rd order butterworth at 10 kHz, so I looked for nice flat places below 10 KHz and settled on 8 kHz as relatively harmless.
  
• Figure 3: PZT LSC path. This path has got a 1^2:10^2 de-whitening stage in the hardware which hasn't been digitally compensated for. You can see its effect between 10 and 40 Hz. The LSC path also has a 160 Hz low path which is visible causing a 1/f between 200 and 500 Hz. I have no idea what the 1 kHz resonant feature is, though I am inclined to point to the PDH loop since that is pretty close to the UGF and there is much gain peaking at that frequency.
  

3  fsr =  33 195 439 Hz
12 fsr = 132 781 756 Hz
15 fsr = 165 977 195 Hz
18 fsr = 199 172 634 Hz

1.5 days of happy psl-ioo with litle bumps in C1:PSL-126MOPA_HTEMP

#!/bin/csh

set ifo = C1
set sus = ${ifo}:SUS-

foreach opt (MC1 MC2 MC3)

  set c = `ezcaread -n ${sus}${opt}_PD_MAX_VAR`
  ezcastep ${sus}${opt}_PD_MAX_VAR +300

  ezcaswitch ${sus}${opt}_ULCOIL OFFSET ON
  ezcawrite ${sus}${opt}_ULCOIL_OFFSET 30000
  sleep 1
  ezcawrite ${sus}${opt}_ULCOIL_OFFSET 0
  sleep 1
  ezcawrite ${sus}${opt}_ULCOIL_OFFSET 30000
  sleep 1
  ezcawrite ${sus}${opt}_LATCH_OFF 0

  ezcawrite ${sus}${opt}_ULCOIL_OFFSET 0
  ezcaswitch ${sus}${opt}_ULCOIL OFFSET OFF

  ezcawrite ${sus}${opt}_PD_MAX_VAR $c

end

echo
date
echo

• Replace the cables from the board to the front panel connectors if this hasn't already been done.
  
• Replace the input opamps with 4131's. Be sure to test both positive and negative input signals.
  
• Check that all the compensation capacitors are in place and are 68 pF
  
• Make sure all the feedback loops have high frequency rolloff
  
• The ISS board reads the PDs differentially; make sure the PD sends differentially.
  
• Add a big (ie 10uF tantalum) capacitor to the PD to suppress power supply noise
  
• Add bigger power supply bypass caps to the ISS