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ID Date Author Typedown Category Subject
  14744   Wed Jul 10 14:57:01 2019 KojiSummaryCDSChannel recipe for iscaux upgrade

The list of the iscaux channels and pin assignments were posted to google drive.
The spreadsheet can be viewable by the link sent to the 40m ML. It was shared with foteee@gmail for full access.

Summary

  • We need
    4 ADC modules
    5 DAC modules
    5 Binary I/O modules
  • Be aware that there are bundled multiple digital I/O channels such as "mbboDirect" and "mbbi".
  • The full db record of the new channels need to be inferred from the existing channels.

Necessary electronics modification

1. D990694 whitening filter modification (4 modules)

This module shares the fast and slow channels on the top DIN96pin (P1) connector. Also, the whitening selector (done by an analog signal per channel) is assigned over 17pin of the P1 connector, resulting in the necessity of the second DSUB cable. By migrating the fast channels, we can swap the cable from the P1 to P2.  Also, the whitening selectors are concentrated on the first Dsub. (See Attachment1 P1)

2. D040180 / D1500308 Common Mode Board

CM servo board itself doesn't need any modification. The CM board uses P1 and P2. So we need to manufacture a special connector for CM Board P2. (cf The adapter board for P1 T1800260). See also D1700058.

3. D990543A1 LSC Photodiode Interface

PD I/F board has the DC mon channels spread over the 16pin limit. P1 21A can be connected to 6A so that we can accommdate it in the first Dsub.
Also the board uses AD797s. This is not necessary. We can replace them to OP27s. I actually don't know what is happening to those bias control, temp mon, enable, and status. These features should be disables at the I/F and the PDs. (See Attachment2 P1)

Attachment 1: D990694-B.pdf
D990694-B.pdf D990694-B.pdf D990694-B.pdf D990694-B.pdf D990694-B.pdf D990694-B.pdf D990694-B.pdf D990694-B.pdf
Attachment 2: D990543A1.PDF
D990543A1.PDF D990543A1.PDF D990543A1.PDF
  14747   Thu Jul 11 12:42:35 2019 gautamSummaryCDSP2 interface board

I looked into the design of the P2 interface board. The main difficulty here is geometric - we have to somehow accommodate sufficient number of D-sub connectors in the tight space between the two P-type connectors. 

I think the least painful option is to stick with Johannes' design for the P1 connector. For the CM board, the P2 connector only uses 6 pairs of conductors for signals. So we can use a D-15 connector instead of 2 D-37 connectors. Then we can change the PCB shape such that the P1 connector can be accommodated (see Attachment #1). The other alternative would be to have 2 P-type connectors and 3 D-subs on the same PCB, but then we have to be extra careful about the relative positioning of the P-type connectors (otherwise they wont fit onto the Eurocrate). So I opted to still have two separate PCBs.

I took a first pass at the design, the files may be found here. I just auto-routed the connections, this is just an electrical feedthrough so I don't think we need to be too concerned about the PCB trace routing? If this looks okay, we should send out the piece for fab ASAP.

I will work on putting together the EPICS server machine (SuperMicro) this afternoon.

Quote:

2. D040180 / D1500308 Common Mode Board

CM servo board itself doesn't need any modification. The CM board uses P1 and P2. So we need to manufacture a special connector for CM Board P2. (cf The adapter board for P1 T1800260). See also D1700058.

Attachment 1: IMG_7728.JPG
IMG_7728.JPG
  14749   Thu Jul 11 13:08:36 2019 ChubSummaryCDSP2 interface board

It's nice and compact, and the cost of new 15-pin DSUB cables shouldn't be a factor here.  What does the 15p cable connect to?

  14750   Thu Jul 11 13:09:22 2019 gautam SummaryCDSP2 interface board

it will connect to a 15 pin breakout board in the Acromag chassis

Quote:

It's nice and compact, and the cost of new 15-pin DSUB cables shouldn't be a factor here.  What does the 15p cable connect to?

  14754   Thu Jul 11 18:15:22 2019 gautamSummaryElectronicsPSL/IOO rack checkout

I looked at the PSL/IOO racks to check for which boards, if any, require an additional P2 interface, so that we can try and design a generic one for the IMC/CM boards and whatever else may require it. While searching the elog, I saw that Koji and Johannes had already done this, see Koji's elog in this thread. Some remarks:

  1. D990155 seems to be unused in both PSL and IOO racks. The one in the PSL rack has some LEMO cables plugged in to the front panel, but they go nowhere. So I think that both of these are redundant (in the assessment below, only one was marked redundant).
  2. In the PSL rack, the "TTFSS Interface", "PSL PMC SERVO", and "DAQ INTERFACE" (which I think is obsolete) cards all have their P2 connectors daisy chained together, going to a cross-connect. Kruthi and I traced this to be going to a cross connect marked "J23-PSLRACK-CCP". In the PSL wiring diagram of which we have a hardcopy in the control room, it looks like these channels are related to the RefCav? So I think this is not required to be interfaced to our new Acromag DAQ system. 

Conclusion: Only the IMC Servo and CM boards need their P2 connectors connected to Acromag.It would be helpful to remove the TTFSS Interface board and figure out what exactly the pin-mapping for the backplane connectors are, but I didn't do this today because there is a "High Voltage" line going to the Interface Board and I'm not actually sure of the signal chain for the FSS servo.

  14770   Thu Jul 18 00:51:52 2019 KojiSummaryCDSiscaux electronics modifications

Along with the plan in ELOG 14744, the ISC PD interface and the whitening filter board have been modificed. The ISC PD I/Fs were restored to the crate and the cables were connected. The whitening filteres are still on the electronics bench for some more tests before being returned to the crate.

The updated schematics were uploaded as https://dcc.ligo.org/D1900318 and https://dcc.ligo.org/D1900319

- Modification of the ISC PD interface: Jumpers between DIN96 P1 and P2. Replace all AD797s with OP27. In fact only I/F #1 (the left most)  had total 12 AD797 but the other units already had OP27s.

- Modification of the whitening filter: Jumpers between DIN96 P1 and P2.

Attachment 1: LSC_whitening2.jpg
LSC_whitening2.jpg
Attachment 2: LSC_whitening.jpg
LSC_whitening.jpg
  14775   Thu Jul 18 22:34:40 2019 KojiSummaryCDSiscaux electronics modifications

The whitening filter modules have been restored to the crates. The SMA cables have been restored and fastened by a spanner. The ribbon cable to the antialiasing board was also connected. The backplane cables have not been moved from the upper DIN96 connector to the lower one.

Everything is expected to be good, but just keep eyes on the LSC signals as the boards were not quantitatvely tested yet. If you find something suspicious, report on the elog.

  14785   Sat Jul 20 11:57:39 2019 gautamSummaryCDSP2 interface board

The boards arrived. I soldered on a DIN96 connector, and tested that the goemetry will work. It does yes. The only constraint is that the P2 interface board has to be installed before the P1 interface is installed. Next step is to confirm that the pin-mapping is correct. The pin mapping from the DIN96 connector to the DB15 was also verified.

*Maybe it isn't obvious from the picture, but there shouldn't be any space constraint even with the DB37/DB15 cables connected to the respective adapter boards.

Attachment 1: IMG_7773.JPG
IMG_7773.JPG
  14818   Tue Jul 30 20:11:12 2019 ranaSummaryIMCIMC ASC: thoughts and hopes

One of the biggest challenges in LIGO is reducing the alignment control noise. If you haven't worked on it for at least a few years, it probably seems like a trivial problem. But all versions of LIGO since 2001 have been limited by ASC noise below ~50 Hz.

I think the 40m IMC is a good testbed for us to try a few approaches towards mitigating this noise in LIGO. The following is a list of steps to take to get there:

  1. Using step responses and TF measurements, characterize the full existing system: SISO loop shapes, cross-couplings, and how diagnonal is the input and output matrices of the WFS. In principle, since we have 2 WFS in reflection and 1 DC QPD in the MC2 transmission, we should have full sensing of all angular DoFs.
  2. Check the correct operation of the WFS heads and the whole RF chain. We want the gains in the system to be such that either the shot noise or the RF electronics noise of the head is the limiting broadband noise in the system.
  3. Balancing the gains and phases of the demodulated signals is tricky, because we have no good reference. Should we use the JenneAM laser or the PSL beam?
  4. Estimate the coupling from the angular feedback signal to the IMC length noise using (1) sine wave injections for linear coupling, and (2) broadband noise for nonlinear coupling.
  5. We think the bilinear noise is due to the beam spot motion modulating the angle to length coupling as sensed by the laser beam. If this is true, we can increase the low frequency gain to minimize the beam spot motion (is this true?).
  6. By sinusoidally driving the mirror angles we can measure the instantaneous beam spot positions. We can then derive the matrix required to convert from our angular sensors (WFS + QPD) into beam spot motion. We should modify our IMC-WFS real-time model to give us DAQ channels which are beam spot estimators.
  7. Build a simulation of an IMC which has WFS, QPD, shot noise, and seismic noise.
  8. Use our optimal linear-feedback design tools to make Angular loops which minimize the bilinear noise coupling.
  9. Build a nonlinear controller (neural networks: dense + CNN) that outperforms the linear one by estimating the beam spot motion continuously and driving the cavity length to cancel the angle-to-length noise. 

I think that steps 1-6 are well within our existing experience, but we should do it anyway so as to reduce the IMC beam motion at low frequencies, and also to reduce the 10-100 Hz frequency noise as seen by the rest of the interferometer.

Steps 7-8 are medium hard, but we can get some help from the CSWG in tackling it.

Step is pretty tough, but I would like to try it and also get some help from MLWG and CSWG to address it.

  14829   Mon Aug 5 17:23:26 2019 gautamSummaryComputersWiFi Settings on asia

The VEA laptop asia was configured to be able to connect to too many WiFi networks - it was getting conflicted in its default position at the vertex and trying to hop between networks, for some reason trying to connect to networks that had poor signal strength. I deleted all options from the known networks except 40MARS. Now the network connection seems much more stable and reliable.

  14877   Fri Sep 13 13:03:35 2019 KojiSummaryCDSDIN 96pin to DSUB37 adapter (single) ready for use

The PCB board of the adapter for DIN 96pin to DSUB37 conversion (single DSUB version) was delivered yesterday and I quickly soldered the connectors.

They are ready for use and stored in a JLCPCB cardboard box on a pile of acromag stuff. (Note that the lacel is written on the box with Sharpie)

Attachment 1: P_20190912_192109.jpg
P_20190912_192109.jpg
  14879   Mon Sep 16 09:11:37 2019 gautamSummaryCDSDIN 96pin to DSUB37 adapter (single) ready for use

I installed 6 of these in 1Y2. Three were for PD INTF #1-3, and I used three more for the AS110, REFL11, and REFL33 Demod board FEs, where the strain-reflief of the DC power cables to the Eurocrate was becoming a problem. So now there are only 4 units available as spares.

Once the strain-relieving of the Dsub cabling to 1Y3 is done, we can move ahead with testing. I'd like to put this to bed this week if possible.

  14885   Mon Sep 16 20:22:19 2019 gautamSummaryCDSUpdate on the Acromag status
  1. Jordan (new Engineer) and Chub neatened out the cabling at 1Y2/1Y3 today. After their work, I plugged in all the Dsubs to the rear Eurocrate DB37->DIN96 adaptors. Jordan nicely fixed up the labels on the cable with some extra sellotape for a more durable label.
  2. As part of the war on cross-connects, Chub removed some cables that were piping BIO signals from the fast CDS system to the whitening boards.
    • There is a SCSI to DB37 custom ribbon cable going from the BIO card in the expansion chassis to a 1U chassis box at the very bottom of 1Y2.
    • This 1U box, with DCC number D080478 (but no schematic exists on the DCC or any of the usual secret hidey-holes) breaks out the 32 BIO channels to 16+16.
    • Each set of 16 channels was supposed to get broken out to 8+8 via some cross connects and then goto the whitening boards. This is the part that got distrubed.
    • Koji and I discussed options - if Chub cannot resotre this easily, we will make a D37--> 4*D15 breakout board, and pipe the signals via the backplane P2 connectors. This will mean ~10 more days before the LSC system can be tested.
    • Some cabling to the TT DACs and an ADC were also disturbed, but these are easily restored.
  3. From the hardware standpoint, some cross-struts for strain relief on the back of 1Y2 need to be installed --> Chub.
Attachment 1: acromagChecklist.pdf
acromagChecklist.pdf
  14892   Tue Sep 17 23:43:34 2019 KojiSummaryCDSAcromag logic checker

For the investigation of the latch logic issue for the CARM CM board, I have made the LED logic checkers with DB breakout boards. They require the pull up voltage supply of +15V because the acromag digital out is a open corrector (well... open "source") output.

The logic from Pin1 to Pin16 of DB37 can be monitored. The DB15 connector is only for monitoring the latch enable logic.

What Gautam and I found with the logic outputs was that the latch logic works fine but occasionally we found that the top 2 bits and the bottom 4bit were processed independently.

Attachment 1: digital_checker.pdf
digital_checker.pdf
Attachment 2: IMG_8914.JPG
IMG_8914.JPG
  15082   Fri Dec 6 17:49:46 2019 ranaSummaryPEMJump test of seismometers: EX needs recentering

Yehonathan, please center the EX seismometer.

The attached PDF shows the seismometer signals (I'm assuming that they're already calibrated into microns/s) during the lab tour for the art students on 11/1. The big spike which I've zoomed in on shows the time when we were in the control room and we all jumped up at the same time. There were approximately 15 students each with a mass of ~50-70 kg. I estimate that out landing times were all sync'd to within ~0.1 s.

Attachment 1: Seismometers.pdf
Seismometers.pdf
Attachment 2: src.tgz
  15083   Sun Dec 8 20:15:41 2019 ranaSummaryPEMJump test of seismometers: EX needs recentering

I have re-centered the EX (and EY) seismometers. They are Guralp CMG40-T, and have no special centering procedure except cycling the power a few times. I turned off the power on their interface box, then waited 10s before turning it back on.

The fist atm shows the comparison using data from 8-9 PM Saturday night:

  1. there seems to be a factor of 2 calibration diff between the T240 near the BS, and the Guralp seismometers at the end. Which one is right? surpriseWhen was the last time they were cross calibrated?
  2. The low coherence between BS_X and EX_X shows the problem. They should be very coherent (> 0.9) for 0.1-1 Hz.sad

 

Attachment 1: seis_all_191208.pdf
seis_all_191208.pdf
  15086   Mon Dec 9 13:08:24 2019 YehonathanSummaryPEMJump test of seismometers: EX needs recentering

I check the seismometers in the last 14 hours (Attached). Seems like the coherenece is restored in the x direction.

 

 

Attachment 1: seis_191208.pdf
seis_191208.pdf
  15093   Wed Dec 11 15:01:57 2019 JonSummaryPSLPMC cavity ringdown measurement

[Jon, Yehonathan]

We carried out a set of cavity ringdown measurements of the PMC. The 1/e decay time scale is found to be 35.2 +/- 2.4 (systematic) μs. The statistical error is negligible compared to the systematic error, which is taken as the maximum absolute deviation of any measurement from the average value.

To make the measurement, we injected the first order deflection beam of an 80 MHz AOM, then extinguished it quickly by cutting the voltage offset to the AOM driver provided by an RF function generator. A 100 MHz oscilloscope configured to trigger on the falling voltage offset was used to sample the cavity in transmission as sensed by a PDA55. We found the detector noise of the DC-coupled output of the 35.5 MHz REFL PD to be too high for a reflection-side measurement.

Further loss analysis is forthcoming.

Attachment 1: IMG_0101.jpg
IMG_0101.jpg
  15119   Mon Jan 13 23:30:53 2020 YehonathanSummaryPSLChanges made since Gautam left

As per Gautam's request, I list the changes that were made since he left:

1. The AOM driver was connected to a signal generator.

2. The first order beam from the AOM was coupled into the PMC while the zero-order beam is blocked. We might want to keep this configuration if the pointing stability is adequate.

3. c1psl got Burt restored to Dec 1st.

4. Megatron got updated.

Currently, c1susaux seems unresponsive and needs to be rebooted.

  15121   Tue Jan 14 20:17:09 2020 gautamSummaryGeneralIFO recovery

Summary:

There was no light entering the IFO. I worked on a few things to bring the interferometer to a somewhat usable state. The goal is to get back to PRFPMI locking ASAP.

Details:

Problem: All fast models report a "0x4000" DC error. See Attachment #1.

Solution: I think this is a "known" issue that happened last new year too. The fix was to add a hard-coded 1 second offset to the daqd config files. However, incrementing/decreasing this offset by +/- 1 second did not fix the errors for me today. I'll reach out to JH for more troubleshooting tips.

Update 15 Jan 2020 830am: The problem is now fixed. See here.

Problem: c1susaux and c1auxey were unresponsive.

Solution: Keyed c1auxey. Rebooted c1susaux and as usual, manually started the eth0/eth1 subnets. The Acromag crate did not have to be power-cycled. ITMY got stuck in this process - I released it using the usual bias jiggling. Why did c1susaux fail? When did it fail? Was there some un-elogged cable jiggling in that part of the lab?

Problem: IMC autolocker and FSS slow processes aren't running on megatron after the upgrade.

Solution: Since no one bothered to do this, I setup systemd infrastructure for doing this on megatron. To run these, you do:

sudo systemctl start MCautolocker.service
sudo systemctl start FSSSlow.service

and to check their status, use:

sudo systemctl status MCautolocker.service
sudo systemctl status FSSSlow.service

The systemd setup is currently done in a naive way (using the bash executable to run a series of commands rather than using the systemd infrastructure itself to setup variables etc) but it works. I confirmed that the autolocker can re-acquire IMC lock, and that the FSS loop only runs when the IMC is locked. I also removed the obsolete messages printed to megatron's console (by editing /etc/motd) on ssh-login, advising the usage of initctl - the updated message reflects the above instructions.

In order to do the IMC locking, I changed the DC voltage to the AOM to +1V DC (it was +0.8 V DC). In this setting, the IMC refl level is ~3.6 V DC. When using the undiffracted AOM beam, we had more like +5.6 V DC (so now we have ~65% of the nominal level) from the IMC REFL PD when the IMC was unlocked. IIRC, the diffraction efficiency of the AOM should be somewhat better, at ~85%. Needs investigation, or better yet, let's just go back to the old configuration of using the undiffracted beam.

There was also an UN-ELOGGED angry change of the nominal value of the PMC servo gain to 12.8, and no transfer function measurement. There needs to be a proper characterization of this loop done to decide what the new nominal value should be.

I'm going to leave the PSL shutter open and let the IMC stay locked for stability investigations. Tomorrow, I'll check the single-arm locking and the ALS system.

Attachment 1: DCerrors.png
DCerrors.png
  15123   Wed Jan 15 10:04:19 2020 gautamSummaryGeneralPOX / POY locking restored

Single arm locking using POX and POY has been restored. After running the dither alignment servos, the TRX/TRY levels are ~0.7. This is consistent with the IMC transmission being ~11000 counts with the AOM 1st order diffracted beam (c.f. 15000 counts with the undiffracted beam).

Quote:

Tomorrow, I'll check the single-arm locking and the ALS system.

Attachment 1: singleArms.png
singleArms.png
  15201   Mon Feb 10 09:40:54 2020 Larry WallaceSummaryGeneralSolidWorks Computer Upgrade and Printer repair

On February 5, 2020, the Dell engineering workstation located in the 40M lab, was replaced with a newer Engineering workstation, per a request from Koji . The new workstation should perform a good deal better over the older unit. It has more cores, more memory and a better video card. Since this unit is being used by the 40M group, the Comsol s/w pkg. was also installed on the unit.

During the computer swap, Koji had a problem with a print job and it was discovered the bottom tray of the HP5550 printer was broken. The broken tray was replaced from another unit that was being disposed of.

  15226   Wed Feb 26 21:43:48 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

To supplement the material presented during the BHD review, I've put together a projected noise budget for the 40m. Note these are the expected interferometer noises (originating in the IFO itself), not BHD readout noises. The key parameters for each case are listed in the figure title. Also attached is a tarball (attachment 4) containing the ipython notebook, data files, and rolled-back version of pygwinc which were used to generate these figures.

Attachment 1: Phase quadrature readout.

Attachment 2: Comparison to aLIGO design sensitivity (phase quadrature).

Attachment 3: Amplitude quadrature readout.

Attachment 1: 40m_phase_quad.pdf
40m_phase_quad.pdf
Attachment 2: 40m_aligo_comp.pdf
40m_aligo_comp.pdf
Attachment 3: 40m_ampl_quad.pdf
40m_ampl_quad.pdf
Attachment 4: noise_budget.tar
  15228   Wed Feb 26 22:09:52 2020 gautamSummaryBHDProjected IFO noise budget, post-BHD upgrade

The quantum noise curves here are not correct. c.f. amplitude quadrature noise budget.

  15241   Mon Mar 2 23:49:03 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

Updated noise budget curves, now computed using the latest version of pygwinc. This resolves the inconsistency between the gwinc quantum noise curves and Gautam's analytic calculations. As before, the key configuration parameters are listed in the figure titles.

Attachment 1: Phase quadrature

Attachment 2: Amplitude quadrature

Attachment 3: Comparison to aLIGO design (phase quadrature)

Quote:

The quantum noise curves here are not correct. c.f. amplitude quadrature noise budget.

Attachment 1: 40m_phase_quad.pdf
40m_phase_quad.pdf
Attachment 2: 40m_ampl_quad.pdf
40m_ampl_quad.pdf
Attachment 3: 40m_aligo_comp.pdf
40m_aligo_comp.pdf
  15244   Tue Mar 3 18:11:05 2020 JonSummaryBHDProjected IFO noise budget, post-BHD upgrade

Revised noise estimates, correcting a couple of factor of 2 and factor of pi errors found in the coil driver noise calculation. Also resolves a strain vs. displacement units confusion using the new pygwinc. Gautam and I have checked these noises against the analytical predictions and believe they are now accurate. Attachments are again:

Attachment 1: Phase quadrature

Attachment 2: Amplitude quadrature

Attachment 3: Comparison to aLIGO design (phase quadrature)

Attachment 1: 40m_phase_quad.pdf
40m_phase_quad.pdf
Attachment 2: 40m_ampl_quad.pdf
40m_ampl_quad.pdf
Attachment 3: 40m_aligo_comp.pdf
40m_aligo_comp.pdf
  15256   Thu Mar 5 19:45:23 2020 JonSummaryPSLC1PSL in-situ test results

We've completed almost all of the in-situ testing of the c1psl channels. During this process, we identified several channels which needed to be rewired to different Acromags (BIO sinking v. sourcing). We also elected to change the connector type of a few channels for practical advantages. Those modifications and other issues found during testing are detailed below. Also attached are the updated channel assignments, with a column indicating the in-situ testing status of each channel.

Post-installation modifications

  • All four channels connected to the sourcing BIO module were found to in fact require sinking I/O. They were reassigned to sinking BIO modules. Affected channels:
    • C1:PSL-FSS_FASTSWEEP
    • C1:PSL-FSS_SW1
    • C1:PSL-FSS_SW2
    • C1:PSL-PSL_Shutter
  • Added a new AI channel:
    • C1:PSL-FSS_MIXERM
  • Removed an unneccessary AI channel:
    • C1:PSL-FSS_LODET
  • Moved two AI channels from BNC connectors to a new Dsub connector (labelled DB25M-2 in the spreadsheet).
    • C1:PSL-FSS_RCTEMP
    • C1:PSL-FSS_RMTEMP_VOLTS

Issues identified during testing

  • Digital calibration. The following channels work, but we need to verify their EPICS calibration parameters (EGUF/EGUL):
    • C1:PSL-FSS_FASTGAIN
    • C1:PSL-FSS_FAST
    • C1:PSL-PMC_RFADJ
    • C1:PSL-PMC_MODET
  • IMC servo board. The Acromag channels themselves were found to work, but the linearity of the mbbo gain stages are in question (i.e., a potential problem with the board). GV is currently testing the servo board.
  • PSL QPD board apears to be dead. We connected a scope directly to the test points on the board and measured a high level of noise and no signal (for all four of the QPD channels). I understand this QPD has not been used in some time, so it may not have been noticed before.
  • WFS DC channels are saturating when the IMC is unlocked. The acceptance range of the Acromag ADC is only +/-10 V, but we measured sensor voltages as high as ~14 V. It appears that the old ADCs were somehow accepting a range of 0 to +20 V instead of -10 to +10 V. However, the Acromags do not support the input range 0-20 V. Since SNR is not critical for these channels (they're used only for initial alignment), I propose we simply install a voltage divider inside the chassis, just before the Acromag, for each of these signals.
Attachment 1: c1psl_feedthrough_wiring_-_By_Connector_(3).pdf
c1psl_feedthrough_wiring_-_By_Connector_(3).pdf c1psl_feedthrough_wiring_-_By_Connector_(3).pdf c1psl_feedthrough_wiring_-_By_Connector_(3).pdf c1psl_feedthrough_wiring_-_By_Connector_(3).pdf
  15266   Wed Mar 11 18:12:53 2020 gautamSummaryPSLWFS Demod board modifications

[koji, gautam]

Attachment #1 shows the relevant parts of the schematic of the WFS demod board (not whitening board). 

  • The basic problem was that the switchable gain channels were not accounted for in the Acromag channel list 😒.
  • What this meant was that the DC gain was set to the default x100 (since the two DG211s that provide the switchable x10 and x1 gain options had their control logic pins pulled up to +5V because these pins weren't connected to any sinking BIO channel).
  • Rather than set up new connections to Acromags inside the chassis (though we have plenty of spares), Koji and I decided to make these fixed to x1 gain.
  • The actual fix was implemented as shown in the annotated schematic. There are some pictures 📷 of the PCB in the DCC entry linked above.
  • Amusingly, this board will now require a sourcing BIO unit if we want to still have the capability of switching gains.

Before removing the boards from the eurocrate: 

  • I dialled down the Kepco HV supplies
  • disconnected all the cabling to these boards after noting down cable numbers etc.

After Koji effected the fix, the boards were re-installed, HV supplies were dialled back up to nominal voltage/currents, and the PMC/IMC were re-locked. The WFS DC channels now no longer saturate even when the IMC is unlocked 👏 👏 . I leave it to Yehonathan / Jon to calibrate these EPICS channels into physical units of mW of power. We should also fix the MEDM screen and remove the un-necessary EPICS channels.

Later in the evening, I took advantage of the non-saturated readbacks to center the beams better on the WFS heads. Then, with the WFS servos disabled, I manually aligned the IMC mirrors till REFLDC was minimized. Then I centered the beam on the MC2 transmission QPD (looking at individual quadrants), and set the WFS1/2 RF offsets and MC2 Trans QPD offsets in this condition.

Quote:

WFS DC channels are saturating when the IMC is unlocked.

Attachment 1: D980233-B_Mar2020Mods.pdf
D980233-B_Mar2020Mods.pdf
  15300   Tue Apr 7 15:30:40 2020 JonSummaryNoiseBudget40m noise budget migrated to pygwinc

In the past year, pygwinc has expanded to support not just fundamental noise calculations (e.g., quantum, thermal) but also any number of user-defined noises. These custom noise definitions can do anything, from evaluating an empirical model (e.g., electronics, suspension) to loading real noise measurements (e.g., laser AM/PM noise). Here is an example of the framework applied to H1.

Starting with the BHD review-era noises, I have set up the 40m pygwinc fork with a working noise budget which we can easily expand. Specific actions:

  • Updated the 40m fork to the latest pygwinc version (while preserving the commit history).
  • Added a directory ./CIT40m containing the 40m-specific noise budget files (created by GV).
  • Added an ipython notebook CIT40m.ipynb at the root level showing how to generate a noise budget.
  • Integrated our DAC and seismic noise estimators into pygwinc.
  • Marked the old 40m NB repo as obsolete (last commit > 2 yrs ago). Many of these noise estimates are probably stale, but I will work with GV to identify which ones can be migrated.

I set up our fork in this way to keep the 40m separate from the main pygwinc code (i.e., not added to as a built-in IFO type). With the 40m code all contained within one root-level directory (with a 40m-specific name), we should now always be able to upgrade to the latest pygwinc without creating intractable merge conflicts.

  15302   Mon Apr 13 16:51:49 2020 ranaSummaryDAQNODUS: rsyncd daemon / service set up

I just now modified the /etc/rsyncd.conf file as per Dan Kozak's instructions. The old conf file is still there with the file name appended with today's date.

I then enabled the rsync daemon to run on boot using 'enable'. I'll ask Dan to start the file transfers again and see if this works.

controls@nodus|etc> sudo systemctl start rsyncd.service
controls@nodus|etc> sudo systemctl enable rsyncd.service
Created symlink from /etc/systemd/system/multi-user.target.wants/rsyncd.service to /usr/lib/systemd/system/rsyncd.service.
controls@nodus|etc> sudo systemctl status rsyncd.service
● rsyncd.service - fast remote file copy program daemon
   Loaded: loaded (/usr/lib/systemd/system/rsyncd.service; enabled; vendor preset: disabled)
   Active: active (running) since Mon 2020-04-13 16:49:12 PDT; 1min 28s ago
 Main PID: 4950 (rsync)
   CGroup: /system.slice/rsyncd.service
           └─4950 /usr/bin/rsync --daemon --no-detach

Apr 13 16:49:12 nodus.martian.113.168.192.in-addr.arpa systemd[1]: Started fast remote file copy program daemon.
Apr 13 16:49:12 nodus.martian.113.168.192.in-addr.arpa systemd[1]: Starting fast remote file copy program daemon...

  15313   Fri Apr 24 00:26:59 2020 ranaSummaryPEML.A. EQ from Tuesday night
Attachment 1: April22-EQ.pdf
April22-EQ.pdf
  15325   Tue May 12 17:51:25 2020 ranaSummaryComputer Scripts / Programsupdated LESS syntax highlight on nodus

apt install source-highlight

then modified bashrc to point to /usr/share instead of /usr/bin

  15331   Thu May 14 00:47:55 2020 gautamSummaryComputer Scripts / Programspcdev1 added to authorized keys on nodus

This is to facilitate the summary page config fines to be pulled from nodus in a scripted way, without being asked for authentication. If someone knows of a better/more secure way for this to be done, please let me know. The site summary pages seem to pull the config files from a git repo, maybe that's better?

  15374   Thu Jun 4 00:21:28 2020 KojiSummaryCOCITM spares and New PR3 mirrors transported to Downs for phasemap measurement

GariLynn worked on the measurement of E1800089 mirrros.

The result of the data analysis, as well as the data and the codes, have been summarized here:
https://nodus.ligo.caltech.edu:30889/40m_phasemap/#E1800089
 

  15456   Mon Jul 6 15:10:40 2020 JonSummaryBHD40m --> A+ BHD design analysis

As suggested last week, Hang and I have reviewed the A+ BHD status (DRD, CDD, and reviewers' comments) and compiled a list of key unanswered questions which could be addressed through Finesse analysis.

In anticipation of others helping with this modeling effort, we've tried to break questions into self-contained projects and estimated their level of difficulty. As you'll see, they range from beginner to Finesse guru.

  15482   Wed Jul 15 17:46:05 2020 anchalSummaryALSNoise budget for ALS

I started my attempt on noise budgeting of ALS by going back to how Kiwamu did it and adding as many sources as I could find up till now. This calculation is present in ALS_Noise_Budget notebook. I intend to collect data for noise sources and all future work on ALS in the ALS repo.

The noise budget runs simulink through matlab.engine inside python and remaining calculations including the pygwinc ones are done in python. Please point out any errors that I might have done here. I still need to add noise due to DFD and the ADC after it. For the residual frequency noise of AUX laser, I have currently used an upper limit of 1kHz/rt Hz at 10 Hz free-running frequency noise of an NPRO laser.

Attachment 1: ALS_nb.pdf
ALS_nb.pdf
  15496   Mon Jul 20 19:21:16 2020 anchalSummaryALSFew proposals for Voyager ALS

I've added 4 proposed schemes for implementing ALS in voyager. Major thing to figure out is what AUX laser would be and how we would compare the different PSL and AUX lasers to create an error signal for ALS. Everywhere below, 2um would mean wavelengths near 2 um including the proposed 2128nm. Since it is not fixed, I'm using a categorical name. Same is the case for 1um which actually would mean half of whatever 2 um carries.


Higher Harmonic Generation:

  • We can follow the current system of ALS with using 1.5 times PSL frequency as AUX instead of second harmonic as 1 um is strongly absorbed in Si.
  • To generate 1.5 times PSL frequency, three stages would be required.
    • SHG: Second Harmonic Generation mode matched to convert 2um to 1um. If we are instead making 2 um from 1um to start with, this stage will not be required.
    • SFG: Sum Frequency Generation mode matched to sum 2um photon and 1um photon to give 0.65 um photon.
    • DPDC: Degenerate Parametric Down Conversion mode matched to convert 0.65 um to 1.3 um (which would be 1.5 times PSL frequency).
  • To compare, we can either convert pick-off from PSL to AUX frequency by doing the above 3 stages (Scheme II).
  • Or we can just do SHG and SFG at PSL pick-off and do another SHG at AUX end (Scheme I) to compare the AUX and PSL both converted to 0.65 um (which would be 2 times AUX and 3 times PSL frequency).
  • This method would have added noise from SHG, SFG and DPDC processes along with issues to be inefficiency of conversion.

Arbitrary AUX frequency:

  • We can get away with using some standard laser near 1.5 um region directly as AUX. Most probably this would be 1550 nm.
  • What's left is to devise a method of comparing 1.5 um and 2um frequencies. Following are two possible ways I could think of:

Using a frequency comb:

  • Good stable frequency combs covering the wavelength region from 1.5 um to 2 um are available of the shelf.
  • We would beat PSL and transmitted AUX separately with the frequency comb. The two beat note frequencies would be:
    \Delta_\text{PSL} = \nu_\text{PSL} - \nu_{CEO} - m_1 \nu_\text{Rep}
    \Delta_\text{AUX} = \nu_\text{AUX} - \nu_{CEO} - m_2 \nu_\text{Rep}
  • Here, m1 and m2 represent the nearest modes (comb teeth) of frequency comb to PSL and AUX respectively.
  • Carrier Envelope Offset frequency (\nu_{CEO}) can be easily generated by using an SHG crystal in front of the Frequency comb. This step is not really required since most of the modern frequency combs now comb with inbuilt zero \nu_{CEO} stabilization.
  • Mixing above beatnotes with \nu_{CEO} would remove \nu_{CEO} from them along with any noise associated with \nu_{CEO}.
  • Further, a Direct Digital Synthesis IC is required to multiply the AUX side RF signal by m1/m2. This finally makes the two RF signals to be:
    \nu_{A} = \nu_\text{PSL} - m_1 \nu_{Rep}
    \nu_{B} = \frac{m_1}{m_2}\nu_\text{AUX} - m_1 \nu_{Rep}
  • Which on mixing would give desired error signal for DFD as :
    \nu_\text{PSL} - \frac{m_1}{m_2}\nu_\text{AUX}
  • This method is described in Stenger et al. PRL. 88, 073601 and is useful in comparing two different optical frequencies with a frequency comb with effective cancellation of all noise due to the frequency comb itself. Only extra noise is from the DDS IC which is minimal.
  • This method, however, might be an overkill and expensive. But in case (for whatever reason) we want to send in another AUX at another frequency down the 40m cavity, this method allows the same setup to be used for multiple AUX frequencies at once.

Using a Transfer Cavity:

  • We can make another more easily controlled and higher finesse cavity with a PZT actuator on one of the mirrors.
  • In the schematic, I have imagined it has a triangular cavity with a back end mirror driven by PZT.
  • Shining PSL from one side of the transfer cavity and employing the usual PDH, we can lock the cavity to PSL.
  • This lock would require to be strong and wide bandwidth. If PZT can't provide enough bandwidth, we can also put an EOM inside the cavity! (See this poster from Simon group at UChicago)
  • Another laser at AUX frequency, called AUX2 would be sent from the other side of the cavity and usual PDH is employed to lock AUX2 to the transfer cavity.
  • So clearly, this cavity also requires coatings and coarse length such that it is resonant with both PSL and AUX frequencies simultaneously.
  • And, the FSS for AUX2 needs to be good and high bandwidth as well.
  • The transmitted AUX2 from the transfer cavity now would carry stability of PSL at the frequency of AUX and can be directly beaten with transmitted AUX from the 40m cavity to generate an error signal for DFD.
  • I believe this is a more doable and cheaper option. Even if we want to do a frequency comb scheme, this could be a precursor to it.

_________________________

EditTue Jul 21 17:24:09 2020: (Jamie's suggestion)

Using Mode Cleaner cavity as Transfer Cavity:

  • If we coat the mode cleaner cavity mirrors appropriately, we can use it to lock AUX2 laser (mentioned above).
  • This will get rid of all extra optics. The only requirement is for FSS to be good on AUX2 to transfer PSL (MC) stability to AUX frequency.
  • I've added suggested schematic for this scheme at the bottom.

 

Attachment 1: VoyagerALSSchemes.pdf
VoyagerALSSchemes.pdf VoyagerALSSchemes.pdf VoyagerALSSchemes.pdf VoyagerALSSchemes.pdf VoyagerALSSchemes.pdf
  15499   Thu Jul 23 15:58:24 2020 JonSummaryVACVacuum controls refurbishment plan

This year we've struggled with vacuum controls unreliability (e.g., spurious interlock triggers) caused by decaying hardware. Here are details of the vacuum refurbishment plan I described on the 40m call this week.

 Refurbish TP2 and TP3 dry pumps. Completed [ELOG 15417].

 Automated notifications of interlock-trigger events. Email to 40m list and a new interlock flag channel. Completed [ELOG 15424].

Replace failing UPS.

  • Two new Tripp Lite units on order, 110V and 230V [ELOG 15465].
  • Jordan will install them in the vacuum rack once received.
  • Once installed, Jon will come test the new units, set up communications, and integrate them into the interlock system following this plan [ELOG 15446].
  • Jon will move the pumps and other equipment to the new UPS units only after completing the above step.

Remove interlock dependencies on TP2/TP3 serial readbacks. Due to persistent glitching [ELOG 15140, ELOG 15392].

Unlike TP2 and TP3, the TP1 readbacks are real analog signals routed to Acromags. As these have caused us no issues at all, the plan is to eliminate dependence on the TP2/3 digital readbacks in favor of the analog controller outputs. All the digital readback channels will continue to exist, but the interlock system will no longer depend on them. This will require adding 2 new sinking BI channels each for TP2 and TP3 (for a total of 4 new channels). We have 8 open Acromag XT1111 channels in the c1vac system [ELOG 14493], so the new channels can be accommodated. The below table summarizes the proposed changes.

Channel Type Status Description Interlock
C1:Vac-TP1_current AI exists Current draw (A) keep
C1:Vac-TP1_fail BI exists Critical fault has occurred keep
C1:Vac-TP1_norm BI exists Rotation speed is within +/-10% of set point new
C1:Vac-TP2_rot soft exists Rotation speed (krpm) remove
C1:Vac-TP2_temp soft exists Temperature (C) remove
C1:Vac-TP2_current soft exists Current draw (A) remove
C1:Vac-TP2_fail BI new Critical fault has occurred new
C1:Vac-TP2_norm BI new Rotation speed is >80% of set point new
C1:Vac-TP3_rot soft exists Rotation speed (krpm) remove
C1:Vac-TP3_temp soft exists Temperature (C) remove
C1:Vac-TP3_current soft exists Current draw (A) remove
C1:Vac-TP3_fail BI new Critical fault has occurred new
C1:Vac-TP3_norm BI new Rotation speed is >80% of set point new
  15501   Mon Jul 27 15:48:36 2020 JonSummaryVACVacuum parts ordered

To carry out the next steps of the vac refurbishment plan [ELOG 15499], I've ordered parts necessary for interfacing the UPS units and the analog TP2/3 controller outputs with c1vac. The purchase list is appended to the main BHD list and is located here. Some parts we already had in the boxes of Acromag materials. Jordan is gathering what we do already have and staging it on the vacuum controls console table - please don't move them or put them away.

Quote:

Replace failing UPS.

Remove interlock dependencies on TP2/TP3 serial readbacks. Due to persistent glitching [ELOG 15140, ELOG 15392].

  15566   Wed Sep 9 20:52:45 2020 ranaSummaryIOOwandering line in IMC

since the summary pages are working again, I was clicking through and noticed that there's a wandering peak in the whitened IMC spectrogram that goes from 10-30 Hz over the course of a day.

https://nodus.ligo.caltech.edu:30889/detcharsummary/day/20200909/ioo/

anyone know what this is ?

  15587   Sat Sep 19 23:59:22 2020 anchalSummaryALSALS noise budget update

Setting the record straight

I found out an error I did in copying some control model values from Kiwamu's matlab code. On fixing those, we get a considerably reduced amount of total noise. However, there was still an unstable region around the unity gain frequency because of a very small phase margin. Attachment 3 shows the noise budget, ALS open-loop transfer function, and AUX PDH open-loop transfer function with ALS disengaged. Attachment 4 is the yaml file containing all required zpk values for the control model used. Note that the noise budget shows out-of-loop residual arm length fluctuations with respect to PSL frequency. The RMS curve on this plot is integrated for the shown frequency region.


Trying to fix the unstable region

Adding two more poles at 100 Hz in the ALS digital filter seems to work in making the ALS loop stable everywhere and additionally provides a steeper roll-off after 100 Hz. Attachment 1 shows the noise budget, ALS open-loop transfer function, and AUX PDH open-loop transfer function with ALS disengaged. Attachment 2 is the yaml file containing all required zpk values for the control model used. Note that the noise budget shows out-of-loop residual arm length fluctuations with respect to PSL frequency. The RMS curve on this plot is integrated for the shown frequency region.

But is it really more stable?

  • I tried to think about it from different aspects. One thing is sure that  1+G_{OL} remains greater than 1 in all of the frequency region plotted for. This is also evident in the common-mode to residual noise transfer function which shows no oscillation peaks and is a clean mirror image of the open-loop transfer function (See Attachment 1, page 2).
  • Another way is to look for the phase margin. This is a little controversial way of checking stability. For clarity, the open-loop transfer function I'm plotting does not contain the '-1' feedback in it. So the bad phase value at unity gain frequency is -180 degrees (or 180 degrees) for us. I've taken the difference from the closest side and got 76.2 degrees of phase margin.
  • Another way I checked was by plotting a Nyquist plot for the open-loop transfer function. It is said that if the contour does not encircle the point '-1' in the real axis, then the loop would be stable even if the f_{180} < f_{UGF} where f_{180} is the frequency where phase lag becomes -180 degrees at the lowest frequency. For us, f_{180} is at 1 Hz because of the test mass actuator pole. But I have verified that the Nyquist contour of the open-loop transfer function does not encircle '-1' point. I have not uploaded the Nyquist plot as it is not straight forward to plot. Because of large dc gain, it covers a large region and one needs to zoom in and out to properly follow what the contour is really doing. I didn't get time to make insets for it.

Is this close to reality?

For that, we'll have to take present noise source estimates but Gautum vaguely confirmed that this looked more realistic now 'shape-wise'. If I remember correctly, he mentioned that we currently can achieve 8 pm of residual rms motion in the arm cavity with respect to the PSL frequency. So we might be overestimating our loop's capability or underestimating some noise source. More feedback on this welcome and required.


Additional Info:

The code used to calculate the transfer functions and plot them is in the repo 40m/ALS/noiseBudget

Attachment 5 here shows a block diagram for the control loop model used. Output port 'Res_Disp' is used for referring all the noise sources at the residual arm length fluctuation in the noise budget. The open-loop transfer function for ALS is calculated by -(ALS_DAC->ALS_Out1 / ALS_DAC->ALS_Out2) (removing the -1 negative feedback by putting in the negative sign.) While the AUX PDH open-loop transfer function is calculated by python controls package with simple series cascading of all the loop elements.

 

 

Attachment 1: ALS_nb_ExtraPoles.pdf
ALS_nb_ExtraPoles.pdf ALS_nb_ExtraPoles.pdf ALS_nb_ExtraPoles.pdf
Attachment 2: ALS_controls.yaml
# -----------------------------------------------------------------------------
# AUX
# -----------------------------------------------------------------------------
## Cavity Pole
C_AUX:
  p: 1.8883e+04
  k: 1.1865e+05

H_AUX:
  z: 0
... 109 more lines ...
Attachment 3: ALS_nb_Kiwamus_Values.pdf
ALS_nb_Kiwamus_Values.pdf ALS_nb_Kiwamus_Values.pdf ALS_nb_Kiwamus_Values.pdf
Attachment 4: ALS_controls_Kiwamus_Values.yaml
# -----------------------------------------------------------------------------
# AUX
# -----------------------------------------------------------------------------
## Cavity Pole
C_AUX:
  p: 1.8883e+04
  k: 1.1865e+05

H_AUX:
  z: 0
... 107 more lines ...
Attachment 5: ALS_simulink_model.svg
ALS_simulink_model.svg
  15589   Sun Sep 20 23:12:13 2020 ranaSummaryALSALS noise budget update

I think the digital loop in the ALS budget is too optimistic. You have to include all the digital delays and anti-aliasing filters to get the real response.

aslo, I recommend grabbing some of the actual spectra from the in-lock times with nds and using the calibrated spectra as inputs to this mode. Although we don't have good models of the stack, you can sort of infer it by using the calibrated seismometer data and the calibrated MC_F or MC_L channels (for IMC) or XARM/YARM signals for those.

  15593   Tue Sep 22 00:14:43 2020 anchalSummaryALSALS noise budget update

This is not a reply to comments given to the last post; Still working on incorporating those suggestions.


Trying out a better filter from scratch

Rana suggested looking first at what needs to be suppressed and then create a filter suited for the noise from scratch. So I discarded all earlier poles and zeros and just kept the resonant gains in the digital filter. With that, I found that all we need is three poles at 1 Hz and a gain of 8.1e5 gives the lowest RMS noise value I could get.

Now there can be some practical reasons unknown to me because of which this filter is not possible, but I just wanted to put it here as I'll add the actual noise spectra into this model now.


Few questions:

  • What anti-aliasing filters are used in ALS?
  • Is the digital delay fixed to a constant upper limit or is it left to change as per filters? I have already used a 470 us delay (modeled with Pade 4th order approximation).
  • I could not find a good place where channel names are listed with corresponding meaning. Where can I find them?
  • Is there a channel which keeps a record of lock status? In short, how do I find the in-lock times
Attachment 1: ALS_NoiseBudgetUpdate.pdf
ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf
Attachment 2: ALS_controls.yaml
# -----------------------------------------------------------------------------
# AUX
# -----------------------------------------------------------------------------
## Cavity Pole
C_AUX:
  p: 1.8883e+04
  k: 1.1865e+05

H_AUX:
  z: 0
... 106 more lines ...
  15594   Tue Sep 22 12:14:42 2020 ranaSummaryALSALS noise budget update

This ALS loop is not stable. Its one of those traps that comes from using only the Bode plot to estimate the loop stability. You have to also look at the time domain response - you can look at my feedback lecture for the SURF students for some functions.

  15601   Wed Sep 23 11:13:49 2020 anchalSummaryALSALS noise budget update

Yes, that loop was unstable. I started using the time domain response to check for the stability of loops now. I have been able to improve the filter slightly with more suppression below 20 Hz but still poor phase margin as before. This removes the lower frequency region bump due to seismic noise. The RMS noise improved only slightly with the bump near UGF still the main contributor to the noise.


For inclusion of real spectra, time delays and the anti-aliasing filters, I still need some more information.

Few questions:

  • What anti-aliasing filters are used in ALS?
  • Is the digital delay fixed to a constant upper limit or is it left to change as per filters? I have already used a 470 us delay (modeled with Pade 4th order approximation).
  • I could not find a good place where channel names are listed with corresponding meaning. Where can I find them?
  • Is there a channel which keeps record of lock status? In short, how do I find the in-lock times

Additional Info:

The code used to calculate the transfer functions and plot them is in the repo 40m/ALS/noiseBudget

Related Elog post with more details: 40m/15587

Attachment 1: ALS_NoiseBudgetUpdate.pdf
ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf
Attachment 2: ALS_controls.yaml
# -----------------------------------------------------------------------------
# AUX
# -----------------------------------------------------------------------------
## Cavity Pole
C_AUX:
  p: 1.8883e+04
  k: 1.1865e+05

H_AUX:
  z: 0
... 113 more lines ...
  15617   Wed Oct 7 16:56:23 2020 anchalSummaryALSALS noise budget update - Updated AUX PDH Loop values

AUX PDH Loop update

I used D1400293 to get the latest logged details about the universal PDH box used to lock the green laser at X end. The uPDH_X_boost.fil file present there was used to obtain the control model for this box. See attachment one for the code used. Since there is a variable gain stage in the box, I tuned the gain of the filter model F_AUX in ALS_controls.yml to get the maximum phase margin in the PDH lock of the green laser. Unity gain frequency of 8.3 kHz can be achieved in this loop and as Gautam pointed out earlier, it can't be increased much further without changes in the box.

ALS Noise Budget update

The ALS control model remains stable with a reduction in total estimate noise because of the above update. There are few things to change though:

  • This model is for a single arm locking where the beatnote signal between green laser and frequency doubled main laser is fed back to ETM at X end. Currently, Gautam is using a different scheme to lock where the feedback is sent to PSL-MC loop and the beat is taken between IR signals.
  • In the LSC controls, I couldn't find a place where the digital ALS filter I have been optimizing and Kiwamu used, was placed. From what I gathered, after demodulation of beat note signal, a digital PLL is employed and the error signal is few to the Servo Filters directly. I might be missing some script which specifically switches on a particular set of filter modules in the XARM/YARM path when arms are locked through ALS.
  • Another straight forward job for me is to verify the PSL-MC loop parameters with he TTFSS used. I'll do this next.
Attachment 1: Extract_X_AUX_PDH_Model.zip
Attachment 2: ALS_NoiseBudgetUpdate.pdf
ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf
  15619   Thu Oct 8 11:59:52 2020 ranaSummaryALSALS noise budget update - Updated AUX PDH Loop values

For all the loops where we drive the NPRO PZT, there is some notch/resonance feature due to the PZT mechanical resonance. In the IMC loop this limits the PZT/EOM crossove to be less than 25 kHz. I don't have a model for this, btu it should be included.

If you hunt through the elogs, people have measured the TF of ALS NPRO PZT to phase/frequency. Probably there's also a measured ALS PDH loop somewhere that you could use to verify your model.

  15622   Fri Oct 9 18:32:14 2020 anchalSummaryALSALS noise budget update - Updated AUX PDH Loop values

The only two PZT Phase modulation transfer function measurements I could find are 40m/15206 and 40m/12077. Both these measurements were made to find a good modulation frequency and do not go below 50 kHz. So I don't think these will help us. We'll have to do a frequency transfer function measurement at lower frequencies.
I'm still looking for ALS PDH loop measurements to verify the model. I found this 40m/15059 but it is only near the UGF. The UGF measured here though looks very similar to the model prediction. A bit older measurement in 2017 was this 40m/13238 where I assume by ALS OLTF gautum meant the green laser PDH OLTF. It had similar UGF but the model I have has more phase lag, probably because of a 31.5 kHz pole which comes at U7 through the input low pass coupling through R28, C20 and R29 (See D1400293)

If the green laser is not being used, can I go and take some of these measurements myself?

  15626   Wed Oct 14 17:03:55 2020 anchalSummaryALSALS noise budget update - Added whitening filter for ADC

Koji recommended that I can add whitening filters to suppress ADC noise easily. I added a filter before ADC in ALS loop with 4 zeros at 1.5 Hz and 4 poles at 100 Hz and added a reversed filter in the digital filter of ALS. This did not change the performance of the loop but significantly reduced the contribution of ADC noise above 1 Hz. One can see ALS_controls.yaml for the filter description. Please let me know if this does not make sense or there is something that I have overlooked.

Now, the dominant noise source is DFD noise below 100 Hz and green laser frequency noise above that. For DFD noise, I used data dating back to Kiwamu's paper. The noise contribution from DFD in the model is lower than the latest measured ALS noise budget post on elog. I'll look further into design details and noise of DFD.


Code, data, and schematics

Attachment 1: ALS_NoiseBudgetUpdate.pdf
ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf ALS_NoiseBudgetUpdate.pdf
  15629   Thu Oct 15 13:48:58 2020 anchalSummaryGeneralLab Entry Notification

I entered 40m today at around 1:20 pm and left by 1:45 pm. I entered 104 through the machine shop entry. I did the following:

  • I took photos and videos of the PSL table with lights on.
  • I uncovered the AP table, took photos and video, and covered it back.
  • I went to the X End table and took a video without opening the enclosure.
  • Apart from flipping light switches, nothing else should have changed.
ELOG V3.1.3-