ID |
Date |
Author |
Type |
Category |
Subject |
14136
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Mon Aug 6 00:26:21 2018 |
gautam | Update | CDS | More CDS woes | I spent most of today fighting various CDS errors.
- I rebooted c1lsc around 3pm, my goal was to try and do some vertex locking and figure out what the implications were of having only ~30% power we used to have at the AS port.
- Shortly afterwards (~4pm), c1lsc crashed.
- Using the reboot script, I was able to bring everything back up. But the DC lights on c1sus models were all red, and a 0x4000 error was being reported.
- This error is indicative of some timing issue, but all the usual tricks (reboot vertex FEs in various order, restart the mx_streams etc) didn't clear this error.
- I checked the Tempus GPS unit, that didn't report any obvious problems (i.e. front display was showing the correct UTC time).
- Finally, I decided to shut down all watchdogs, soft reboot all the FEs, soft reboot FB, power cycle all expansion chassis.
- This seems to have done the trick - I'm leaving c1oaf disabled for now.
- The remaining red indicators are due to c1dnn and c1oaf being disabled.
Let's see how stable this configuration is. Onto some locking now... |
Attachment 1: CDSoverview.png
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14139
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Mon Aug 6 14:38:38 2018 |
gautam | Update | CDS | More CDS woes | Stability was short-lived it seems. When I came in this morning, all models on c1lsc were dead already, and now c1sus is also dead (Attachment #1). Moreover, MC1 shadow sensors failed for a brief period again this afternoon (Attachment #2). I'm going to wait for some CDS experts to take a look at this since any fix I effect seems to be short-lived. For the MC1 shadow sensors, I wonder if the Trillium box (and associated Sorensen) failure somehow damaged the MC1 shadow sensor/coil driver electronics.
Quote: |
Let's see how stable this configuration is. Onto some locking now...
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Attachment 1: CDScrash.png
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Attachment 2: MC1failures.png
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14140
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Mon Aug 6 19:49:09 2018 |
gautam | Update | CDS | More CDS woes | I've left the c1lsc frontend shutdown for now, to see if c1sus and c1ioo can survive without any problems overnight. In parallel, we are going to try and debug the MC1 OSEM Sensor problem - the idea will be to disable the bias voltage to the OSEM LEDs, and see if the readback channels still go below zero, this would be a clear indication that the problem is in the readback transimpedance stage and not the LED. Per the schematic, this can be done by simply disconnecting the two D-sub connectors going to the vacuum flange (this is the configuration in which we usually use the sat box tester kit for example). Attachment #1 shows the current setup at the PD readout board end. The dark DC count (i.e. with the OSEM LEDs off) is ~150 cts, while the nominal level is ~1000 cts, so perhaps this is already indicative of something being broken but let's observe overnight. |
Attachment 1: IMG_7106.JPG
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14142
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Tue Aug 7 11:30:46 2018 |
gautam | Update | CDS | More CDS woes | Overnight, all models on c1sus and c1ioo seem to have had no stability issues, supporting the hypothesis that timing issues stem from c1lsc. Moreover, the MC1 shadow sensor readouts showed no negative values over a ~12hour period. I think we should just observe this for another day, in any case I don't think there is any urgent IFO related activity scheduled. |
14143
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Tue Aug 7 22:28:23 2018 |
gautam | Update | CDS | More CDS woes | I am starting the c1x04 model (IOP) on c1lsc to see how it behaves overnight.
Well, there was apparently an immediate reaction - all the models on c1sus and c1ioo reported an ADC timeout and crashed. I'm going to reboot them and still have c1x04 IOP running, to see what happens.
[97544.431561] c1pem: ADC TIMEOUT 3 8703 63 8767
[97544.431574] c1mcs: ADC TIMEOUT 1 8703 63 8767
[97544.431576] c1sus: ADC TIMEOUT 1 8703 63 8767
[97544.454746] c1rfm: ADC TIMEOUT 0 9033 9 8841
Quote: |
Overnight, all models on c1sus and c1ioo seem to have had no stability issues, supporting the hypothesis that timing issues stem from c1lsc. Moreover, the MC1 shadow sensor readouts showed no negative values over a ~12hour period. I think we should just observe this for another day, in any case I don't think there is any urgent IFO related activity scheduled.
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14146
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Wed Aug 8 23:03:42 2018 |
gautam | Update | CDS | c1lsc model started | As part of this slow but systematic debugging, I am turning on the c1lsc model overnight to see if the model crashes return. |
14147
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Wed Aug 8 23:06:59 2018 |
gautam | Update | SUS | Another low noise bias path idea | Today while Rich Abbott was here, Koji and I had a brief discussion with him about the HV amplifier idea for the coil driver bias path. He gave us some useful tips, perhaps most useful being a topology that he used and tested for an aLIGO ITM ESD driver which we can adapt to our application. It uses a PA95 high voltage amplifier which differs from the PA91 mainly in the output voltage range (up to 900V for the former, "only" 400V for the former. He agrees with the overall design idea of
- Having a LN opamp with the HV amp inside the feedback loop for better voltage noise at low frequencies.
- Having a passive RC network at the output of the HV amp to filter out noise at high frequencies.
He also gave some useful suggestions like
- Using the front panel of the box that as a heatsink for the HV amps.
- Testing the stability of the nested opamp loop by "pinging" the output of the opamp with some pulses from a function generator and monitoring the response to this perturbation on a scope.
I am going to work on making a prototype version of this box for 5 channels that we can test with ETMX. I have been told that the coupling from side coil to longitudinal motion is of the order of 1/30, in which case maybe we only need 4 channels. |
14148
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Thu Aug 9 02:12:13 2018 |
gautam | Update | COC | South East or West? | Summary:
For operating the SRC in the "Signal-Recycled" tuning, the SRC macroscopic length needs to be ~4.04m (compared to the current value of ~5.399m), assuming we don't do anything fancy like change the modulation frequencies and not transmit through the IMC. We're putting together a notebook with all the calculations, but today I was thinking about what the signal extraction path should be, specifically which chamber the SRM should be in. Just noting down the thoughts I had here while they're fresh in my head, all this has to be fleshed out, maybe I'm making this out to be more of a problem than it actually is.
Details:
- For the current modulation frequencies, if we want the reosnance conditions such that the f2 sideband is resonant in the SRC (but not f1, i.e. small Schnupp asymmetry regime) while the carrier is resonant in the arms (required for good sensing of the SRC length), the macroscopic length of the SRC needs to be changed to ~4.04m.
- Practically, this means that the folded SRC would only have one folding mirror (SR2).
- There is a shorter SRC length of ~1.something metres which would work, but that would involve changing the relative position between ITMs and BS (currently ~2.3m) so I reject that option for now.
- So the SR2 would be roughly where it is right now, ~20cm from the BS.
- The question then becomes, where do we direct the reflection from the SR2? We need an optical path length of ~1.5m from SR2. So options are
- ITMY table (East)
- ITMX table (South)
- IMC table (West)
- Moreover, after the SRM, we have to accommodate:
- Some kind of pickoff for in-air PDs.
- OFI.
- OMC MMT.
- OMC.
- Some kind of CBA (as of now I think going to the ITMY table is the best option):
Option |
Advantages |
Disadvantages |
ITMY |
- Easy to direct beam from BS/PRM chamber to the ITMY table (i.e. we don't have to worry too much about avoiding other optics in the path etc).
- Ease of access to chamber, ease of working in there.
- ITMY table probably has the most room to work out an OFI + OMC MMT + OMC solution.
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- AS beam extraction to air will be more complicated, possibly have to do it on ITMY optical table.
- Not sure if the ITMY table can accommodate all of the output optics subsystems I listed above.
- Routing the LO beam to this table would be tricky I guess.
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ITMX |
- Routing the LO beam for homodyne detection is probably easiest in this chamber.
- Allows for small AoI on folding mirror, reducing the impact of astigmatism.
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- Pain to work in this chamber because of IMC tube.
- Steering beam from SR2 to ITMX table means threading the needle between PRM and PR3 possibly.
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IMC |
- Probably allows the use of (almost) the entire existing OMC chamber for the output optics (OFI, OMC MMT, OMC).
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- IMC table is crowded (2 SOS towers, several steering optics for the input beam, input faraday).
- Not sure what is the performance of the seismic isolation stacks on these tables vs the larger optical tables.
- Painful to work in these smaller chambers.
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14149
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Thu Aug 9 12:31:13 2018 |
gautam | Update | CDS | CDS status update | The model seems to have run without issues overnight. Not completely related, but the MC1 shadow sensor signals also don't show any abnormal excursions to negative values in the last 48 hours. I'm thinking about re-connecting the satellite box (but preserving the breakout setup at 1X6 for a while longer) and re-locking the IMC. I'll also start c1ass on the c1lsc frontend. I would say that the other models on c1lsc (i.e. c1oaf, c1cal, c1daf) aren't really necessary for basic IFO operation.
Quote: |
As part of this slow but systematic debugging, I am turning on the c1lsc model overnight to see if the model crashes return.
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14150
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Thu Aug 9 12:40:14 2018 |
gautam | Update | SUS | ETMX trip follow-up | A brief follow-up on this since we discussed this at the meeting yesterday: the attached DV screenshot shows the full 2k data for a period of 2 seconds starting just before the watchdog tripped. It is clear that the timescale of the glitch in the UL channel is much faster (~50 ms) compared to the (presumably mechanical) timescale seen in the other channels of ~250 ms, with the step also being much smaller (a few counts as opposed to the few thousand counts seen in the UL channel, and I guess 1 OSEM count ~ 1 um). All this supports the hypothesis that the problem is electrical and not mechanical (i.e. I think we can rule out the Acromag sending a glitchy signal to the coil and kicking the optic). The watchdog itself gets tripped because the tripping condition is the RMS of the shadow sensor outputs, which presumably exceeds the set threshold when UL glitches by a few thousand counts. |
Attachment 1: ETMXglitch.png
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14151
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Thu Aug 9 22:50:13 2018 |
gautam | Update | CDS | AlignSoft script modified | After this work of increasing the series resistance on ETMX, there have been numerous occassions where the insufficient misalignment of ETMX has caused problems in locking vertex cavities. Today, I modified the script (located at /opt/rtcds/caltech/c1/medm/MISC/ifoalign/AlignSoft.py) to avoid such problems. The way the misalign script works is to write an offset value to the "TO_COIL" filter bank (accessed via "Output Filters" button on the Suspension master MEDM screen - not the most intuitive place to put an offset but okay). So I just increased the value of this offset from 250 counts to 2500 counts (for ETMX only). I checked that the script works, now when both ETMs are misaligned, the AS55Q signal shows a clean Michelson-like sine wave as it fringes instead of having the arm cavity PDH fringes as well .
Note that the svn doesn't seem to work on the newly upgraded SL7 machines: svn status gives me the following output.
svn: E155036: Please see the 'svn upgrade' command
svn: E155036: Working copy '/cvs/cds/rtcds/userapps/trunk/cds/c1/medm/MISC/ifoalign' is too old (format 10, created by Subversion 1.6)
Is it safe to run 'svn upgrade'? Or is it time to migrate to git.ligo.org/40m/scripts? |
Attachment 1: MichelsonFringing.png
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14152
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Fri Aug 10 01:10:56 2018 |
gautam | Update | LSC | Some vertex locking restored | For the first time after the whirlwind vent, I managed to lock the PRMI.
- First, I did POX/POY locking, dither aligned the arms to maximize TRX and TRY.
- Next, I misaligned the ETM and tested the Michelson locking
- Since we've lost ~70% of power on the AS55 PD, I set the whitening gain for AS55 I and Q channels to +6dB (old value was 0dB).
- worked alright. In this new config, the peak-to-peak Michelson fringe count is ~80 cts, while I reported ~60cts-pp a couple of months ago, so all seems good on that front.
- But the config script in the IFOconfigure MEDM screen somehow doesn't set the AS55_Q ----> MICH_A element in the LSC input matrix anymore.
- I edited the .snap file for this configuration to set the relevant matrix element EPICS channel to +1.0.
- I also edited the overall loop gain for this configuration from +30 to +2 (for bright fringe, use -2 for dark fringe).
- Feeling adventerous, I decided to try PRMI in the carrier resonant tuning (to be clear, PRCL on REFL11_I, MICH on AS55_Q).
- Finding the REFL spot on the camera took a while since the PRM has been macroscopically misaligned for the mode-scanning
- Went out to the table and centered the REFL beam onto REFL11 and REFL55 PDs - didn't need much tweaking, which is a good sign, since we shouldn't have screwed anything up on the symmetric side by any of the vent activities.
- Restored PRMI locking using the IFOconfigure MEDM screen - lock caught almost immediately.
- Ran the dither alignment servos for MICH and PRCL - BS needed a bit of encouragement to make the dark spot dark, but POP has been pretty stable over ~15mins.
- I didn't take any loop transfer functions, to do.
I don't have the energy to make a DRMI attempt tonight - but the signs are encouraging. I'd like to use the IFO in the next few days to try and recover DRMI locking. The main concern is that the optical path on the AS beam has changed by ~0.3m I estimate. So the demod phase for AS55 may need to be adjusted, but the change due to optical path length only should be ~10degrees so the DRMI locking with the old settings should still work. Perhaps we also want to scan the PRC and SRC with the phase information from the Trans/Refl transfer functions as well.
Don't want to jinx it, but the c1lsc FE models have been stable. Tomorrow, I'd like to re-enable c1cal, since it has some useful channels for NBing. Could c1daf/c1oaf which have significant amounts of custom C code be the culprits? |
Attachment 1: PRMIcarrier.png
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14154
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Fri Aug 10 16:43:50 2018 |
gautam | Configuration | Upgrade | Parts list for BHD | Can we use the leakage beam from MMT2 on the OMC table as the LO beam? I can't find the spec for this optic, but the leakage beam was clearly visible on an IR card even with the IMC locked with 100 mW input power so presumably there's enough light there, and this is a cavity transmission beam which presumably has some HOM content filtered out.
Quote: |
My current thought is to use the MC reflection, the beam that heads from MC1 to MCR1, as the LO beam
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14157
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Mon Aug 13 11:44:32 2018 |
gautam | Update | Computer Scripts / Programs | Patch updates on nodus | Larry W said that some security issues were flagged on nodus. So I ran
sudo yum upgrade --exclude=elog-3.1.3-2.el7.x86_64
on nodus. The exclude flag is because there were some conflicts related to that particular package. Hopefully this has fixed the problem. It's been a while since the last update, which was in January of this year.
controls@nodus|~> sudo yum history
Loaded plugins: langpacks
ID | Command line | Date and time | Action(s) | Altered
-------------------------------------------------------------------------------
29 | upgrade --exclude=elog-3 | 2018-08-13 11:36 | E, I, U | 136 EE
28 | install yum-utils | 2018-08-13 11:31 | Update | 1
27 | install nmap | 2018-06-29 01:57 | Install | 2
26 | install grace | 2018-05-31 16:52 | Install | 11
25 | install https://dl.fedor | 2018-05-31 16:51 | Install | 1
24 | install perl-Digest-SHA1 | 2018-05-31 15:34 | Install | 1
23 | install python-devel | 2018-01-13 15:33 | Install | 1
22 | install gcc | 2018-01-13 15:32 | Install | 6
21 | install git | 2018-01-12 18:11 | Install | 4
20 | update | 2018-01-12 18:01 | I, U | 39
19 | install motif | 2018-01-05 17:35 | Install | 3
18 | install sendmail sendmai | 2017-12-03 05:11 | Install | 6
17 | install vim | 2017-11-21 18:12 | Install | 3
16 | reinstall mod_dav_svn | 2017-11-21 17:40 | Reinstall | 1
15 | install mod_dav_svn | 2017-11-21 17:39 | Install | 1
14 | install subversion | 2017-11-21 15:36 | Install | 2
13 | -y install php | 2017-11-20 22:15 | Install | 4
12 | install links | 2017-11-20 19:10 | Install | 2
11 | install openssl098e.i686 | 2017-11-18 18:28 | Install | 1
10 | install openssl-libs.i68 | 2017-11-18 18:26 | Install | 11
history list |
14160
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Tue Aug 14 00:27:55 2018 |
gautam | Update | LSC | Locking prep | In preparation for attempting some DRMI locking, I did the following:
- Slow machine reboots for unresponsive c1psl, c1susaux and c1iscaux. The latter requried a manual burtrestore to recover the usual LSC PD whitening settings.
- Shuttered AUX laser (which was on Standby anyways) - we should really install a remotely controllable shutter for this on the AS table.
- Re-aligned PMC (half turn of knob in yaw, full turn in pitch) - IMC transmission 15,000cts ---> 15,600cts.
- Squished sat. box cables at ITMX and ETMX.
Not related to this work, but I turned the Agilent NA off since we aren't using it immediately. |
14161
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Tue Aug 14 00:50:32 2018 |
gautam | Update | ASS | X arm ASS still not quite right? | While working on the single arm alignment, I noticed that today, i was able to get the X arm transmission back to ~1.22, and the GTRX to 0.52. These are closer to the values I remember from prior to the vent. Running the dither alignment promptly degrades both the green and IR transmissions. Since the pianosa SL7 upgrade, I can't use the sensoray to capture images, but to me, the spot looks a little off-center in Yaw on ETMX in this configuration, I've tried to show this in the phone grab (Atm #2). Maybe indicative of clipping somewhere upstream of ITMX?
Anyways, I'm pushing onwards for now, something to check out in the daytime.
Quote: |
[koji, gautam]
After I effected the series resistance change for ETMX, the X arm ASS didn't work (i.e. IR transmission would degrade if the servo was run). Today, we succeeded in recovering a functional ASS servo .
We then tried to maximize GTRX using the PZT mirrors, but were only successful in reaching a maximum of 0.41. The value I remember from before the vent was 0.5, and indeed, with the IR alignment not quite optimized before we began this work, I saw GTRX of 0.48. But the IR dither servo signals indicate that the cavity axis may have shifted (spot position on the ITM, which is uncontrolled, seems to have drifred significantly, the Pitch signal doesn't stay on the StripTool scale anymore). So we may have to double check that the transmitted beam isn't falling off the GTRX DC PD.
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Attachment 1: POXPOY.png
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Attachment 2: IMG_7108.JPG
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14162
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Tue Aug 14 02:01:12 2018 |
gautam | Update | LSC | DRMI locking - partial success | After tweaking the AS55 demod phase, SRM alignment, triggering settings, I got a few brief DRMI locks in tonight, I'm calling it a success (though this isn't really robust yet). The main things to do now are:
- turn on all the boosts on the LSC loops - today I only managed to trigger the PRCL boost filters successfully without blowing up the lock.
- measure all 3 loops, tweak gain as necessary.
- Run some sensing lines, tune the demod phase.
- The SRCL triggering is strange to me - SRCL loop is currently triggered on POP22_I, but the 2f1 buildup in the symmetric side does not say anything about the linearity of the SRCL error signal? Or are we just hoping the SRM is in the correct place and engaging the servo? Anyway, this setting seems to work but perhaps once the locking is more robust the triggering can be fixed.
- do a quick NB - I expect the main change to be that the AS55_Q dark noise contribution would have gone up on account on the reduced amount of light at this port.
I think the main IFO characterization remaining to be done to determine the status of the IFO post vent is to measure the losses of the arm cavities. IMO, we will need to certainly fix the clipping at ETMY before we attempt some serious locking. |
Attachment 1: DRMI.png
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14164
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Wed Aug 15 12:15:24 2018 |
gautam | Update | COC | Macroscopic SRC length for SR tuning | Summary:
It looks like we can have a stable SRC of length 4.044 m without getting any new mirrors, so this is an option to consider in the short-term.
Details:
- The detailed calculations are in the git repo.
- The optical configuration is:
- A single folding mirror approximately at the current SR3 location.
- An SRM that is ~1.5m away from the above folding mirror. Which table the SRM goes on is still an open question, per the previous elog in this thread.
- The SRC length is chosen to be 4.044 m, which is what the modeling tells us we need for operating in the SR tuning instead of RSE.
- Using this macroscopic length, I found that we could use a single folding mirror in the SRC, and that the existing (convex) G&H folding mirrors, which have a curvature of -700m, happily combine with our existing SRM (concave with a curvature of 142m) to give reasonable TMS and mode-matching to the arm cavity.
- The existing SRM transmission of 10% may not be optimal but Kevin's calculations say we should still be able to see some squeezing (~0.8 dB) with this SRM.
- Attachment #1 - corner plot of the distribution of TMS for the vertical and horizontal modes, as well as the mode-matching (averaged between the two modes) between the SRC and arm cavity.
- Attachment #2 - histograms of the distributions of RoCs and lengths used to generate Attachment #1. The distributions were drawn from i.i.d Gaussian pdfs.
gautam 245pm: Koji pointed out that the G&H mirrors are coated for normal incidence, but looking at the measurement, it looks like the optic has T~75ppm at 45 degree incidence, which is maybe still okay. Alternatively, we could use the -600m SR3 as the single folding mirror in the SRC, at the expense of slightly reduced mode-matching between the arm cavity and SRC. |
Attachment 1: SRC_MCMC_shortTerm.pdf
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Attachment 2: SRC_dists_shortTerm.pdf
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14165
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Wed Aug 15 19:18:07 2018 |
gautam | Update | SUS | Another low noise bias path idea | I took another pass at this. Here is what I have now:
Attachment #1: Composite amplifier design to suppress voltage noise of PA91 at low frequencies.
Attachment #2: Transfer function from input to output.
Attachment #3: Top 5 voltage noise contributions for this topology.
Attachment #4: Current noises for this topology, comparison to current noise from fast path and slow DAC noise.
Attachment #5: LISO file for this topology.
Looks like this will do the job. I'm going to run this by Rich and get his input on whether this will work (this design has a few differences from Rich's design), and also on how to best protect from HV incidents. |
Attachment 1: HV_Bias.pdf
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Attachment 2: HVamp_TF.pdf
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Attachment 3: HVamp_noises.pdf
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Attachment 4: currentNoises.pdf
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Attachment 5: HVamp.fil.zip
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14166
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Wed Aug 15 21:27:47 2018 |
gautam | Update | CDS | CDS status update | Starting c1cal now, let's see if the other c1lsc FE models are affected at all... Moreover, since MC1 seems to be well-behaved, I'm going to restore the nominal eurocrate configuration (sans extender board) tomorrow. |
14169
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Thu Aug 16 23:06:50 2018 |
gautam | Update | SUS | Another low noise bias path idea | I had a very fruitful discussion with Rich about this circuit today. He agreed with the overall architecture, but made the following suggestions (Attachment #1 shows the circuit with these suggestions incorporated):
- Use an Op27 instead of LT1128, as it is a more friendly part especially in these composite amplifier topologies. I confirmed that this doesn't affect the output voltage noise at 100 Hz, we will still limited by Johnson noise of the 15kohm series resistor.
- Take care of voltage distribution in the HV feedback path
- I overlooked the fact that the passive filtering stage means that the DC current we can drive in the configuration I posted earlier is 150V / 25kohm = 6mA, whereas we'd like to be able to drive at least 10 mA, and probably want the ability to do 12 mA to leave some headroom.
- At the same time, the feedback resistance shouldn't be too small such that the PA91 has to drive a significant current in the feedback path (we'd like to save that for the coil).
- Changing the supply voltage of the PA91 from 150 V to 320 V, and changing the gain to x30 instead of x15 (by changing the feedback resistor from 14kohm to 29kohm), we can still drive 12 mA through the 25 kohms of series resistance. This will require getting new HV power supplies, as the KEPCO ones we have cannot handle these numbers.
- The current limiting resistor is chosen to be 25ohms such that the PA91 is limited to ~26 mA. Of this, 300V / 30kohm ~ 10 mA will flow in the feedback path, which means under normal operation, 12 mA can safely flow through the coils.
- Rich recommended using metal film resistors in the high voltage feedback path. However, these have a power rating, and also a voltage rating. By using 6x 5kohm resistors, the max power dissipated in each resistor is 50^2 / 5000 ~ 0.5 W, so we can get 0.6 W (or 1W?) rated resistors which should do the job. I think the S102K or S104K series will do the job.
- Add a voltage monitoring capability.
- This is implemented via a resistive voltage divider at the output of the PA91.
- We can use an amplifier stage with whitening if necessary, but I think simply reading off the voltage across the terminating resistor in the ladder will be sufficient since this circuit will only have DC authority.
- Make a Spice model instead of LISO, to simulate transient effects.
- I've made the model, investigating transients now.
- High voltage precautions:
- When doing PCB layout, ensure the HV points have more than the default clearance. Rich recommends 100 mils.
- Use a dual-diode (Schottky) as input protection for the Op27 (not yet implemented in Spice model).
- Use a TVS diode for the moniotring circuit (not yet implemented in Spice model).
- Make sure resistors and capacitors that see high voltage are rated with some safety margin.
- Consider using the PA95 (which Rich has tested and approves of) instead of the PA91. Does anyone have any opinions on this?
If all this sounds okay, I'd like to start making the PCB layout (with 5 such channels) so we can get a couple of trial boards and try this out in a couple of weeks. Per the current threat matrix and noises calculated, coil driver noise is still projected to be the main technical noise contribution in the 40m PonderSqueeze NB (more on this in a separate elog).
Quote: |
Looks like this will do the job. I'm going to run this by Rich and get his input on whether this will work (this design has a few differences from Rich's design), and also on how to best protect from HV incidents.
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Attachment 1: HVamp_schem.PDF
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Attachment 2: Hvamp.zip
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14192
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Tue Sep 4 10:14:11 2018 |
gautam | Update | CDS | CDS status update | c1lsc crashed again. I've contacted Rolf/JHanks for help since I'm out of ideas on what can be done to fix this problem.
Quote: |
Starting c1cal now, let's see if the other c1lsc FE models are affected at all... Moreover, since MC1 seems to be well-behaved, I'm going to restore the nominal eurocrate configuration (sans extender board) tomorrow.
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14194
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Thu Sep 6 14:21:26 2018 |
gautam | Update | CDS | ADC replacement in c1lsc expansion chassis | Todd E. came by this morning and gave us (i) 1x new ADC card and (ii) 1x roll of 100m (2017 vintage) PCIe fiber. This afternoon, I replaced the old ADC card in the c1lsc expansion chassis, and have returned the old card to Todd. The PCIe fiber replacement is a more involved project (Steve is acquiring some protective tubing to route it from the FE in 1X6 to the expansion chassis in 1Y3), but hopefully the problem was the ADC card with red indicator light, and replacing it has solved the issue. CDS is back to what is now the nominal state (Attachment #1) and Yarm is locked for Jon to work on his IFOcoupling study. We will monitor the stability in the coming days.
Quote: |
(i) to replace the old generation ADC card in the expansion chassis which has a red indicator light always on and (ii) to replace the PCIe fiber (2010 make) running from the c1lsc front-end machine in 1X6 to the expansion chassis in 1Y3, as the manufacturer has suggested that pre-2012 versions of the fiber are prone to failure. We will do these opportunistically and see if there is any improvement in the situation.
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Attachment 1: CDSoverview.png
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Fri Sep 7 12:35:14 2018 |
gautam | Update | CDS | ADC replacement in c1lsc expansion chassis | Looks like the ADC was not to blame, same symptoms persist.
Quote: |
The PCIe fiber replacement is a more involved project (Steve is acquiring some protective tubing to route it from the FE in 1X6 to the expansion chassis in 1Y3), but hopefully the problem was the ADC card with red indicator light, and replacing it has solved the issue.
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Attachment 1: Screenshot_from_2018-09-07_12-34-52.png
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Mon Sep 17 12:28:19 2018 |
gautam | Update | IOO | PMC and IMC relocked, WFS inputs turned off | The PMC and IMC were unlocked. Both were re-locked, and alignment of both cavities were adjusted so as to maximize MC2 trans (by hand, input alignment to PMC tweaked on PSL table, IMC alignment tweaked using slow bias voltages). I disabled the inputs to the WFS loops, as it looks like they are not able to deal with the glitching IMC suspensions. c1lsc models have crashed again but I am not worrying about that for now.
9pm: The alignment is wandering all over the place so I'm just closing the PSL shutter for now. |
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Thu Sep 20 11:29:04 2018 |
gautam | Update | CDS | New PCIe fiber housed | [steve, yuki, gautam]
The plastic tubing/housing for the fiber arrived a couple of days ago. We routed ~40m of fiber through roughly that length of the tubing this morning, using some custom implements Steve sourced. To make sure we didn't damage the fiber during this process, I'm now testing the vertex models with the plastic tubing just routed casually (= illegally) along the floor from 1X4 to 1Y3 (NOTE THAT THE WIKI PAGE DIAGRAM IS OUT OF DATE AND NEEDS TO BE UPDATED), and have plugged in the new fiber to the expansion chassis and the c1lsc front end machine. But I'm seeing a DC error (0x4000), which is indicative of some sort of timing error (Attachment #1) **. Needs more investigation...
Pictures + more procedural details + proper routing of the protected fiber along cable trays after lunch. If this doesn't help the stability problem, we are out of ideas again, so fingers crossed...
** In the past, I have been able to fix the 0x4000 error by manually rebooting fb (simply restarting the daqd processes on fb using sudo systemctl restart daqd_* doesn't seem to fix the problem). Sure enough, seems to have done the job this time as well (Attachment #2). So my initial impression is that the new fiber is functioning alright .
Quote: |
The PCIe fiber replacement is a more involved project (Steve is acquiring some protective tubing to route it from the FE in 1X6 to the expansion chassis in 1Y3)
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Attachment 1: PCIeFiberSwap.png
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Attachment 2: PCIeFiberSwap_FBrebooted.png
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Thu Sep 20 16:19:04 2018 |
gautam | Update | CDS | New PCIe fiber install postponed to tomorrow | [steve, gautam]
This didn't go as smoothly as planned. While there were no issues with the new fiber over the ~3 hours that I left it plugged in, I didn't realize the fiber has distinct ends for the "HOST" and "TARGET" (-5 points to me I guess). So while we had plugged in the ends correctly (by accident) for the pre-lunch test, while routing the fiber on the overhead cable tray, we switched the ends (because the "HOST" end of the cable is close to the reel and we felt it would be easier to do the routing the other way.
Anyway, we will fix this tomorrow. For now, the old fiber was re-connected, and the models are running. IMC is locked.
Quote: |
Pictures + more procedural details + proper routing of the protected fiber along cable trays after lunch. If this doesn't help the stability problem, we are out of ideas again, so fingers crossed...
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Fri Sep 21 16:46:38 2018 |
gautam | Update | CDS | New PCIe fiber installed and routed | [steve, koji, gautam]
We took another pass at this today, and it seems to have worked - see Attachment #1. I'm leaving CDS in this configuration so that we can investigate stability. IMC could be locked. However, due to the vacuum slow machine having failed, we are going to leave the PSL shutter closed over the weekend. |
Attachment 1: PCIeFiber.png
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Attachment 2: IMG_5878.JPG
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Fri Sep 21 16:51:43 2018 |
gautam | Update | VAC | c1vac1 is unresponsive | Steve pointed out that some of the vacuum MEDM screen fields were reporting "NO COMM". Koji confirmed that this is a c1vac1 problem, likely the same as reported here and can be fixed using the same procedure.
However, Steve is worried that the interlock won't kick in in case of a vacuum emergency, so we are leaving the PSL shutter closed over the weekend. The problem will be revisited on Monday. |
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Mon Sep 24 15:06:10 2018 |
gautam | Update | VAC | c1vac1 reboot + TP1 controller replacement | [steve, gautam]
Following the procedure in this elog, we effected a reset of the vacuum slow machines. Usually, I just turn the key on these crates to do a power cycle, but Steve pointed out that for the vacuum machines, we should only push the "reset" button.
While TP1 was spun down, we took the opportunity to replace the TP1 controller with a spare unit the company has sent us for use while our unit is sent to them for maintenance. The procedure was in principle simple (I only list the additional ones, for the various valve closures, see the slow machine reset procedure elog):
- Turn power off using switch on rear.
- Remove 4 connecting cables on the back.
- Switch controllers.
- Reconnect 4 cables on the back panel.
- Turn power back on using switch on rear.
However, we were foiled by a Philips screw on the DB37 connector labelled "MAG BRG", which had all its head worn out. We had to make a cut in this screw using a saw blade, and use a "-" screwdriver to get this troublesome screw out. Steve suspects this is a metric gauge screw, and will request the company to send us a new one, we will replace it when re-installing the maintaiend controller.
Attachments #1 and #2 show the Vacuum MEDM screen before and after the reboot respectively - evidently, the fields that were reading "NO COMM" now read numbers. Attachment #3 shows the main volume pressure during this work.
Quote: |
The problem will be revisited on Monday.
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Attachment 1: beforeReboot.png
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Attachment 2: afterReboot.png
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Attachment 3: CC1.png
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Mon Oct 1 20:39:09 2018 |
gautam | Configuration | ASC | c1asy | We need to set up a copy of the c1asx model (which currently runs on c1iscex), to be named c1asy, on c1iscey for the green steering PZTs. The plan discussed at the meeting last Wednesday was to rename the existing model c1tst into c1asy, and recompile it with the relevant parts copied over from c1asx. However, I suspect this will create some problems related to the "dcuid" field in the CDS params block (I ran into this issue when I tried to use the dcuid for an old model which no longer exists, called c1imc, for the c1omc model).
From what I can gather, we should be able to circumvent this problem by deleting the .par file corresponding to the c1tst model living at /opt/rtcds/caltech/c1/target/gds/param/, and rename the model to c1asy, and recompile it. But I thought I should post this here checking if anyone knows of other potential conflicts that will need to be managed before I start poking around and breaking things. Alternatively, there are plenty of cores available on c1iscey, so we could just set up a fresh c1asy model...
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- (write programming code of making alignment control automatically)
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Mon Oct 1 22:20:42 2018 |
gautam | Update | SUS | Prototyping HV Bias Circuit | Summary:
I've been plugging away at Altium prototyping the high-voltage bias idea, this is meant to be a progress update.
Details:
I need to get footprints for some of the more uncommon parts (e.g. PA95) from Rich before actually laying this out on a PCB, but in the meantime, I'd like feedback on (but not restricted to) the following:
- The top-level diagram: this is meant to show how all this fits into the coil driver electronics chain.
- The way I'm imagining it now, this (2U) chassis will perform the summing of the fast coil driver output to the slow bias signal using some Dsub connectors (existing slow path series resistance would simply be removed).
- The overall output connector (DB15) will go to the breakout board which sums in the bias voltage for the OSEM PDs and then to the satellite box.
- The obvious flaw in summing in the two paths using a piece of conducting PCB track is that if the coil itself gets disconnected (e.g. we disconnect cable at the vacuum flange), then the full HV appears at TP3 (see pg2 of schematic). This gets divided down by the ratio of the series resistance in the fast path to slow path, but there is still the possibility of damaging the fast-path electronics. I don't know of an elegant design to protect against this.
- Ground loops: I asked Johannes about the Acromag DACs, and apparently they are single ended. Hopefully, because the Sorensens power Acromags, and also the eurocrates, we won't have any problems with ground loops between this unit and the fast path.
- High-voltage precautons: I think I've taken the necessary precautions in protecting against HV damage to the components / interfaced electronics using dual-diodes and TVSs, but someone more knowledgable should check this. Furthermore, I wonder if a Molex connector is the best way to bring in the +/- HV supply onto the board. I'd have liked to use an SHV connector but can't find a comaptible board-mountable connector.
- Choice of HV OpAmp: I've chosen to stick with the PA95, but I think the PA91 has the same footprint so this shouldn't be a big deal.
- Power regulation: I've adapted the power regulation scheme Rich used in D1600122 - note that the HV supply voltage doesn't undergo any regulation on the board, though there are decoupling caps close to the power pins of the PA95. Since the PA95 is inside a feedback loop, the PSRR should not be an issue, but I'll confirm with LTspice model anyways just in case.
- Cost:
- Each of the metal film resistors that Rich recommended costs ~$15.
- The voltage rating on these demand that we have 6 per channel, and if this works well, we need to make this board for 4 optics.
- The PA95 is ~$150 each, and presumably the high voltage handling resistors and capacitors won't be cheap.
- Steve will update about his HV supply investigations (on a secure platform, NOT the elog), but it looks like even switching supplies cost north of $1200.
- However, as I will detail in a separate elog, my modeling suggests that among the various technical noises I've modeled so far, coil driver noise is still the largest contribution which actually seems to exceed the unsqueezed shot noise of ~ 8e-19 m/rtHz for 1W input power and PRG 40 with 20ppm RT arm losses, by a smidge (~9e-19 m/rtHz, once we take into account the fast and slow path noises, and the fact that we are not exactly Johnson noise limited).
I also don't have a good idea of what the PCB layer structure (2 layers? 3 layers? or more?) should be for this kind of circuit, I'll try and get some input from Rich.
*Updated with current noise (Attachment #2) at the output for this topology of series resistance of 25 kohm in this path. Modeling was done (in LTspice) with a noiseless 25kohm resistor, and then I included the Johnson noise contribution of the 25k in quadrature. For this choice, we are below 1pA/rtHz from this path in the band we care about. I've also tried to estimate (Attachment #3) the contribution due to (assumed flat in ASD) ripple in the HV power supply (i.e. voltage rails of the PA95) to the output current noise, seems totally negligible for any reasonable power supply spec I've seen, switching or linear. |
Attachment 1: CoilDriverBias.pdf
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Attachment 2: currentNoise.pdf
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Attachment 3: PSRR.pdf
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Tue Oct 2 23:57:16 2018 |
gautam | Update | PonderSqueeze | Squeezing scenarios | [kevin, gautam]
We have been working on double checking the noise budget calculations. We wanted to evaluate the amount of squeezing for a few different scenarios that vary in cost and time. Here are the findings:
Squeezing scenarios
Sqz [dBvac] |
fmin [Hz] |
PPRM [W] |
PBS [W] |
TPRM [%] |
TSRM [%] |
-0.41 |
215 |
0.8 |
40 |
5.637 |
9.903 |
-0.58 |
230 |
1.7 |
80 |
5.637 |
9.903 |
-1.05 |
250 |
1.7 |
150 |
1 |
17 |
-2.26 |
340 |
10 |
900 |
1 |
17 |
All calculations done with
- 4.5kohm series resistance on ETMs, 15kohms on ITMs, 25kohm on slow path on all four TMs.
- Detuning of SRC = -0.01 deg.
- Homodyne angle = 89.5 deg.
- Homodyne QE = 0.9.
- Arm losses is 20ppm RT.
- LO beam assumed to be extracted from PR2 transmission, and is ~20ppm of circulating power in PRC.
Scenarios:
- Existing setup, new RC folding mirrors for PRG of ~45.
- Existing setup, send Innolight (Edwin) for repair (= diode replacement?) and hope we get 1.7 W on back of PRM.
- Repair Innolight, new PRM and SRM, former for higher PRG, latter for higher DARM pole.
- Same as #3, but with 10 W input power on back of PRM (i.e. assuming we get a fiber amp).
Remarks:
- The errors on the small dB numbers is large - 1% change in model parameters (e.g. arm losses, PRG, coil driver noise etc) can mean no observable squeezing.
- Actually, this entire discussion is moot unless we can get the RIN of the light incident on the PRM lower than the current level (estimated from MC2 transmission, filtered by CARM pole and ARM zero) by a factor of 60dB.
- This is because even if we have 1mW contrast defect light leaking through the OMC, the beating of this field (in the amplitude quadrature) with the 20mW LO RIN (also almost entirely in the amplitude quad) yields significant noise contribution at 100 Hz (see Attachment #1).
- Actually, we could have much more contrast defect leakage, as we have not accounted for asymmetries like arm loss imbalance.
- So we need an ISS that has 60dB of gain at 100 Hz.
- The requirement on LO RIN is consistent with Eq 12 of this paper.
- There is probably room to optimize SRC detuning and homodyne angle for each of these scenarios - for now, we just took the optimized combo for scenario #1 for evaluating all four scenarios.
- OMC displacement noise seems to only be at the level of 1e-22 m/rtHz, assuming that the detuning for s-pol and p-pol is ~30 kHz if we were to lock at the middle of the two resonances
- This assumes 0.02 deg difference in amplitude reflectivity b/w polarizations per optic, other parameters taken from aLIGO OMC design numbers.
- We took OMC displacement noise from here.
Main unbudgeted noises:
- Scattered light.
- Angular control noise reinjection (not sure about the RP angular dynamics for the higher power yet).
- Shot noise due to vacuum leaking from sym port (= DC contrast defect), but we expect this to not be significant at the level of the other noises in Atm #1.
- Osc amp / phase.
- AUX DoF cross coupling into DARM readout.
- Laser frequency noise (although we should be immune to this because of our homodyne angle choice).
Threat matrix has been updated. |
Attachment 1: PonderSqueeze_NB_LORIN.pdf
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Fri Oct 5 17:47:55 2018 |
gautam | Configuration | ASC | Y-end table upgrade | What about just copying the Xend layout? I think it has good MM (per calculations), reasonable (in)sensitivity to component positions, good Gouy phase separation, and I think it is good to have the same layout at both ends. Since the green waist has the same size and location in the doubling crystal, it should be possible to adapt the X end solution to the Yend table pretty easily I think.
Quote: |
The setup I designed is here. It can bring 100% mode-matching and good separation of degrees of TEM01, however I found a probrem. The picture of setup is attached #3. You can see the reflection angle at Y7 and Y8 is not appropriate. I will consider the schematic again.
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Sun Oct 7 16:51:03 2018 |
gautam | Configuration | LSC | Yarm triggering changed | To facilitate Yuki's alignment of the EY green beam into the Yarm cavity, I have changed the LSC triggering and PowNorm settings to use only the reflected light from the cavity to do the locking of Arm Cavity length to PSL. Running the configure script should restore the usual TRY triggering settings. Also, the X arm optics were macroscopically misaligned in order to be able to lock in this configuration. |
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Mon Oct 8 18:56:52 2018 |
gautam | Configuration | ASC | c1asx filter coefficient file missing | While pointing Yuki to the c1asx servo system, I noticed that the filter file for c1asx is missing in the usual chans directory. Why? Backups for it exist in the filter_archive subdirectory. But there is no current file. Clearly this doesn't seems to affect the realtime code execution as the ASX model seems to run just fine. I copied the latest backup version from the archive area into the chans directory for now. |
14239
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Tue Oct 9 16:05:29 2018 |
gautam | Configuration | ASC | c1tst deleted, c1asy deployed. | Setting up c1asy:
- Backed up old c1tst.mdl as c1tst_old_bak.mdl in /opt/rtcds/userapps/release/cds/c1/models
- Copied the c1tst model to /opt/rtcds/userapps/release/isc/c1/models/c1asy.mdl as this is where the c1asx.mdl file resides.
- Backed up original c1rfm.mdl as c1rfm_old.mdl in /opt/rtcds/userapps/release/cds/c1/models (since the old c1tst had an RFM block which is unnecessary).
- Deleted offending RFM block from c1rfm.mdl.
- Recompiled and re-installed c1rfm.mdl. Model has not yet been restarted, as I'd like suspension watchdogs to be shutdown, but c1susaux EPICS channels are presently not responsive.
- Removed c1tst model (C-node91) from /opt/rtcds/caltech/c1/target/gds/param/testpoints.
- Removed /opt/rtcds/caltech/c1/target/gds/param/tpchn_c1tst.par (at this point, DCUID 91 is free for use by c1asy).
- Moved c1tst line in /opt/rtcds/caltech/c1/target/daqd/master to "old model definitions models" section.
- Added /opt/rtcds/caltech/c1/target/gds/param/tpchn_c1asy.par to the master file.
- Edited/diskless/root.jessie/etc/rtsystab to allow c1asy to be run on c1iscey.
- Finally, I followed the instructions here to get the channels into frames and make all the indicators green.
Now Yuki can work on copying the simulink model (copy c1asx structure) and implementing the autoalignment servo. |
Attachment 1: CDSoverview_ASY.png
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Wed Oct 31 17:54:25 2018 |
gautam | Update | VAC | CC1 hornet power connection restored | Steve reported to me that the CC1 Hornet gauge was not reporting the IFO pressure after some cable tracing at EX. I found that the power to the unit had been accidentally disconnected. I re-connected the power and manually turned on the HV on the CC gauge (perhaps this can be automated in the new vacuum paradigm). IFO pressure of 8e-6 torr is being reported now. |
Attachment 1: cc1_Hornet.png
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Fri Nov 2 19:25:16 2018 |
gautam | Update | Computer Scripts / Programs | loss measurements | Some facts which should be considered when doing this measurement and the associated uncertainty:
- When Johannes did the measurement, there was no light from the AS port diverted to the OMC. This represents ~70% loss in the absolute amount of power available for this measurement. I estimate ~1W*Tprm * Ritm * Tbs * Rbs * Tsrm * OMCsplit ~ 300uW which should still be plenty, but the real parameter of interest is the difference in reflected power between locked/no cavity situations, and how that compares to the RMS of the scope readout. For comparison, the POX DC light level is expected to be ~20uW, assuming a 600ppm AR coating on the ITMs.
- Even though the reflection from the arm not being measured may look like it's completely misaligned looking at the AS camera, the PDA520 which is used at the AS port has a large active area and so one must check on the oscilloscope that the other arm is truly misaligned and not hitting the photodiode to avoid interference effects artifically bloating the uncertainty.
- The PDA255 monitoring the MC transmission has a tiny active area. I'm not sure the beam has been centered on it anytime recently. If the beam is not well centered on that PD, and you normalize the measurements by "MC Transmission", you're likely to end up with larger error.
Quote: |
This result has about 40% of uncertaintities in XARM and 33% in YARM (so big... ).
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Tue Nov 6 15:23:48 2018 |
gautam | Update | IOO | IMC problematic | The IMC has been misbehaving for the last 5 hours. Why? I turned the WFS servos off. afaik, aaron was the last person to work on the IFO, so i'm not taking any further debugging steps so as to not disturb his setup. |
Attachment 1: MCwonky.png
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Tue Nov 6 23:19:06 2018 |
gautam | Update | VAC | c1vac1 FAIL lights on (briefly) | Jon and I stuck a extender card into the eurocrate at 1X8 earlier today (~5pm PT), to see if the box was getting +24V DC from the Sorensen or not. Upon sticking the card in, the FAIL LEDs on all the VME cards came on. We immediately removed the extender card. Without any intervention from us, after ~1 minute, the FAIL LEDs went off again. Judging by the main volume pressure (Attachment #1) and the Vacuum MEDM screen (Attachment #2), this did not create any issues and the c1vac1 computer is still responsive.
But Steve can perhaps run a check in the AM to confirm that this activity didn't break anything.
Is there a reason why extender cards shouldn't be stuck into eurocrates? |
Attachment 1: Screenshot_from_2018-11-06_23-18-23.png
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Attachment 2: Screenshot_from_2018-11-06_23-19-26.png
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Wed Nov 7 19:20:53 2018 |
gautam | Update | Computers | Paola Battery Error | The VEA vertex laptop, paola, has a flashing orange indicator which I take to mean some kind of battery issue. When the laptop is disconnected from its AC power adaptor, it immediately shuts down. So this machine is kind of useless for its intended purpose of being a portable computer we can work at optical tables with . The actual battery diagnostics (using upower) don't report any errors. |
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Wed Nov 7 19:42:01 2018 |
gautam | Update | General | IFO checkup and DRMI locking prep | Earlier today, I rebooted a few unresponsive VME crates (susaux, auxey).
The IMC has been unhappy for a couple of days - the glitches in the MC suspensions are more frequent. I reset the dark offsets, minimized MCREFL by hand, and then re-centered the beam on the MC2 Trans QPD. In this config, the IMC has been relatively stable today, although judging by the control room StripTool WFS control signal traces, the suspension glitches are still happening. Since we have to fix the attenuator issue anyways soon, we can do a touch-up on IMC WFS.
I removed the DC PD used for loss measurements. I found that the AS beam path was disturbed - there is a need to change the alignment, this just makes it more work to get back to IFO locking as I have to check alignment onto the AS55 and AS110 PDs.
Single arm locking worked with minimal effort - although the X arm dither alignment doesn't do the intended job of maximizing the transmission. Needs a checkup.
PRMI locking (carrier resonant) was also pretty easy. Stability of the lock is good, locks hold for ~20 minutes at a time and only broke because I was mucking around. However, when the carrier is resonant, I notice a smeared scatter pattern on the ITMX camera that I don't remember from before. I wonder if the FF idea can be tested in the simpler PRMI config.
After recovering these two simpler IFO configurations, I improved the cavity alignment by hand and with the ASS servos that work. Then I re-centered all the Oplev beams onto their respective QPDs and saved the alignment offsets. I briefly attemped DRMI locking, but had little success, I'm going to try a little later in the evening, so I'm leaving the IFO with the DRMI flashing about, LSC mode off. |
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Wed Nov 7 23:07:11 2018 |
gautam | Update | LSC | DRMI locking recovered | I had some success today. I hope that the tweaks I made will allow working with the DRMI during the day as well, though it looks like the main limiting factor in lock duty cycle is angular stability of the PRC.
- Since there has been some change in the light levels / in vacuum optical paths, I decided to be a bit more systematic.
- Initial guess of locking gains / demod phases was what I had last year.
- Then I misaligned SRM, and locked PRMI, for the sideband resonant in the PRC (but still no arm cavities, and using 1f Refl error signals).
- Measured loop TFs, adjusted gains, re-enabled boosts.
- Brought the SRM back into the picture. Decided to trigger SRCL loop on AS110I rather than the existing POP22I (because why should 2f1 signal buildup carry information about SRCL?). New settings saved to the configure script. Reduced MICH gain to account for the SRC cavity gain.
- Re-measured loop TFs, re-adjusted gains. More analysis about the state of the loops tomorrow, but all loops have UGF ~100-120 Hz.
- Ran some sensing lines - need to check my sensing matrix making script, and once I get the matrix elements, I can correct the error signal demod phasing as necessary.
[Attachment #1]: Repeatable and reliable DRMI locks tonight, stability is mainly limited by angular glitches - I'm not sure yet if these are due to a suspect Oplev servo on the PRM, or if they're because of the tip-tilt PR2/PR3/SR2/SR3.
[Attachment #2]: A pass at measuring the TF from SRCL error point to MICH error point via control noise re-injection. I was trying to measure down to 40 Hz, but lost the lock, and am calling it for the night.
[Attachment #3]: Coherence between PRM oplev error point and beam spot motion on POP QPD.
Note that the MICH actuation is not necessarily optimally de-coupled by actuating on the PRM and SRM yet (i.e. the latter two elements of the LSC output matrix are not precisely tuned yet).
What is the correct way to make feedforward filters for this application? Swept-sine transfer function measurement? Or drive broadband noise at the SRCL error point and then do time-domain Wiener filter construction using SRCL error as the witness and MICH error as the target? Or some other technique? Does this even count as "feedforward" since the sensor is not truly "outside" the loop? |
Attachment 1: Screenshot_from_2018-11-07_23-05-58.png
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Attachment 2: SRCL2MICH_crosscpl.pdf
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Attachment 3: PRCangularCoh_rot.pdf
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Fri Nov 9 15:00:56 2018 |
gautam | Update | IOO | No IFO beam as TT1 UL hijacked for REFL55 check | This problem resurfaced. I'm doing the debugging.
6:30pm - "Solved" using the same procedure of stepping through the whitening gains with a small (10 DAC cts pk) signal applied. Simply stepping through the gains with input grounded doesn't seem to do the trick. |
Attachment 1: REFL55_wht_chk.png
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Sat Nov 10 17:32:33 2018 |
gautam | Update | LSC | Nulling MICH->PRCL and MICH->SRCL | With the DRMI locked, I drove a line in MICH using the sensing matrix infrastructure. Then I looked at the error points of MICH, PRCL and SRCL. Initially, the sensing line oscillator output matrix for MICH was set to drive only the BS. Subsequently, I changed the --> PRM and --> SRM matrix elements until the line height in the PRCL and SRCL error signals was minimized (i.e. the change to PRCL and SRCL due to the BS moving, which is a geometric effect, is cancelled by applying the opposite actuation to the PRM/SRM respectively. Then I transferred these to the LSC output matrix (old numbers in brackets).
MICH--> PRM = -0.335 (-0.2655)
MICH--> SRM = -0.35 (+0.25)
I then measured the loop TFs - all 3 loops had UGFs around 100 Hz, coinciding with the peaks of the phase bubbles. I also ran some sensing lines and did a sensing matrix measurement, Attachment #1 - looks similar to what I have obtained in the past, although the relative angles between the DoFs makes no sense to me. I guess the AS55 demod phase can be tuned up a bit.
The demodulation was done offline - I mixed the time series of the actuator and sensor signals with a "local oscillator" cosine wave - but instead of using the entire 5 minute time series and low-passing the mixer output, I divvied up the data into 5 second chunks, windowed with a Tukey window, and have plotted the mean value of the resulting mixer output.
Unrelated to this work: I re-aligned the PMC on the PSL table, mostly in Pitch. |
Attachment 1: sensMat_2018-11-10.pdf
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Tue Nov 13 18:09:24 2018 |
gautam | Update | LSC | Investigation of SRCL-->MICH coupling | Summary:
I've been looking into the cross-coupling from the SRCL loop control point to the Michelson error point.
[Attachment #1] - Swept sine measurement of transfer function from SRCL_OUT_DQ to MICH_IN1_DQ. Details below.
[Attachment #2] - Attempt to measure time variation of coupling from SRCL control point to MICH error point. Details below.
[Attachment #3] - Histogram of the data in Attachment #2.
[Attachment #4] - Spectrogram of the duration in which data in #2 and #3 were collected, to investigate the occurrance of fast glitches.
Hypothesis: (so that people can correct me where I'm wrong - 40m tests are on DRMI so "MICH" in this discussion would be "DARM" when considering the sites)
- SRM motion creates noise in MICH.
- The SRM motion may be naively decomposed into two contributions -
- Category #1: "sensing noise induced" motion, which comes about because of the SRCL control loop moving the SRM due to shot noise (or any other sensing noise) of the SRCL PDH photodiode, and
- Category #2: all other SRM motion.
- We'd like to cancel the former contribution from DARM.
- The idea is to measure the transfer function from SRCL control point to the MICH error point. Knowing this, we can design a filter so that the SRCL control signal is filtered and summed in at the MICH error point to null the SRCL coupling to MICH.
- Caveats/questions:
- Introducing this extra loop actually increases the coupling of the "all other" category of SRM motion to MICH. But the hypothesis is that the MICH noise at low frequencies, which is where this increased coupling is expected to matter, will be dominated by seismic/other noise contributions, and so we are not actually degrading the MICH sensitivity.
- Knowing the nosie-budget for MICH and SRCL, can we AC couple the feedforward loop such that we are only doing stuff at frequencies where Category #1 is the dominant SRCL noise?
Measurement details and next steps:
Attachment #1
- This measurement was done using DTT swept sine.
- Plotted TF is from SRCL_OUT to MICH_IN, so the SRCL loop shape shouldn't matter.
- I expect the pendulum TF of the SRM to describe this shape - I've overlaid a 1/f^2 shape, it's not quite a fit, and I think the phase profile is due to a delay, but I didn't fit this.
- I had to average at each datapoint for ~10 seconds to get coherence >0.9.
- The whole measurement takes a few minutes.
Attachments #2 and #3
- With the DRMI locked, I drove a sine wave at 83.13 Hz at the SRCL error point using awggui.
- I ramped up the amplitude till I could see this line with an SNR of ~10 in the MICH error signal.
- Then I downloaded ~10mins of data, demodulated it digitally, and low-passed the mixer output.
- I had to use a pretty low corner frequency (0.1 Hz, second order butterworth) on the LPF, as otherwise, the data was too noisy.
- Even so, the observed variation seems too large - can the coupling really change by x100?
- The scatter is huge - part of the problem is that there are numerous glitches while the DRMI is locked.
- As discussed at the meeting today, I'll try another approach of doing multiple swept-sines and using Craig's TFplotter utility to see what scatter that yields.
Attachments #2
- Spectrogram generated with 1 second time strides, for the duration in which the 83 Hz line was driven.
- There are a couple of large fast glitches visible.
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Attachment 1: TF_sweptSineMeas.pdf
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Attachment 2: digitalDemod.pdf
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Attachment 3: digitalDemod_hist.pdf
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Attachment 4: DRMI_LSCspectrogram.pdf
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Tue Nov 13 21:53:19 2018 |
gautam | Update | CDS | RFM errors | This problem resurfaced, which I noticed when I couldn't get the single arm locks going.
The fix was NOT restarting the c1rfm model, which just brought the misery of all vertex FEs crashing and the usual dance to get everything back.
Restarting the sender models (i.e. c1scx and c1scy) seems to have done the trick though. |
Attachment 1: RFMerrors.png
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Fri Nov 16 00:47:43 2018 |
gautam | Update | LSC | More DRMI characterization | Summary:
- More DRMI characterization was done.
- I was working on trying to improve the stability of the DRMI locks as this is necessary for any serious characterization.
- Today I revived the PRC angular feedforward - this was a gamechanger, the DRMI locks were much more stable. It's probably worth spending some time improving the POP LSC/ASC sensing optics/electronics looking towards the full IFO locking.
- Quantitatively, the angular fluctuations as witnessed by the POP QPD is lowered by ~2x with the FF on compared to off
[Attachment #1, references are with FF off, live traces are with FF on].
- The first DRMI lock I got is already running 15 mins, looking stable.
- Update: Out of the ~1 hour i've tried DRMI locking tonight, >50 mins locked!
- I think the filters can be retrained and this performance improved, something to work on while we are vented.
- Ran sensing lines, measured loop TFs, analysis tomorrow, but I think the phasing of the 1f PDs is now okay.
- MICH in AS55 Q, demod phase = -92deg, +6dB wht gain.
- PRCL in REFL11 I, demod phase = +18 deg, +18dB wht gain.
- SRCL in REFL55 I, demod phase = -175 deg, +18dB wht gain.
- Also repeated the line in SRCL-->witness in MICH test.
- At least 10 minutes of data available, but I'm still collecting since the lock is holding.
- This time I drove the line at ~124 Hz with awggui, since this is more a regime where we are sensing noise dominated.
Prep for this work:
- Reboots of c1psl, c1iool0, c1susaux.
- Removed AS port PD loss measurement PD.
- Initial alignment procedure as usual: single arms --> PRMI locked on carrier --> DRMI
I was trying to get some pics of the optics as a zeroth-level reference for the pre-vent loss with the single arms locked, but since our SL7 upgrade, the sensoray won't work anymore . I'll try fixing this during the daytime. |
Attachment 1: PRCff.pdf
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Attachment 2: DRMI_withPRCff.png
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Sun Nov 18 00:59:33 2018 |
gautam | Update | General | Vent prep | I've begun prepping the IFO for the vent, and completed most of the IFO related items on the checklist. The power into the MC has been cut, but the low-power autolocker has not been checked. I will finish up tomorrow and post the go ahead. PSL shutter is closed for tonight. |
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