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ID Date Author Type Categoryup Subject
  16983   Mon Jul 11 11:16:45 2022 JCSummaryElectronicsStartup after Shutdown

[Paco, Yehonathan, JC]

We began starting up all the electronics this morning beginning in the Y-end. After following the steps on the Complete_Power_Shutdown_Procedures on the 40m wiki, we only came across 2 issues.

  1. The Green beam at the Y-End : Turn on the controller and the indicator light began flashing. After waiting until the blinking light becomes constant, turn on the beam. 
  2. C1lsc "could not find operating system"-unable to SSH from Rossa : We found an Elog of how to restart Chiara and this worked. We proceeded by adding this to the procedures of startup.
  16992   Tue Jul 12 14:56:17 2022 TomislavSummaryElectronicsElectronics noise measurements

[Paco, Tomislav]

We measured the electronics noise of the demodulation board, whitening board, and ADC for WFSs, and OPLEV board and ADC for DC QPD in MC2 transmission. We were using SR785.

Regarding the demodulation board, we did 2 series of measurements. For the first series of measurements, we were blocking WFS (attachment 1) and measuring noise at the output of the demod board (attachment 2a). This measurement includes dark noise of the WFS, electronics noise of demod board, and phase noise from LO. For the second series of the measurements, we were unplugging input to the demod board (attachment 2b & 2c is how they looked like before unplugging) (the mistake we made here is not putting 50-ohm terminator) and again measuring at the output of the demod board. This measurement doesn't include the dark noise of the WFS. We were measuring it for all 8 segments (I1, I2, I3, I4, Q1, Q2, Q3, Q4). The dark noise contribution is negligible with respect to demod board noise. In attachments 3 & 4 please find plots that include detection and demodulation contributions for both WFSs.

For whitening board electronics noise measurement, we were terminating the inputs (attachment 5) and measuring the outputs (attachment 6). Electronics noise of the whitening board is in the attachments 7 & 8.

For ADC electronics noise we terminated ADC input and measured noise using diaggui (attachments 9 & 10). Please find these spectra for WFS1, WFS2, and MC TRANS in attachments 11, 12 & 13.

For MC2 TRANS we measured OPLEV board noise. We did two sets of measurements, as for demod board of WFSs (with and without QPD dark noise) (attachments 14, 15 & 16). In the case of OPLEV board noise without dark noise, we were terminating the OPLEV input. Please find the electronics noise of OPLEV's segment 1 (including dark noise which is again much smaller with respect to the OPLEV's electronics noise) in attachment 17.

For the transfer functions, demod board has flat tf, whitening board tf please find in attachment 18, ADC tf is flat and it is (2**16 - 1)/20 [cts/V], and dewhitening tf please find in attachment 19. Also please find the ASD of the spectral analyzer noise (attachment_20).

Measurements for WFS1 demod and whitening were done on 5th of July between 15h and 18h local time. Measurements for WFS2 demod and whitening were done on 6th of July between 15h and 17h local time. All the rest were done on July 7th between 14h and 19h. In attachment 21 also find the comparison between electronics noise for WFSs and cds error signal (taken on the 28th of June between 17h and 18h). Sorry for bad quality of some pictures.

  16995   Wed Jul 13 07:16:48 2022 JCUpdateElectronicsChecking Sorensen Power Supplies

[JC]

I went around 40m picking up any Sorensens that were laying around to test if they worked, or in need of repair. I gathered up a total of 7 Sorensens and each one with a Voltmeter. I made sure the voltage would rise on the Sorenson as well as the voltmeter, maxing out at ~33.4 Volts. For the current, the voltmeter can only rise to 10 Amps before it is fused. Many of the Sorensons that I found did not have their own wall connection, so I had to use the same one for multiple.

From these 7, I have found 5 that are well. One Sorenson I have tested has a output shortage above 20V and the other has yet to be tested.

  16998   Wed Jul 13 13:26:44 2022 ranaSummaryElectronicsElectronics noise measurements

as I said to you yesterday, I don't think image 2a shows the output of the demod board. The output of the demod board is actually the output connector ON the demod board. What you are showing in 2a, is the signal that goes from the whitening board to the ADC I believe. I may be msitaken, so please check with Tega for the signal chain.

  17005   Fri Jul 15 12:21:58 2022 JCUpdateElectronicsChecking Sorensen Power Supplies

Of the 7 Sorenson Power Supplies I tested, 5 are working fine, 1 cannot output voltage more than 20 Volts before shorting, and other does not output current. Six Sorensons are behind the X-Arm.

Quote:

[JC]

I went around 40m picking up any Sorensens that were laying around to test if they worked, or in need of repair. I gathered up a total of 7 Sorensens and each one with a Voltmeter. I made sure the voltage would rise on the Sorenson as well as the voltmeter, maxing out at ~33.4 Volts. For the current, the voltmeter can only rise to 10 Amps before it is fused. Many of the Sorensons that I found did not have their own wall connection, so I had to use the same one for multiple.

From these 7, I have found 5 that are well. One Sorenson I have tested has a output shortage above 20V and the other has yet to be tested.

 

  17019   Tue Jul 19 17:18:34 2022 JCUpdateElectronicsNew Coil Driver on Rack 1X3

[Yehonathan, JC]

Yehonathan and I began to put the electronics on Rack 1X3. To do this, we had to move the monitor over the the PD testing table. Before mounting the Coil Drivers, we added numbers to the spaces to follow the rack plan Koji has provided. The drivers which have been mounted are PRM (Slots 10,11), BS (Slots 15, 16), ITMX (Slots 26, 27), and ITMY (34, 35).

  17031   Mon Jul 25 09:37:39 2022 DeekshaUpdateElectronicsUsing the DFD to measure PZT TF

The DFD was setup to measure the change in beatnote when excited. A long long (128in) cable goes from the SR785 near the DFD all the way to the Xend AUX which it accordingly excites and the DFD is monitored by the oscilloscope at the other end. This was completed on Friday. The wires and stand have been moved to the side but the setup is still a bit chaotic. As of writing this post, there is still atleast some minor issue with the setup as we aren't getting the expected output. 

[I will shortly update this elog with more pictures]

Edit: the SR785 was replaced by the AG 4395, and pictures added

 

  17039   Wed Jul 27 14:39:04 2022 DeekshaUpdateElectronicsNew and improved PZT TF data from the DFD

Paco and I messed around with the attenuation of the scope and bandwidth of the IF. We also replaced the BNC T's in the circuits with RF splitters. We saw some decent improvements to the data. The data is attached and a diagram of the experiment. [We analytically calculated the impedances to avoid any mismatch taking place]. Working on fitting the data.

We also moved around the wires so that the AG4395 is closer to the PZT.

 

  17104   Thu Aug 25 15:24:06 2022 PacoHowToElectronicsRFSoC 2x2 board -- fandango

[Paco, Chris Stoughton, Leo -- remote]

This morning Chris came over to the 40m lab to help us get the RFSoC board going. After checking out our setup, we decided to do a very basic series of checks to see if we can at least get the ADCs to run coherently (independent of the DACs). For this I borrowed the Marconi 2023B from inside the lab and set its output to 1.137 GHz, 0 dBm. Then, I plugged it into the ADC1 and just ran the usual spectrum analyzer notebook on the rfsoc jupyter lab server. Attachment #1 - 2 shows the screen captured PSDs for ADCs 0 and 1 respectively with the 1137 MHz peaks alright.

The fast ADCs are indeed reading our input signals.


Before this simple test, we actually reached out to Leo over at Fermilab for some remote assistance on building up our minimally working firmware. For this, Chris started a new vivado project on his laptop, and realized the rfsoc 2x2 board files are not included in it by default. In order to add them, we had to go into Tools, Settings and add the 2020.1 Vivado Xilinx shop board repository path to the rfsoc2x2 v1.1 files. After a little bit of struggling, uninstalling, reinstalling them, and restarting Vivado, we managed to get into the actual overlay design. In there, with Leo's assistance, we dropped the Zynq MPSoC core (this includes the main interface drivers for the rfsoc 2x2 board). We then dropped an rf converter IP block, which we customized to use the right PLL settings. The settings, from the System Clocking tab were changed to have a 409.6 MHz Reference Clock (default was 122.88 MHz). This was not straightforward, as the default sampling rate of 2.00 GSPS was not integer-related so we had to also update that to 4.096 GSPS. Then, we saw that the max available Clock Out option was 256 MHz (we need to be >= 409.6 MHz), so Leo suggested we dropped a Clocking Wizard block to provide a 512 MHz clock input for the rfdc. The final settings are captured in Attachment # 3. The Clocking Wizard was added, and configured on its Output Clocks tab to provide a Requested Output Freq of 512 MHz. The finall settings of the Clocking wizard are captured in Attachment #4. Finally, we connected the blocks as shown in Attachment #5.

We will continue with this design tomorrow.

  17534   Tue Apr 4 11:03:35 2023 JCSummaryElectronicsSR560: reworking
<p>I purchased some more of these from DigiKey. These parts are currently in the EE shop. These are replacements for the NDP5565 part of the SR560.</p>
  17594   Wed May 17 12:09:11 2023 YehonathanUpdateElectronicsPreping for new coil drivers commissioning in 1X4

It's time to start commissioning the new coil drivers. The Acromag box is already there but it needs to be modified.

The idea is to take the channel configuration from C1AUXEY that controls a single suspension - ETMY and apply it for each suspension in 1X4, that is PRM, BS, ITMX, ITMY.

For this, we need the following items

Item # per SUS # Total
DB9 Front panels 2 8
Optical isolators 4 16
DB9M feedthrough 6 24
DB9F feedthrough 5 20
DB9 Cables ? ?
EnableMON BIO channels 5 20

Currently, there are 8 spare BIO channels in the existing Acromag, we will need 12 more which requires a new BIO Acromag.

Wiring feedthrough spreadsheet coming soon.

 

 

  17656   Sat Jun 24 21:31:02 2023 MayankUpdateElectronicsTransfer function of the new coil driver board

I  measured the transfer function of the new coil driver board. This was done to estimate the correct Sim-Dewhithinng and Anti-Dewhitening digital filters in the CDS. 

Attachment 1: Shows the setup used to measure the TF of the Coil driver board.
Attachment 2: Coil driver board replaced by a DB9 cable (Reference).
Attachment 3: The magnitude and phase response of the measured and simulated TF (Coil driver parameters mentioned here (D2100145) )

Update

Attachment 4: The magnitude and phase response of the simulated and measured TF for the two operating modes. (The coil driver has two modes of operation i.e. Run and Acuisition)

  17676   Mon Jul 10 17:12:02 2023 MayankUpdateElectronicsETMX Coil Driver Mode

I modified the Binary Input DB9 connector. The coil drivers are now operating with the Run/Acq LED off. As per 17656 they should have a flat TF now.

  17716   Wed Jul 26 11:31:10 2023 JCUpdateElectronicsAcromag work

[Yehonathan, JC]

I have made a panel design for the acromag chassis. These panels will hold DB9 connectors. The previous ones had DB37 cutouts (Attachment #1). A bunch of these were found with the acromag accesories, but none had DB9 cutouts. We are switching to DB 9 to connect to the coil drivers without an issue. We are essentially trying to copy what the Y End looks like as much as possible. After taking measurement of the current panel, I used Front Panel Designer to create a new panel with the DB9 cutouts. these spacing between the connectors are ~0.4 inches which will allow us to fit 4 DB9 connecters on each panels. (Attachment #2)

  Draft   Wed Jul 26 16:53:02 2023 YehonathanUpdateElectronicsXEND Acromag work

I removed all the DB37 and IDC50 front panels from the chassis and retained only the 2 BNC feed-throughs.

I also removed the IDC50 breakout boards from the DIN rail and put 4 optical isolators instead (attachment 1).

Since all the DC power supplies are in use, I took 2 Sorensens for +/-18V and put them on the bench (attachment 2). I connected them to the 20V input on the chassis. I also connected the 18V DC source to the excitation point of the Acromags in the same way that was done for the YEND chassis. I turned on the Sorensens and made sure that the Acromags are powered up and drawing current.

Next, I'll use the YEND wiring spreadsheet together with the old XEND wiring spreadsheet to wire the existing and new channels to the DB9 breakout boards.

  17719   Wed Jul 26 17:07:32 2023 YehonathanUpdateElectronicsXEND Acromag work

I removed all the DB37 and IDC50 front panels from the chassis and retained only the 2 BNC feed-throughs.

I also removed the IDC50 breakout boards from the DIN rail and put 4 optical isolators instead (attachment 1).

Since all the DC power supplies are in use, I took 2 Sorensens for +/-18V and put them on the bench (attachment 2). I connected them to the 20V input on the chassis. I also connected the 18V DC source to the excitation point of the Acromags in the same way that was done for the YEND chassis. I turned on the Sorensens and made sure that the Acromags are powered up and drawing current.

Next, I'll use the YEND wiring spreadsheet together with the old XEND wiring spreadsheet to wire the existing and new channels to the DB9 breakout boards.

  17830   Thu Sep 7 14:09:37 2023 KojiSummaryElectronicsVertex Electronics Transition

The vertex electronics transition work will begin on Monday. We expect the ongoing ASS-X work to be completed by then. But if it needs more time, we must hear a shouting signal from the ASS team.
Is there any other preparation to be done this week to reasonably compensate for changes in gain and TF associated with the transition?


In preparation for the transition, we want to have long custom DSUB25 cables (D2100675) approximately laid out (I mean on the floor, etc) this week. JC takes care of this.

  • The lengths of the cables can be found in the attached wiring diagram.
  • Both ends of the cables need to be labeled.
  • At which side do we want to absorb the slack?

Transition Plan

  • Suspension damping and watchdogs are appropriately taken care of, although we soon stop/remove everything.
  • We first remove any existing units not going to be used in the circuit (except around the Eurocard crate oplev interface P2 of the wiring diagram).
  • The wirings at the side cross-connects are removed. This includes the removal of the thick cables on the cable racks. This would become a heavy work.
  • The DC power strips are attached to the racks, and the DC power wiring should be done at this point. We check the DC supply voltages.
  • Install the new units as per the above rack layout and proceed with the DSUB connections. We have sufficient number of DSUB cables (this ELOG).
  • Turn the units on one by one to detect any unit failure, just in case. If they are all on, we start work on the CDS restoration work.
  17838   Tue Sep 12 18:55:55 2023 KojiSummaryElectronicsVertex Electronics Transition

We are ready to do the transition from Wed 1PM.

The items for the upgrade was collected around the vertex area (Attached photo).

- aLIGO-style DC power strip (+/-18V) x3
- DC power cables (orange +/-18V)
- Electronics units for the upgrade.
- DSUB (DB9) cables
- Custom DSUB15-DSUB25 cables
- Custom DSUB25 cables

 

  17839   Tue Sep 12 23:10:06 2023 KojiSummaryElectronicsVertex Electronics Transition

Note on Sorensen:

- Eurocard crate requires +-15V. We can place two 15V Sorensens on 1X4 for Eurocard crate or just leave the current +/-15V supplies.

- The aLIGO units requires +/-18V. We can place two 15V Sorensens on 1X5 or just leave two of the current supplies and set them to +/-18V.

  17840   Wed Sep 13 12:46:03 2023 KojiSummaryElectronicsVertex Electronics Transition ~ final prep
  • [OK] Reflected the sorensen setup (minimal change from the conventional config. (See the attachment)
  • Before destroying the current setup, bring the alignment biases for the vertex 8 sus to zero and record all the OSEM values.
    => Radhika did it (next ELOG)

    -> This will give us the ratio of the OSEM error signals to know the gain ratios between before and after. Also this will make it easier to bring the alignment back.

  • [OK] I suppose the oplevs are still aligned. We don't need to be too nervous about the oplev spot too much.

  • How to compensate the coil force cal? Do we know the ratio from the ETM coil driver swap? (What were the coil output Rs? What are they now? Are the ratios reasonable?)

    • Currently:
      - PRM/BS/ITMX/ITMY DAC output for face coils differential

      - SRM/MC2/MC1/MC3 DAC output for face coils single ended
      - All 8 SD coils single ended
      - Coil Output Rs
        According to D1700218

        PRM unknown to be checked
        BS 100Ohm
        ITMX 100Ohm
        ITMY 100Ohm
        SRM 100Ohm
        MC2 430? unknown to be checked
        MC1 430? unknown to be checked
        MC3 430? unknown to be checked

    • New setup
        DAC output differential
        AI has the gain of 1 / HAM coil driver has a gain of 1.2
        Coil output Rs:

        For all the face coils 1.2k // 100 ~ 92Ohm
        For all the side coils 1.2k

 

  17841   Wed Sep 13 13:50:48 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ final prep

OSEM values for 8 vertex optics ~before~ electronics upgrade (averaged over 60 s):

['C1:SUS-BS_ULSEN_IN1', 'C1:SUS-BS_URSEN_IN1', 'C1:SUS-BS_LRSEN_IN1', 'C1:SUS-BS_LLSEN_IN1', 'C1:SUS-BS_SDSEN_IN1', 'C1:SUS-ITMX_ULSEN_IN1', 'C1:SUS-ITMX_URSEN_IN1', 'C1:SUS-ITMX_LRSEN_IN1', 'C1:SUS-ITMX_LLSEN_IN1', 'C1:SUS-ITMX_SDSEN_IN1', 'C1:SUS-ITMY_ULSEN_IN1', 'C1:SUS-ITMY_URSEN_IN1', 'C1:SUS-ITMY_LRSEN_IN1', 'C1:SUS-ITMY_LLSEN_IN1', 'C1:SUS-ITMY_SDSEN_IN1', 'C1:SUS-PRM_ULSEN_IN1', 'C1:SUS-PRM_URSEN_IN1', 'C1:SUS-PRM_LRSEN_IN1', 'C1:SUS-PRM_LLSEN_IN1', 'C1:SUS-PRM_SDSEN_IN1', 'C1:SUS-SRM_ULSEN_IN1', 'C1:SUS-SRM_URSEN_IN1', 'C1:SUS-SRM_LRSEN_IN1', 'C1:SUS-SRM_LLSEN_IN1', 'C1:SUS-SRM_SDSEN_IN1', 'C1:SUS-MC1_ULSEN_IN1', 'C1:SUS-MC1_URSEN_IN1', 'C1:SUS-MC1_LRSEN_IN1', 'C1:SUS-MC1_LLSEN_IN1', 'C1:SUS-MC1_SDSEN_IN1', 'C1:SUS-MC2_ULSEN_IN1', 'C1:SUS-MC2_URSEN_IN1', 'C1:SUS-MC2_LRSEN_IN1', 'C1:SUS-MC2_LLSEN_IN1', 'C1:SUS-MC2_SDSEN_IN1', 'C1:SUS-MC3_ULSEN_IN1', 'C1:SUS-MC3_URSEN_IN1', 'C1:SUS-MC3_LRSEN_IN1', 'C1:SUS-MC3_LLSEN_IN1', 'C1:SUS-MC3_SDSEN_IN1']

[1943.7368693033854, 1597.8396443684896, 1667.4166076660156, 1709.3347656250003, 1760.058290608724, 1013.2686828613281, 1833.5396423339844, 2096.6071411132816, 786.2030975341798, 1152.7826700846356, 923.4767690022786, 447.51257578531903, 678.4539184570312, 971.2538736979167, 720.261508178711, 2458.092639160156, 2245.09764811198, 710.1112263997396, 258.2382120768228, 1225.202982584636, 3048.1043741861986, 3092.901733398437, 77.94405148824053, 181.08351745605466, 5145.644441731771, -6879.474226888021, -6954.500219726562, -3615.385673014323, -5468.913354492189, -3260.200516764323, 1555.9213073730468, 1625.1883911132813, 348.9968526204428, 1011.3114247639974, 1386.0941060384114, 1014.3825622558594, 1218.7048522949217, 1642.9303202311198, 1621.7448221842449, 720.2911783854166]

  17842   Wed Sep 13 14:02:29 2023 KojiSummaryElectronicsVertex Electronics Transition ~ final prep

- 4x 1064nm NPROs are OFF. The lab hall is laser safe, although the oplev lasers are on.
  The Laser Warning Signs were turned off by the interlock switch at the PSL enclosure (control room side)


- Watch dogs were turned to "disabled"

- Halted c1sus using dolphin fencing. This worked very well.
The previous report of dolphin fencing not working was due to a typo in my instruction (wrong -disable -> correct --disable).

controls@fb1:~ 0$ ./dolphin_ix_port_control.sh --disable 192.168.113.40 1
--disable
Disabling switch_ip 192.168.113.40, port 1
Complete - csr write addr=0x0001C050, val=0x20820090 (with ret=0)

ssh c1sus

controls@c1sus:~$ rtcds stop --all

 

  17843   Wed Sep 13 17:26:26 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 1

[Radhika, Paco, Murtaza, Koji]

- Removed all the units that will not be used in the new setup.
- Removed the sidepanel crossconnects
- Removed most of the sidepanel power lines except for the top eurocrate at the top of 1X4 (requires +/-15 pale orange and blue).
- Removed the acromag connections
- Removed the connectors of the long suspension cables


We'll resume the work at 10AM. (We'll have breaks for lunch and the seminar at 3PM)

=== Next steps ===

- Continue to remove the long suspension cables.
- Attach the DC power strip

- Continue to clean up the power lines on the rack side
- Prepare the power lines (Guralp requires +/-15V, the Eurocard crate +/-15V, new power strips (x3) +/-18V)
- Install the units on the racks.

  17844   Thu Sep 14 11:46:28 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 2

[Radhika, Paco, Murtaza, Koji]

Morning work:

  • Power Strip assembly
  • Power Strip cable crimping
  • c1lsc fiber routing (the PCIE fiber was in danger) / c1lsc machine was stopped after dolphin fencing
  • We tried to reroute the c1lsc fiber above the racks such that it does not get pitched by the rack doors,
    but it seemed that the fiber was damaged (Attachment 1) and the c1lsc can't talk with the IO chassis anymore. We need to replace the fiber.
    It seems that P/N is PCIEO-4G3-100.0-11 (Samtec)

Afternoon work:

  • Removed the sidepanels of 1X3 and 1X4 for easier work
  • Removed the long DB25 cables from the old sat boxes.
  • DC power strips are installed.
  • Finished cleaning up the side cross-connects
  • Checked the DC supply conditions.
    • +/-15V Eurocard crate + Guralp requires 0.5A / 0.6A
    • +/-18V appered on the DC power strips correctly
  • Cleaned up the floor a bit
  • Murtaza noticed that there was some strange intermittent noise around the 1Y0/1 racks.
    It looks like one of the fans for the c1ioo IO chassis are dying.

Evening work:

  • Made coil driver short plugs (Attachment 2). This enables the coils while the coil modes are set to be Acquire mode.
  • Rack nuts inserted

Tomorrow plan (10:30AM):

  • c1sus IO chassis installation
  • Unit installation
  • Unit powering tests (before connecting them)
  • Cabling between the units
  • Long DB cable installation (sat box removal)
  • c1lsc fiber replacement
  • Some above cable removal (fiber, old custom DB25 for MC1, etc)

 

  17845   Fri Sep 15 12:51:29 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 3

[Radhika, Paco, Murtaza, Koji]

We made great progress today. It's going well so far.

Morning work (10:30AM~):

  • Installed c1sus IO chassis
  • Installed all units
  • Removed long (previous) custom DB25 cables for MC1

Afternoon work

  • Connected all the units to the DC power strip
  • Unit powering test was done before the inter-unit DSUBs were connected.
    • We found one AA chassis don't turn on even though internal +/-15V seems supplied. We pulled the unit out.
    • All the other units were fine.
    • Typical current draw of the units: (unit name, positive supply current, negative supply current)
      • AA 0.5A 0.5A (18W)
      • AI 0.3A 0.3A  (11W)
      • BIO 0A 0A (0W)
      • Trillum I/F 0.1A 0.1A (0.4W)
      • Sat amp 0.3A 0.3A (11W)
      • Coil Driver 0.3A 0.2A (9W)
  • Cabling between the units
    • Done except for the extracted AA unit and for the BIO units (not needed until we have Acromag).
  • Long DB cable installation (sat box removal)
    • Halfway
  • c1lsc fiber tracking/replacement (not yet done)
    • We found the spare box with 3 more cables behind the X-arm tube. The replacement has not been done yet.

Evening work

  • c1sus powering up and CDS check
    • After the people had left, I tried to start up c1sus. I had used dolphin fencing, but it worked like a charm!
  • ADC1 AA chassis repair

To Do on Mon (10AM~)

  • Long DB cable installation (contd)
  • DSUB cable labeling
  • Sus control system recovery
  • c1lsc fiber reinstallation and system recovery
  • Tool / Debris cleaning

Eventual needs:

  • We need good crimping tools.
  • Supply shortage of the crimping connectors.
  • Fibers should not be routed together with electronics cables. Fibers should be distributed through tubes hanging on the cable racks
  • Cable strain relief
  • Move the noisy CDS and DC power supplies to the drill press room.

Rack nut policy

Out rack nut / screws are so much contaminated.
It's a mixture of #10-32 (standard) / M5 (wrong) / M6 (wrong).
Even the labeled bottles are contaminated.
Don't believe the installed rack nuts/screws, even if they seemed to work fine. They may be a metric pair.

Golden standard (Attached photo)

  • rack nuts marked 1032
  • small washers
  • 10-32 tapered-round head screws

If you find other hardware, don't mix them with any stocks. Give them to Rack Nut Police (=Koji). He will hide them to some where secret.

 

  17847   Fri Sep 15 22:57:15 2023 KojiSummaryElectronicsc1sus ADC1 AA chassis fix

c1sus ADC1 AA chassis fix.

  • Brought the chassis on the workbench.
  • Opened the chassis and "alas!" The internal power cables were not connected to the PCBs. This makes sense why there was no current draw at all.
  • The cables were connected.
  • The unit was tested with +/-18V power. At least, the diff outputs of the AA boards were all 0V.
  • A missing connector screw for the external power connector was fixed

The unit was installed on the 1X5 rack, and the DB9 cables were connected.
Repair mission completed.

I've turned on the Eurocard crate (+/-15V) and the AA units (+/-18V) to check if the oplev channels are working. (It seems to be running well)
Also, the AA units are not too hot so far.

  17848   Mon Sep 18 10:26:12 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

[JC, Paco, Radhika, Koji]

Morning/Afternoon work:

  • Long DB cable installation (contd)
    • 14 DB25 cables went through the cable-rack bridge above the ITMX chamber. It's twice the previous # of cables.
    • These cables were connected to the chamber flanges. ITMY Flange1 had been having the 2nd connector malfunction. So the cables were connected to the connector 1 and 3 (as before).
  • DSUB cable labeling
    • All the (long) cables connected to the units were labeled appropriately.
  • c1lsc fiber reinstallation
    • We found one fiber cable (AlpenIO Inc PCIe 4x10G 100m AIO-PCIe4X-100 (2010)) already routed from 1Y4 to the PSL rack. This is the spare JC told us. We routed the host end to 1Y7.
    • c1lsc is up and running as before. All the models are up an running (burtrestore still needed).
  • c1sus channel assignment
    • We have the swap of ADC0/1/2 so that the oplev ADC will have ADC0 (duo tone at CH31)
    • The channel assignments were modified:
      • SUS numbering "n": (0-PRM / 1-BS / 2-ITMX / 3-ITMY / 4-SRM / 5-MC2 / 6-MC1 / 7-MC3)
      • Face OSEMs ADC1 CH (n x 4 + 0~3, UL/LL/UR/LR)
      • Side OSEM ADC2 CH n
      • Oplev Ch ADC0 CH (n x 4 + 0~3)
      • Face OSEMs DAC0 CH (n x 4 + 0~3)
      • Side OSEM DAC1 CH n

  • Sus damping control recovery
    • We need to lookin to MC3 UL/UR, PRM SD, SRM UL/LL/UR, ITMX all, ITMY face. See next post.
  • Tool / Debris cleaning
  17849   Mon Sep 18 18:38:02 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 4

[Koji, Paco, Radhika]

We recorded the 5 OSEM sensor readings for each of the 8 upgraded optics.

1. The correct scale factor seems to be 9x for the sensible OSEM readings. This is consistent with the scale factor calculated here.

2. The expected counts for each sensor is between 10,000-15,000 cts.

3. Several OSEM sensor values have bad readings of ~0 cts, or a few orders of magnitude smaller than expected:

      - ITMX UL/UR/LR/LL
      - ITMY LR/LL/SD
      - SRM UL/UR/LL
      - MC3 UL/UR

4. Several OSEM sensor values have readings < 0 (there's overlap with the previous group):

      - ITMX UR/LR/LL/SD
      - ITMY SD
      - PRM SD
      - SRM UL/UR/LL
      - MC3 UL/UR

5. MC1 has a consistent scale factor of 2.15, quite smaller than expected. Note that its OSEM readings were negative before the upgrade and now positive; hence negative MC1 ratios below.

Here is the full matrix of OSEM ratios after/before upgrade:
 

  UL UR LR LL SD
BS 7.53508553 9.80529834 10.82905875 8.61769586 1.02324445
ITMX 2.18227361e-03 -2.45700834e-03 -2.88710265e-03 -7.09635068e-03 -8.06591717
ITMY 5.11154762 3.57325499e+01 9.24866311e-03 9.05692306e-01 -3.00528448e-02
PRM 7.22051955 7.45579712 4.8889959 84.63438221 -1.4148838
SRM -8.86075335e-04 -8.39000436e-04 1.68963158e+02 -3.14350110e-02 1.12586402
MC1 -2.15229241 -2.14837141  -2.14954979 -2.16571496 -2.13574099
MC2 9.09337655 9.17967725  25.52931668 9.03775091 8.89290556
MC3 -4.60602513e-03 -1.06510781e-03 9.05368452 8.99212312 9.07521747

Next steps
 

We will debug the corresponding circuits tomorrow.

  17852   Mon Sep 18 20:16:03 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

- Here is the thought how does the factor of 9 come from:

  • We are driving OSEM LEDs at 35mA rather than at 25mA. (Honeywell LED SME2470 has quite a linear response for  Irradiance vs. Forward Current.)
  • The TIA of the OSEM PD is now 121K instead of the previous 39.2K
  • The OSEM output is received by differential AA.

--> Naive estimation is (35/25) x (121k/39.2k) x 2 = 8.64.

- MC1 sat amp has already been replaced with the aLIGO version by Gautam. I wonder where this factor of 2.15 came from (not 2...?).


- Coil driver response:

Previous setup

--> BS/PRM/ITMX/ITMY 2 VDAC/118 Ohm = 1.7e-2 A/V x VDAC

--> MC1/MC2/MC3/SRM VDAC/118 Ohm = 8.5e-3 A/V x VDAC

--> All the side coils VDAC/118 Ohm = 8.5e-3 A/V x VDAC

New setup

  • The AIs have the gain of 1.
  • The coil driver has a gain of 1.2.
  • The output Rs for the face coils are 1.2k//100Ohm = 92Ohm

--> 2 VDAC * 1.2 / (92+18) Ohm = 2.2e-2 A/V x VDAC

BS/PRM/ITMX/ITMY face coils will have x1.3 more actuation.

MC1/MC2/MC3/SRM face coils will have x2.6 more actuation.

  • The output Rs for the side coils are 1.2k

--> 2 VDAC * 1.2 / 1200 Ohm = 2.0e-3 A/V x VDAC

MC1/MC2/MC3/SRM will have less actuation by a factor of 1/4.25.

 

 

ITMX 400Ohm
ITMY 400Ohm
BS 100
PRM 100
SRM 100
MC2 427.5/410/411/409.4/410
MC1 434.5/428.4/430.6/432.5/434.0
MC3 432.2/409.4/409.3/410.6/413.8
 

  17853   Mon Sep 18 23:09:40 2023 KojiSummaryElectronicsVertex Electronics Transition ~ DAY 4

MC1 is ready for the damping test

Trouble shooting plan

  • Is the LED on? => Check all the LED mon outputs of the sat amp. It should show 5V if the output current is 35mA. If the constant current loop is open (eg no LED / connection failure etc), it rails at the supply voltage.
  • Also the CCD videos should show the status of the LEDs (at least for the TMs and the MC mirrors)
  • Then is the PD out responding? => Check all the PD mons.
  • If the PD mons are normal, but there is no signal it can be the AA problem. Inject test signal to that channel on the AA and see if we can see some number on the CDS.
     
  • Is the coil current flowing? => Check if the coil drv mons are responding.
  • If not, check if the AI output has the DAC output in that channel.
  • If the DAC signal is there, but no current it can be the driver issue, or the coil/cable/flange connection issue.
  17854   Tue Sep 19 17:25:38 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 5

MCs OSEM input / coil output gain tuning

Seeing that MC1, MC2, MC3 OSEM readings looked reasonable and consistent, I worked on updating the input OSEM cts2um filter for the 3 suspensions. MC1 OSEM input gains were changed by a factor of 2.15; MC2 and MC3 OSEM input gains were changed by a factor of 8.64 (see previous ELOG for source of these factors).

OLD cts2um gains (units are um/ct):

  UL UR LR LL SD
MC1 0.105 0.078 0.065 0.087 0.09
MC2 0.415 0.361 0.782 0.415 0.36
MC3 0.509 0.424 0.365 0.376 0.36

NEW cts2um gains (units are um/ct):

  UL UR LR LL SD
MC1 0.0488 0.0363 0.0302 0.0405 0.0419
MC2 0.0480 0.0418 0.0905 0.0480 0.0417
MC3 0.0589 0.0491 0.0422 0.0435 0.0417

Next, I moved onto the coil output filters for MC1, MC2, MC3. There was no gain filter already in place for these coil outputs, so I created one called V2A. (This name can be changed. Note: for other optics the coil actuation scaling filters are titled "xN" for scaling N. Eventually we will find an elegant way to set these scalings.)  The coil outputs for MC1, MC2, MC3 were changed by a factor of 1/2.6, or 0.385 (see previous ELOG for source of this factor).

I ran into an issue saving the foton filter coefficients: the filters appear to be saved; however, "Load Coefficients" does not load them onto the medm screen for MC2_URCOIL and all MC3 coils. I've tried toggling the save button and Load Coefficients button, but no luck. I checked and the filters are saved in opt/rtcds/caltech/c1/chans/C1MCS.txt. When changing an existing filter gain, the change is not being applied to the output channel.

MC1 damping

Since all MC1 coil filters saved and loaded successfully but not MC2 or MC3, I was only able to test the damping of MC1. Turning on the damping filters did not supress motion, so I made the following changes:

1. Prior to the upgrade, MC1 OSEM readings were all negative. Now they are positive, so I reversed the signs of all OSEM input gains (-1 -----> +1) [Attachment 1]. This is now consistent with all other optics' OSEM sensor gains.
2. I noticed that all MC1 coil output gains were negative. The [UL, UR, LR, LL, SD] coil output sign convention for each other optic is [+, -, +, -, +], or that but flipped. So I flipped the signs of MC1 UL/LR/SD coil output gains to match the [+, -, +, -, +] pattern.

Attachment 2 shows the damping of MC1 after these changes were made. It looks side the SIDE mode is underdamped and we may want to increase its servo gain. (I flipped the sign of the coil output and confirmed it ringed up, so the sign is correct.)

Next steps

1. Debug why foton is not saving new coil output scaling filters for MC2 UR and all MC3 coils.

2. Assess MC2 and MC3 damping.

 

  17855   Tue Sep 19 19:21:10 2023 RadhikaSummaryElectronicsVertex Electronics Transition ~ DAY 5

[Koji, Radhika]

Update to the Foton/Load Coefficients issue:

- "Save" in foton writes/updates filters correctly to chans/C1MCS.txt. However, "Load Coefficients" is currently not reading C1MCS.txt and therefore not loading any changes at all.

    - We saved a backup of C1MCS.txt and replaced it with one from this morning, hoping to see that the new V2A filters vanish from MC1 coil outputs. When we loaded coefficients, the V2A filters remained.

- We then checked if this issue was happening with C1SUS by adding a test filter to ETMY_ULCOIL. Indeed "Load Coefficients" loaded the filter. So it seems to just be a C1MCS issue.

- We restarted C1MCS twice and no change.

  17856   Tue Sep 19 19:48:20 2023 KojiSummaryElectronicsVertex Electronics Trouble shooting

[Paco, Murtaza, JC, Koji, Radhika]

MC1/MC2 was working fine.

At this point MC3, SRM, and ITMY are also working fine.


The custom DB25 cables between the sat amps and the flanges are difficult to mate.

  • The finger tight was not enough to make all the contacts. Fastening the screws with a screwdriver made MC3 start working fine on CDS.
  • The custom cable fastening screw on PRM(1st) was stripped at the flange side. It needs a thread dyeing. The SRM(2st) has the hex nut broken on the sat amp. Need to be fixed.

We checked if the LED mon shows the correct values. When it is connected it shows 5V. If the LED is not connected it shows 0.8V. It goes 0.08V in an unknown state.

  • SRM1 all channels were 0V. It turned out that the connection inside the vacuum chamber seemed mirrored. Right now we have temporary mirror ribbon cables to fix this issue. We need two shielded mirror cables for SRM1 and SRM2.
  • SRM2 was random (5V, 0.8V, and 0V)
  • BS1/2/ITMY1 looked fine.
  • ITMY2 was strange.
  • ITMX1/2 were completely silent.

We suspected the cable pinouts/ cable mating issue etc, but it turned out that the SRM2 cable was mislabeled and the ITMY2 cable was connected to the SRM sat amp. That's why it was so random. We corrected the connection and SRM and ITMY started working fine on CDS.

We used the OSEM simulation box to test the sat amps. That suggests that the BS/PRM/ITMX problem may be coming from the SAT amps. We need to look into the sat amps.

  17857   Tue Sep 19 20:49:08 2023 KojiSummaryElectronicsVertex Electronics Trouble shooting

[Murtaza, Koji]

ITMX / BS / PRM sat amps were removed from the rack and checked on the workbench. They all work fine with the OSEM simulation box.


With the correct circuit, the LED mon should be 5V, and the PD readout should be 2.6~3.0V (i.e. the differential output has twice the voltage difference of this number).

ITMX Sat Amp fixed:

  • The internal wiring for CH1-4 was not connected (or disconnected by mechanical impact) (Attachment 1)
  • PD1 channel for CH1 had a metal debris on the transimpedance opamp (Attachment 2)
  • The internal board for CH5-6 was connected in the opposite direction. This was because both connectors on the board had the wrong genders.
    This was replaced with a spare. (There was two spares and I consumed one now) (Attachment 3)
     
  • Put a ventilated lid instead of the solid lid.

BS Sat Amp:

  • All the CHs just worked fine.

PRM Sat Amp:

  • Found the bias selector jumpers had not been installed. Fixed. (Attachment 4/5)
  17858   Tue Sep 19 23:40:33 2023 KojiSummaryElectronicsVertex Electronics Wed Plan

Plan for Sept 20, 2023

For morning people:

  • We don't need to replace the long cables. They seem all fine.
  • Close the lid of the repaired sat amps. Use a lid with ventilation slits (there is an extra with the empty unit on the same desk).
  • Install the sat amps back to the racks. Connect all the cables us. Check if this makes the OSEM values to positive 10~20k counts.
    • If not, check LED mons and PD mons. If they are OK the sat amp is working fine. Track the signal down to the AI chassis to see if the units after the sat amp are working well.
  • The SRM2 and ITM2 cables ( connected to the sat amps at the back of the units) cross (i.e. have twisted) at the rack. Please reroute and nicely coil them up.
  • Fix the custom cable issues: "The custom cable fastening screw on PRM(1st) was stripped at the flange side. It needs a thread dyeing. The SRM(2st) has the hex nut broken on the sat amp. Need to be fixed."
  • Put the proper labels on the long cables at the flanges and the sat amps. The labels should indicate where the connectors are supposed to be connected.
  • Clean up the mess and the tools from the lab.

The

After the weekly meeting, we'll continue to work on the suspension control. The lab will be turned to be LASER HAZARD in the afternoon.

  17859   Wed Sep 20 00:03:22 2023 KojiSummaryElectronicsre: Filter Coefficient Loading Issue

I asked CDS mattermost for help. Chris (Wipf) checked it and reported it is working fine as usual (without fixing anything).

I've reverted the copied C1MCS.txt back in the chans dir (/opt/rtcds/caltech/c1/chans). The filter coefficients were loaded from the GDS screen. The filters were properly updated.

Here is the info from Chris:

Some transient NFS problem, maybe?

One possible clue is that the filter file that the FE actually loads is not chans/<model>.txt,
but chans/tmp/<model>.txt. Before loading, the filter file is copied into the tmp directory,
and a diff of the two files is written to chans/tmp/<model>.diff.
This diff file should normally be an empty file, indicating that the two files match.
But it was not empty at first, so there must have been some issue with the previous load.
After I reloaded, the diff then became empty.

  17860   Wed Sep 20 00:20:09 2023 KojiSummaryElectronicsVertex Electronics ~ change in the actuator calibration

I found the actuator calibration is more complicated. The numbers I reported in the previous elog was not correct.

Here I summarize the numbers of the voltage-to-current conversion.

=== Previous===

Coils DAC
receiver
Coil driver
gain
Coil driver
output R (Ohm)
Coil
R (Ohm)
VDAC Voltage
to Current conversion (mA/V)
PRM Face Diff (2) 1 100 18 17.
PRM Side SE (1) 1 100 18    8.5
BS Face Diff (2) 1 100 18 17.
BS Side SE (1) 1 100 18    8.5
ITMX Face Diff (2) 1 400 18   4.8
ITMX Side SE (1) 1 400 18   2.4
ITMY Face Diff (2) 1 400 18   4.8
ITMY Side SE (1) 1 400 18   2.4
SRM Face SE (1) 1 100 18   8.5
SRM Side SE (1) 1 100 18   8.5
MC2 Face SE (1) 1 420 18   2.3
MC2 Side SE (1) 1 420 18   2.3
MC1 Face SE (1) 1 420 18   2.3
MC1 Side SE (1) 1 420 18   2.3
MC3 Face SE (1) 1 420 18   2.3
MC3 Side SE (1) 1 420 18   2.3

=== New ===

e.g. ITMX face coil electronics are x4.6 stronger than the previous coil electronics.

Coils DAC
receiver
Coil driver
gain
Coil driver
output R (Ohm)
Coil
R (Ohm)
VDAC Voltage
to Current conversion (mA/V)

Ratio
New/Old

PRM Face Diff (2) 1.2 92 18 22. 1.3
PRM Side Diff (2) 1.2 1200 18     2.0 0.235
BS Face Diff (2) 1.2 92 18 22. 1.3
BS Side Diff (2) 1.2 1200 18     2.0 0.235
ITMX Face Diff (2) 1.2 92 18 22. 4.6
ITMX Side Diff (2) 1.2 1200 18     2.0 0.83
ITMY Face Diff (2) 1.2 92 18 22. 4.6
ITMY Side Diff (2) 1.2 1200 18     2.0 0.83
SRM Face Diff (2) 1.2 92 18 22. 2.6
SRM Side Diff (2) 1.2 1200 18     2.0 0.235
MC2 Face Diff (2) 1.2 92 18 22. 9.6
MC2 Side Diff (2) 1.2 1200 18     2.0 0.87
MC1 Face Diff (2) 1.2 92 18 22. 9.6
MC1 Side Diff (2) 1.2 1200 18     2.0 0.87
MC3 Face Diff (2) 1.2 92 18 22. 9.6
MC3 Side Diff (2) 1.2 1200 18     2.0 0.87

 

  17861   Wed Sep 20 14:04:58 2023 RadhikaSummaryElectronicsVertex Electronics ~ change in the actuator calibration

MC1/MC2/MC3 damping restored

I tweaked the coil actuation gains for MC1/MC2/MC3 according to Koji's updated calculations:

1/9.6 for face coils
1/0.87 for side coils

With foton and load coefficients working as expected, these coil output filters were successfully added to MC2 and MC3.

Damping tests

Note: While burt restoring C1MCS to a pre-upgrade state, a "NOT OK" flag popped up and the coil balancing gains for MC1/MC2/MC3 were reset to +-1. Koji showed me how to access the original values in c1mcs.snap (using grep) and I restored the coil gains to their values from 9/12/2023.

- *Recall from past ELOG that MC1 OSEM input gains all switched from -1 ---> +1; and MC1 coil output gains changed signs from [-,-,-,-,-] ----> [+,-,+,-,+]. No changes were made to MC2 or MC3.*
- Turned on damping filters
- Gave an offset of 10000 cts to C1:SUS-MC1/2/3_ULCOIL_OFFSET. OSEM striptools can be found in Attachments 1,2,3.

Next steps

- Get BS/ITMX/ITMY/PRM/SRM online and apply new sensor/actuator scaling factors
- Confirm damping works as expected for above suspensions
- Bring IFO to nominal alignment
- Revisit upgraded suspensions and perform fine tuning (input matrix diagonalization, coil balancing)
  17862   Wed Sep 20 17:02:22 2023 RadhikaSummaryElectronicsVertex Electronics ~ change in the actuator calibration

[Paco, Radhika]

IMC LOCKED

We used the pre-upgrade C1:SUS-MC1/2/3_SUSPIT/YAW/POS_INMON values as a baseline to restore IMC alignment.

Procedure we followed:

1. Use MCR spot position to align MC1.
2. Move MC3 to try to hit OSEMs on MC2F. Note down these MC3 PIT/YAW offset values and navigate to their center to align MC3.
3. Now move MC2 to steer the beam back around the cavity and hit MC2 OSEMs once again. Alignment is very close! Continue to move until flashing is observed.
4. IMC autolocker kicks in; burt restore c1iooepics.snap to restore WFS.
  17863   Wed Sep 20 17:28:17 2023 RadhikaSummaryElectronicsre: Filter Coefficient Loading Issue

I noticed the same issue today with C1RMS.txt, when trying to update the coil actuation gains for SRM. The filter changes were saved to chans/C1RMS.txt, so next I checked chans/tmp/. There is no chans/tmp/C1RMS.txt, or chans/tmp/C1RMS.diff. The updated filters do not load.

Update from Chris:

C1RMS.txt is a remnant from some model that doesn't exist anymore. It can be removed.

I went ahead and deleted chans/C1RMS.txt and chans/tmp/C1RMS.txt.

  17864   Wed Sep 20 18:18:38 2023 KojiSummaryElectronicsVertex Electronics Wed Plan

[Koji, Murtaza, JC]

Regarding PRM/BS:

  • PRM2 cable and BS2 cable were wrongly connected. This was corrected.
     
  • This makes the BS face OSEM values reasonable.
    However, the side signal is still close to zero. We confirmed that the sat amp outputs (LED mon/PD mon/PD diff out) looked reasonable for all five BS OSEMs.
    The side signal issue stays downstream of the Vertex ADC adapter.

     
  • PRM2 has no issue with the sat amp.
  • PRM1: We found that all the LED mon goes down to 0.17V when the vacuum flange is connected.
    It was found that the reference voltage for the LED (TP11 of D080276) went down to low number (like 0.15V) when the in-vac OSEMs were connected.
    I found that this output was not stable. So, I replaced the U4 chip (AD8672), but this didn't help the voltage sagging issue.
  • Murtaza and I started checking the short circuits on the flange. We found that Pin 5 (OSEM PD1 Kathode) and Pin 1 (invac cable shield?) only have 5.1 Ohm. Pin 1 is connected to the vacuum chamber.
    • What does it mean? The PD has the reverse bias voltage of 10V applied on the PD Kathode. This bias voltage is shorted to ground via 5 Ohm. To keep the bias line at 10V, we need 2 A.
    • We don't have many options:
      - We can disconnect the internal wire for pin5 from the cable. (Prepare a ribbon cable). This should make the other OSEM PDs properly biased.
      We may be able to use an independent power supply to provide some amount of reverse bias (10V 2A is too much. Probably 1V 0.2A or 2.5V 0.5A?) so that the UL PD somewhat work.
  17866   Thu Sep 21 14:22:02 2023 RadhikaSummaryElectronicsVertex Electronics CDS Update

I recalculated the scale factors between OSEM sensor readings after/before the upgrade. The expected factor is 8.64, although we may want to rethink this if measurements are disagreeing.]

If ITMY can be restored, we can proceed to locking the YARM while PRM/ITMX/BS are worked on.
 

1. BS values seem reasonable

[UL: 7.52500126;  UR: 9.78603403;  LR: 10.80333519;  LL: 8.58031299;  SD: 4.90237845]

The SD reading is positive and nonzero, even though its still smaller than the face sensor readings by a factor of 2.
 

2. ITMX SD still negative

[UL: 12.76223943;  UR: 6.40189513;  LR: 8.52507381;  LL: 21.55229024;  SD: -7.9675249]


3. ITMY SD flipped from positive to negative ~3pm 9/21. LL is too small.

[UL: 5.21918023;  UR: 35.90315905;  LR: 19.1338805;  LL: 0.90731276;  SD: -3.68291338]


4. PRM still not reliable

[UL: -0.00064235;  UR: -0.00061758;  LR: -0.00154483;  LL: -0.00583698;  SD: -0.00283635]


5. SRM positive but scale factors widely inconsistent, order of magnitude greater than expected (~8.64).

[UL: 7.22499189;  UR: 3.36944117;  LR: 116.14296786;  LL: 114.59917629;  SD: 1.91497475]
  17867   Fri Sep 22 16:20:25 2023 RadhikaSummaryElectronicsVertex Electronics CDS Update

Today we tried to debug the unreasonable OSEM readings (see previous ELOG)

PRM process

Starting state: PRM face + side values bogus (~0)

1. Somehow through retightening connections, PRM LR+SD counts looked reasonable (and positive). Yay!

2. Toggled on and off the PRM SATAMP; removed Ch1-4 and Ch5-8 PRM inputs

    - Result: BS SD becomes negative when PRM SATAMP is on and Ch 5-8 cable is connected.

2. We disconnected the PRM SATAMP and plugged the PRM inputs into the SRM SATAMP. The SRM SATAMP output was routed to the PRM input on the SATAMP adapter.

    - Result: PRM UL/UR/LL readings still 0.

                 BS SD still negative when SRM SATAMP is turned on and Ch 5-8 from PRM are connected.

                   ---> SRM SATAMP gives same results as PRM SATAMP; PRM SATAMP likely not faulty.

3. Replaced PRM chamber connections with satellite test box for channels 1-4.

    - Result: reasonable PRM UL/UR/LL readings ---> Pin 5 shorting on chamber side is causing issues with Ch1-4.

ITMX - ITMY process

Starting state: ITMX SD counts negative, ITMY SD counts negative (depends on ITMX connection)
To test ITMX (SD negative since change), ITMY (SD negative dependent on ITMX)

 

 We first switched [ITMX, ITMY]  in the following sequence to get the following results (F = average face values, S = side value)(0 = OFF, 1 = ON)

- [0,0] -> ITMX[F,S] = [300, -5000] ITMY[F,S] = [0, -800]

- [1,0] -> ITMX[F,S] = [~, ~] ITMY[F,S] = [1000, -3000]

- [0,1] -> ITMX[F,S] = [-30, -3000] ITMY[F,S] = [~, ~]

- [1,1] -> ITMX[F,S] = [15000, -10000] ITMY[F,S] = [10000, -3000]

 

A separate test was done to test ITMX-ITMY coupling on ITMY-side

1. ITMX SAT AMP OFF -> ITMY SIDE GOOD 

2. ITMX SAT AMP ON (Ch 1-4, 5-8 DISCONNECTED) -> ITMY SIDE =/2

3. ITMX SAT AMP ON (Ch 1-4 CONNECTED) -> NO CHANGE FROM 2.

4. ITMX SAT AMP ON (Ch 1-4, 5-8 CONNECTED) -> SAME MAGNITUDE AS 2., FLIPS SIGN

 

To check if ITMX was faulty from the chamber end for the SIDE DOF, the satellite test box was used for CH 5-8

ITMY SIDE SIGN STILL NEGATIVE 

 

For the final sanity check for the effect of ITMX on ITMY side sign, we swapped the ITMX and SRM SAT AMPS ({front -> PD OUT 1, 2}, {back -> Ch 1-4, Ch 5-8})

ITMY SIDE SIGN STILL NEGATIVE 

 

Summary

PRM Ch1-4 shorting issue on chamber side (UL/UR/LL)

BS/ITMY/ITMX SD <0 all seem to be caused by SATAMP adapter or downsteam in ADC2

SUSPECTED FAULTY SAT AMP ADAPTER for ITMX-ITMY SIDE COUPLNG

  17868   Fri Sep 22 18:26:08 2023 RadhikaSummaryElectronicsVertex Electronics CDS Update

[Koji, Radhika, Murtaza]

All upgraded suspensions have reasonable OSEM readings! Ready for damping tests and alignment next week.

We fixed PRM OSEM reading by isolating pin5 of the first DB25 [17871]. This makes the PRM UL unbiased by the PD seems to be receiving some light.

The PRM/BS/ITMX/ITMY SATAMP adapter was removed and the front-end pins were checked for shorting. Indeed, a short was found in the SIDE1-4 ribbon cable inside the sat-amp adapter, from the wires being compressed to one side of the dsub-ribbon adapter at the input joint [Attachment 1]. We reclamped the ribbon and verified there was no shorting and that the pins were properly aligned [Attachment 2]. This means PRM/BS and ITMX/ITMY SIDE signals should no longer be cross coupled.

All OSEM counts looked good after these fixes. Only a few ITMY OSEMS looked low, but Koji checked both PDMON voltages for ITMY, and we confirmed with calibration that the OSEM counts were reasonable.

  17871   Fri Sep 22 19:38:06 2023 MurtazaSummaryElectronicsVertex Electronics CDS Update

PRM CHANNEL 1-4 (BS FEEDTHROUGH 1-3)

[Koji, Radhika, Murtaza]

Connector on the BS Chamber that feeds to PRM UL/LL/UR coils (PRM 1 in Attachment 1) has pin 5 shorted to pin 1 inside the chamber angry
- To resolve this, a DB25 connector was recycled from the old coil drivers
- pin 5 was isolated by cutting (green cable on the DB25 connector)
- The connector was attached between the chamber and the cable that runs through to the rack (Attachment 1)
- The connector was labelled (Attachment 2)

The PD outputs were read on the PRM SATAMP (Pins 1-4, Pin 5 (Ground))
Pin 1 ~ 5.2V
Pin 2 ~ 5.3V
Pin 3 ~ 6.7V

Pin 4 ~ 0V (Blank Pin)

No need to apply an external bias to Pin 5!

Can be fixed during the next vent!

  33   Tue Oct 30 20:15:24 2007 tobinOtherEnvironmentearthquake
Rana, Tobin

Largish (M5.6) earthquake in San Francisco sent our optics swinging.
  47   Thu Nov 1 16:42:48 2007 Andrey RodionovSummaryEnvironmentEnd of Daylight Saving Time this weekend
Useful information for everyone, as a friendly reminder:

According to the web-page

http://www.energy.ca.gov/daylightsaving.html,

this coming weekend there will be the end of Daylight Saving Time.

Clocks will be adjusted backward one hour.
  100   Wed Nov 14 12:33:35 2007 tobinAoGEnvironmentconstruction
The construction crews are running a jack-hammer right outside of the control room.
  131   Wed Nov 28 16:18:15 2007 AlbertoMetaphysicsEnvironmentso clean you can eat on it
I tidied up the desks in the lab, brought the Spectrum Analyzers back to the Salumeria (you don't want to know about that), sorted a lot of stuff and boxed up what I didn't know (you can find it in a couple of carton boxes on the table).
The blackmail with the pie might not work next time.
Please, preserve the common sort.


Alberto
  212   Sat Dec 22 15:32:11 2007 tobinAoGEnvironmentants
Ants are everywhere: on the PSL table, on the circuit board I'm soldering...

I believe I have discovered their energy source.
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