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ID Date Author Type Category Subjectup
  9820   Thu Apr 17 01:01:02 2014 JenneUpdateLSCLSC model modifications

Last night, EricQ and I were concerned that we might need some CARM UGF servoing, so I added a UGF servo block, copied from the aLIGO LSC model, to our LSC model.  The block is inline with the CARM servo, after the output triggering, just before the output matrix.  Q put together some screens, which are accessible from the main LSC screen. 

The model is compiled and running.  We didn't get very far in testing it though before Koji pointed out that it is a slow solution, and not a fast one like we were searching for.  We were hoping to deal with the momentary power buildup, and thus optical gain change, as the arms flash close to resonance.  The UGF servo will not work nearly that fast though.  We may want it for slow UGF servo-ing, but it's not the solution to what Q and I were thinking about yesterday.  Regular ol' dynamic normalization is closer to the right answer for this.

In tonight's activities, Koji and I found that we probably want a CESAR block for DARM as well as CARM, so that we can independently normalize AS55Q. 

To solve the DARM oscillation issue from last night (that I discovered this evening when I finally looked at the time series data), we may want to implement a DARM UGF servo.  For tonight, as we reduced the CARM offset and started seeing gain peaking in the DARM spectra, I hand-reduced the DARM gain.

 

  9766   Mon Mar 31 13:26:23 2014 manasaUpdateLSCLSC model modified

I have included Yarm CESAR to the LSC model. It was just a copy paste of the Xarm CESAR. Since we are now meditating about implementing CCESAR and DCESAR, I did not run or install the model as yet.

  5812   Fri Nov 4 15:26:54 2011 JenneUpdateLSCLSC model recompiled

I moved the place where we take the OAF Degree of Freedom signals from - now it's the error point rather than the feedback for DARM, CARM, MICH, PRCL, SRCL, XARM and YARM.  I didn't do anything to MCL.

While trying to compile, there was something wrong with the lockins that were there...it complained about the Q OUTs being unconnected.  I even reverted to the before-I-touched-it-today version of c1lsc from the SVN, and it had the same problem.  So, that means that whomever put those in the LSC model did so, and then didn't check to see if the model would compile.  Not so good.

Anyhow, I just terminated them, to make it happy.  If those are actually supposed to go somewhere, whoever is in charge of LSC lockins should take a look at it.

Also, as Mirko mentioned in the previous elog 5811, we wanted to calculate the effect on the MC without actuating, so we put in a new summing point and a filterbank so we have testpoints.

LSC model recompiled.

OAF model recompiled.

FB restarted because of the new channels added to OAF.

  5832   Mon Nov 7 15:15:21 2011 JenneUpdateLSCLSC model recompiled

Quote:

I moved the place where we take the OAF Degree of Freedom signals from - now it's the error point rather than the feedback for DARM, CARM, MICH, PRCL, SRCL, XARM and YARM.  I didn't do anything to MCL.

While trying to compile, there was something wrong with the lockins that were there...it complained about the Q OUTs being unconnected.  I even reverted to the before-I-touched-it-today version of c1lsc from the SVN, and it had the same problem.  So, that means that whomever put those in the LSC model did so, and then didn't check to see if the model would compile.  Not so good.

Anyhow, I just terminated them, to make it happy.  If those are actually supposed to go somewhere, whoever is in charge of LSC lockins should take a look at it.

Also, as Mirko mentioned in the previous elog 5811, we wanted to calculate the effect on the MC without actuating, so we put in a new summing point and a filterbank so we have testpoints.

LSC model recompiled.

OAF model recompiled.

FB restarted because of the new channels added to OAF.

 After Rana pointed out the errors of our ways, we reverted all of these changes.

  5833   Mon Nov 7 15:43:25 2011 jamieUpdateLSCLSC model recompiled

Quote:

While trying to compile, there was something wrong with the lockins that were there...it complained about the Q OUTs being unconnected.  I even reverted to the before-I-touched-it-today version of c1lsc from the SVN, and it had the same problem.  So, that means that whomever put those in the LSC model did so, and then didn't check to see if the model would compile.  Not so good.

Anyhow, I just terminated them, to make it happy.  If those are actually supposed to go somewhere, whoever is in charge of LSC lockins should take a look at it.

 This was totally my fault.  I'm very sorry.  I modified the lockin part to output the Q phase, and forgot to modify the models that use that part appropriately.  BAD JAMIE!  I'll check to make sure this won't bite us again.

  9225   Wed Oct 9 17:27:35 2013 JenneUpdateLSCLSC model sensing matrix upgrades

The modifications to the LSC model are now complete, and the new model has been compiled, installed, and is running. The sensing matrix lockins are all in the c1cal model.  Masayuki is locking right now, so so far, things appear to be back to normal.

The longer version of the story, with all the detours and hiccups:

After several tries of deleting the GoTo and From flags / tags in the lockin area of the LSC model, and continually getting the "something is not connected" errors, I gave up and just drew several long lines.  So, in the new Sensing Matrix block (which is actually in c1cal, not c1lsc, but that's a story for the next paragraph), we should eventually make things back to the more clean flags situation, but for right now, it's working, with lots of lines everywhere.  I've tried to be very organized and clear about what lines go where, so that it's easy to see what's going on.

I eventually was able to compile c1lsc, and then installed it, and restarted the model.  Adding in 5x the lockin modules (we had 27, but now we have 5x27, so that we can look at the sensing matrix elements for every degree of freedom, and every photodiode, all at the same time) was too much for the poor lsc cpu.  I was consistently getting over 70usec per cycle, and was hitting a max of 77usec for the lsc cpu.  Both of those numbers are greater than the allowed 60usec.  So, I made the decision to put the whole sensing matrix / lockin stuff into the calibration model.  This means that I have 27+5 more IPC signals than I used to, but so far things seem to be okay (no rigorous testing yet).  (27 to send the 27 PD inputs over to the cal model, and another 5 to send the oscillator "clocks" from the cal model to the lsc model.)  The lsc model is now running faster than before (because there were 27 lockin modules in the model), at 24-28 usec, and the cal model is running at 39usec.

All seemed well and good, both the lsc and cal models compiled, but the lsc burt restore wasn't working.  Restarting the model did not successfully do a burt restore, and when I tried several different .snap files from today, and other times this month using burtgooey, I kept getting "NOT OK", and numbers weren't being restored into the epics channels.  A very few settings were restored, but most were not.  I ended up copying a .snap file from a few hours ago into a separate directory, then went in and by-hand removed all the lines referring to now non-existant lockin channels.  Burtgooey still told me "NOT OK", but settings seem to be restored, so I think it's okay.  I have not confirmed each and every one of the 10,000+ channels to ensure that the number is the same as the one in the .snap file, but as I glance around in the LSC screen and its dependants, all the numbers and buttons look about right.  

After all this stuff, Masayuki is locking both arms simultaneously in IR, as he prepares to test some new ALS scripts, so things seem okay for now.

  9222   Tue Oct 8 16:56:38 2013 JenneUpdateLSCLSC model sensing matrix upgrades in progress

I have modified the LSC model (the currently-running model is checked into the svn), but it is not compiling for me.  So, if you need to make changes to it, be careful, and probably save my version off to the side, and checkout the latest svn version.  (I don't foresee anyone needing to modify this model any time soon though).

The change that I'm trying to make is adding several more lockin setups, so that we can measure the sensing matrix elements for several degrees of freedom simultaneously. 

Right now, the error that I'm getting is the frustrating "something isn't connected" error, even though if you look in the model, the part that it mentions is fully connected.  Usually the solution to this is to disconnect and reconnect everything, so I'll work on that after I return to the lab in a bit.

  9109   Thu Sep 5 01:55:29 2013 JenneUpdateLSCLSC model upated to have AS110 channels, violin filter triggering

I have modified the c1lsc model so that I have access to the AS110 channels in the triggering and power normalization matrices. 

I also put in a few blocks so that we can have triggering on the violin notches that we moved to the LSC model a week or so ago. 

Here is my svn comment, so I don't have to retype things:

2 changes:  AS110 channels added, and Violin filter triggers added.

AS110:     We recently installed a    new demod board    and PD for an AS110 signal.  Since we will not    be using AS11 in the forseeable    future,    the AS110 demod    board outputs use the former AS11 channels.  I    have left the AS11 channels in the model so that we can easily    add them back if we want to, but they are grounded rather than    connected to the ADC.  I've added digital demodulation for AS110, power normalization,    and then added the I&Q signals to both the trigger matrix and the main    power normalization matrix.  NOTE that these slide the matrix columns around.    Since the AS110    is also    using the former AS11 whitening    channels, swapped those on the    BIO block also.

Violins:  Recently, Rana and I moved the SUS LSC violin    filters    from the individual suspension    models over to the LSC model.  Giving every optic every    optics' violin    notch helps eliminate bad cross-coupling between servo loops.  Here, I have enabled triggering    for these notches, so that the violin filters can come on after a cavity is locked.  Since the    filter banks SHOULD BE THE SAME    for all LSC_SUS banks,    the "mask" is common to    all optics.

I also edited several medm screens, to show the new changes:  the lsc overview screen has a button to the violin notch triggering screen, in addition to being able to get to the new screen from the regular triggering matrix screen.  I made the trigger and normalization matrix screens bigger, since there are now 2 new columns. 

I added AS110 to both the LSCoffsets script, and Masayuki's new, better, LSCoffsets2.py. 

I added new lines to the .req files for the ifo configure burt restores for the new matrix columns, and the violin triggering.

I restored, checked out, and saved the Xarm, Yarm, MICH, PRM_sb, and DRM configurations. 

 


I tried locking the DRMI, but haven't really been successful.  I'm not 100% sure how to do the phasing for AS110, so that could be a problem.  For POP, I can watch POPDC to see if something is a carrier or a sideband flash, but I don't have something quite as convenient at the AS port.  I have set the AS110 phase to 60 degrees for now, since during free swinging DRMI flashes, it looks like most of the buildup is in the I phase with 60 degrees.  Even with the same configurations as a week or so ago, I'm not getting much more than ~1 second locks.

I also tried locking the SRMI, but am not getting anything at all.  I think I need to go back to simulation-land to figure out what good signals might be.

 


Other thoughts:

Stefan modified the LSC filter module triggering blocks, so now we have a new epics variable, "_INVERT", which sends the trigger through a NOT or not.  I think that we want to keep this variable set to 0 to be the same as things were, but I do need to expose this new variable on the screens.

The trigger and normalization matrices pictured on the LSC overview screen need to be expanded by the 2 new columns.  The actual matrix screens are good, but I forgot to fix up the little Kissel buttons.

When I have a free swinging SRMI, MICH and SRCL should have the same sign for the gain, if I'm using AS55 I&Q for locking.

LLO is using REFL 9I for SRCL, and ASDC for MICH for the SRMI, but I don't have any REFL beam with a misaligned PRM, so I don't think I can copy what Den and Lisa did on Monday night.

I have figured out / rediscovered why the "sqrt" buttons on the power normalization screen aren't restored when you restart the LSC model - They are controlled by momentary epics records, which go to embedded c-code to do some toggling.  I don't know yet of a good way to save the configuration of these guys for burt restore-type restoration.  This will be a problem for anything that is using these toggle c-codes.

  4912   Wed Jun 29 14:43:12 2011 KojiUpdateLSCLSC model updated

LSC model has been updated and running,

- Now the power and signal recycling cavity lengths are named "PRCL" and "SRCL" in stead of three letter names without "L".

- Names for the trigger monitor were fixed. They are now "C1:LSC-DARM_TRIG_MON", etc., instead of "...NORM"

- Channel order of the DC signals for PDDC_MTRX and TRIG_MTRX were changed.

It was "TRX, TRY, REFL, AS, POP, POX, POY" but now "AS, REFL, POP, POX, POY, TRX, TRY".

We should change the locking script to accomodate these changes.

  4962   Tue Jul 12 11:52:54 2011 Jamie, SureshUpdateLSCLSC model updates

The LSC model has been updated:

Binary outputs to control whitening filter switching

We now take the filter state bit from the first filter bank in all RF PD I/Q filter banks (AS55_I, REFL11_Q, etc) as the controls for the binary analog whitening switching on the RF PD I/Q inputs. The RF_PD part was also modified to output this control bit. The bits from the individual PDs are then combined into the various words that are written to the Contec BO part.

Channel mapping updated/fixed to reflect wiring specification

Yesterday Suresh posted an updated LSC wiring diagram, with correct channel assignments for the RF PD I/Q and DC inputs.  Upon inspection of the physical hardware we found that some of LSC the wiring was incorrect, with I/Q channels swapped, and some of the PDs in the wrong channels.  We went through and fixed the physical wiring to reflect the diagram.  This almost certainly will affect the EPICS settings for some of the input channels, such as offsets and RD rotations.  We should therefore go through all of the RF inputs and make sure everything is kosher.

I also fixed all of the wiring in the LSC model to also reflect the diagram.

Once this was all done, I rebuilt and restarted the LSC model, and confirmed that the anti-whitening filter banks in the PD input filter modules were indeed switching the correct bits.  I'll next put together a script to confirm that the LSC PD whitening is switching as it should.

 

  1214   Fri Jan 2 18:49:54 2009 YoichiUpdateLSCLSC modulation frequencies adjusted
I noticed that the IFO did not lock in the MICH configuration.
This was because AS166Q signal was too small.
The demodulation phase seemed not right, i.e. the I-phase signal was larger than Q.
I suspected that the 166MHz modulation frequency was not exactly on the MC FSR, since I just
recovered the number written on the Marconi after the power failure.
I measured the optimal frequency by the method explained in elog:752.
It was 165981500Hz, which is pretty close to the number Rob measured in elog:952, but significantly different from
the label on the Marconi.
I set the frequencies of all the MARCONIs accordingly and updated the labels.

After this, the AS166 demodulation phase was still not good enough (the Q and I signals were about the same).
So I rotated the phase by 45deg. In principle, this should set the demod-phase right for DARM too. Is it correct, Rob ?
I also adjusted the PD offsets. After those adjustments, MICH locks stably with a slightly increased gain (20 as compared to 10 before).
  8729   Wed Jun 19 22:38:15 2013 JenneUpdateComputer Scripts / ProgramsLSC normalization sqrt_mon channels added to conlog

 

 Something has happened that all of the C1:LSC-dof_NORM_SQRT_ENABLEs are disabled, but normally some are enabled and others are not.

In the hopes that miraculously this change happened after Jamie restarted the conlog this afternoon, I checked the conlog.  These channels, however, were not recorded. 

Using the instructions on the conlog wiki page, I added the _MON channels to the conlog list.  The one snag I hit was that the medm screen referred to in the wiki isn't usable if you open it by hand using the medm gui, since it needs to know what IFO you're at to fill in the macro expansion variables.  To remedy this, I changed the "FE STATUS" button on the sitemap to "CDS", and added the conlog screen to the list of options.  

Now I see that the conlog at least knows about these channels, for future reference.

  9868   Mon Apr 28 13:18:18 2014 JenneUpdateLSCLSC offsets script modified

Quote:

The weird jumps at the beginning of each TRX peak are due to the triggered switching between the Thorlabs trans PD and the QPD trans PD.  Clearly we need to work on their relative normalizations.  There are also little jumps after each peak as the triggering sends the signal back to the Thorlabs PD.

 I was unhappy with the discontinuities between the Thorlabs and QPD versions of our transmitted light powers.  I realized that in the olden days, we just used the Thorlabs PD, and we set the no-light offset in the LSC version of the TR[x,y] filter banks.  However, now that we have brought the QPDs back, we are setting the dark offsets in the end suspension models, so that the signal chosen by the trigger already has its offset taken care of before we send it to the LSC model. 

Anyhow, having the offsets script try to put a value in the C1:LSC-TR[x,y]_OFFSET was giving us an extra offset and then when we did the normalizations, the numbers came out all wrong.  So.  I have removed the C1:LSC-TR[x,y] filter banks from the offset list, since they were made redundant. 

I have redone the normalizations for both arms (after running the ASS scripts).  I checked by watching the _OUT16 versions of the Thorlabs and QPD diodes before the triggering happens, and as I put offsets into the LSC servos to change the transmitted power, the diodes both change in the same way.  So, we'll have to see if this holds true for more than just values 0-1 the next time we lock, but hopefully it won't need changing for a while.

  4644   Thu May 5 15:33:37 2011 steveConfigurationRF SystemLSC rack

New right angle PVC front panel with SMA bulkhead connectors are in place. The connections are still lose. It is ready for Suresh to finalise his vision on it.

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  4768   Fri May 27 17:52:53 2011 steveUpdateLSCLSC rack cables strain relieved & labeled

LSC rack 1Y2 cables are strain relieved and labeled. Spare and/or obsolete cables are laid out on the top of the beam tube and on the outside of the rack.

The POY 110 MHZ demodboard has a very touchy position in the VME crate. Watch out for it! It has to be fixed.

  4957   Fri Jul 8 19:50:19 2011 SureshUpdateRF SystemLSC rack channel assignment

[Jamie, Suresh]

   We looked at the ADC channel assignments in the LSC model and wanted to make sure that the LSC rack wiring and the LSC model are in agreement with each other.  So the plan is to wire the rack as shown below.  I will also post this file on svn so that we can keep it updated in case there are changes.

 

1Y2_Rack_Layout.png


 

  4540   Mon Apr 18 17:47:41 2011 kiwamuConfigurationLSCLSC rack's ADC cabling

To understand the situation of the ADC cabling at the LSC rack I looked around the rack and the cables.

The final goal of this investigation is to have nice and noise less cables for the ADCs (i.e. non-ribbon cable)

Here is just a report about the current cabling.

 

(current configuration)

At the moment there is only one ribbon-twisted cable going from 1Y2 to 1Y3. (We are supposed to have 4 cables).

At the 1Y2 rack the cable is connected to an AA board with a 40 pin female IDC connector.

At the 1Y3 rack the cable is connected to an ADC board with a 37 pin female D-sub connector.

The ribbon cable is 28AWG with 0.05" conductor spacing and has 25 twisted pairs (50 wires).

LSCrack.png

 

(things to be done)

 - searching for a twisted-shielded cable which can nicely fits to the 40 pin IDC and 37 pin D-sub connectors.

 - estimating how long cable we need and getting the quote from a vendor.

 - designing a strain relief support

  6749   Mon Jun 4 17:14:31 2012 JenneUpdateLSCLSC recompiled several times today

As of now, the regular LSC DoF triggers work, just as they used to.  There is a problem with the filter module triggers that I haven't figured out yet. 

We can't send integers (like control words for the filter banks) through Choice blocks, since those pass doubles by default.  I fixed that by removing the choice block, but the triggering still isn't happening properly.

  4818   Tue Jun 14 18:12:34 2011 Jamie, KiwamuUpdateLSCLSC seems to be fully recovered

We are now locking the arms reliably, with reasonable transmitted power.  We zeroed the LSC offsets with script, since they were apparently not being reset with either the overall burt restore or the arm restore scripts.

We have lost a bit of power through the mode cleaner.  However, we have opted not to tweak it up just yet, so that we don't have to realign to the arms.

  10660   Sat Nov 1 02:13:11 2014 KojiConfigurationLSCLSC settings

I'm leaving the iFO now. It is left with the IR arm mode.

I pretty much messed up LSC configurations for my DRMI locking. If one needs to recover the previous setting, use burtrestore.
I have all records of my LSC settings, so you don't need to preserve it. (Of course we can always use the hourly snapshots
to come back this DRMI setting)

 

  9308   Tue Oct 29 16:51:31 2013 JenneUpdateCDSLSC test points were used up

Masayuki was concerned that some LSC channels were giving him all zeros.  After seeing the error in the terminal window running dataviewer (it said something like 'daqd overloaded'), I checked the lsc model, and sure enough, all the test points were used.

So, I found an entry by Jamie (elog 8431) where he reminds us how to clear the test points.  I followed the instructions, and now we're seeing real data (not digital zeros) again.

  2111   Sun Oct 18 22:05:40 2009 kiwamuUpdateLSCLSC timing issue

Today I made a measurement to research the LSC timitng issue as mentioned on Oct.16th.

*method

I put the triangular-wave into the OMC side (OMC-LSC_DRIVER_EXT) by AWG,

then looked at the transferred same signal at the LSC side (LSC_DARM_IN1) by using tdsdata.

I have compared these two signals in time domain to check whether they are the same or not.

In the ideal case it is expected that they are exactly the same.

 

*preliminary result

The measured data are shown in attached fig.1 and 2.

In the fig.1 it looks like they are the same signal.

However in fig.2 which is just magnified plot of fig.1, it shows a time-delay apparently between them.

The delay time is roughly ~50 micro sec.

The surprising is that the LSC signal is going beyond the OMC signal, although the OMC signal drives the LSC !!

We can say it is "negative delay"...

Anyway we can guess that the time stamp or something is wrong.

 

*next plan

Tomorrow I'm going to measure the transfer-function between them to see the delay more clearly.

( And I would like to fix the delay. )

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  2113   Sun Oct 18 23:02:03 2009 KojiUpdateLSCLSC timing issue

You yourself told me that tdsdata uses some downconversion from 32k to 16k!

So, how does the downconversion appears in the measurement?
How does the difference of the sampling rate appears in the measurement?
If you like to understand the delay, you have to dig into the downconversion
issue until you get the EXACT mechanism including the filter coefficients.

AND, is the transfer function the matter now?

As far as the LSC and OMC have some firm relationship, whichever this is phase delay or advance or any kind of filering,
this will not introduce any noise. If so, this is just OK.

In my understanding, the additional noise caused by the clock jitter is the essential problem.
So, did you observe any noise from the data?

Quote:

*preliminary result

The measured data are shown in attached fig.1 and 2.

In the fig.1 it looks like they are the same signal.

However in fig.2 which is just magnified plot of fig.1, it shows a time-delay apparently between them.

The delay time is roughly ~50 micro sec.

The surprising is that the LSC signal is going beyond the OMC signal, although the OMC signal drives the LSC !!

We can say it is "negative delay"...

Anyway we can guess that the time stamp or something is wrong.

 

*next plan

Tomorrow I'm going to measure the transfer-function between them to see the delay more clearly.

( And I would like to fix the delay. )

 

  2122   Mon Oct 19 23:14:32 2009 kiwamuUpdateLSCLSC timing issue

I measured the noise spectrum of LSC_DARM_IN1 and OMC-LSC_DRIVE_EXC by using DTT,

while injecting the sin-wave into the OMC-LSC_DRIVE by AWG.

The attached are the results.

No significant differences appears between OMC and LSC in this measurement.

It means, in this measurement we can not figure out any timing noise which might be in LSC-clock.

In addition there are the noise floor, whose level does not change in each 3-figures. The level is about ~4*10^{-8} count/sqrt[Hz]

(The source of the noise floor is still under research.)

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  6735   Thu May 31 23:53:00 2012 JenneUpdateLSCLSC trigger update

I modified the lsc model (after Jamie finished) to use a new triggering scheme.  It HAS NOT yet been compiled and tested, since it's way past time for us to start beatnote-ing.  I will compile, test, debug, etc. tomorrow. Don't compile the LSC model tonight. 

Now we also have (assuming no bugs.....) triggering capability for the filter modules in the filter banks.  Yay!  Testing, etc will commence tomorrow.

  6829   Mon Jun 18 16:23:59 2012 JenneUpdateLockingLSC trigger update

The LSC triggers for the individual filter modules in a filter bank now works.  This is handy so that boosts can come on as soon as a cavity is locked, but will turn off when the cavity unlocks.

You choose which filter modules you want to be triggered, and which ones you want to be manually controlled. 

Example:  LSC-YARM    FM4 and FM5 should always be on, but FM2 and FM3 are controlled by the trigger.  You can set the trigger thresholds for the filter modules independently of the main DoF enable trigger thresholds.

  13921   Wed Jun 6 14:50:25 2018 gautamUpdateGeneralLSC triggering

I though that the "C1LSC_TRIG_MTRX" MEDM screen completely controls the triggring of LSC signals. But today while trying to trigger the X-arm locking servo on AS110 instead of TRX, I found some strange behaviour. Summary of important points:

  1. Even though the servo was supposed to be triggered on AS110, the act of me blocking the beam on the EX table destroyed the lock. I verified the correlation between me blocking the beam and the lock being destroyed by repeating the blocking at least 10 times at different locations along the beam path (to make sure I wasn't accidentally clipping the Oplev beam for example).
  2. Investigating further, I found that me turning off the TRX signal digitally also deterministically led to the X arm lock being lost. To be clear, the TRX DC element in the trigger matrix was 0.
  3. Confirmed that TRX wasn't involved in any way in the locking servo (I was checking for normalization of the PDH error signal by the DC transmission value, but this is not done). To do this, I locked the arm, and then turned all elements corresponding to TRX in the PowNorm matrix to 0. Then I disabled the locking servo and re-enabled it, and the lock was readily re-acquired readily.

All very strange, not sure what's going on here. The simulink model diagram also didn't give me any clues. Need's further investigation.

Attachment 1: LSC_TRIG.png
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  4430   Wed Mar 23 09:54:46 2011 steveOmnistructurePhotosLSC visitors

The 40m lab was visited by  ~ 30 LSC members  the end of last week.

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  8444   Thu Apr 11 11:58:21 2013 JenneUpdateComputersLSC whitening c-code ready

The big hold-up with getting the LSC whitening triggering ready has been a problem with running the c-code on the front end models.  That problem has now been solved (Thanks Alex!), so I can move forward.

The background:

We want the RFPD whitening filters to be OFF while in acquisition mode, but after we lock, we want to turn the analog whitening (and the digital compensation) ON.  The difference between this and the other DoF and filter module triggers is that we must parse the input matrix to see which PD is being used for locking at that time.  It is the c-code that parses this matrix that has been causing trouble.  I have been testing this code on the c1tst.mdl, which runs on the Y-end computer.  Every time I tried to compile and run the c1tst model, the entire Y-end computer would crash.

The solution:

Alex came over to look at things with Jamie and me.  In the 2.5 version of the RCG (which we are still using), there is an optimization flag "-O3" in the make file.  This optimization, while it can make models run a little faster, has been known in the past to cause problems.  Here at the 40m, our make files had an if-statement, so that the c1pem model would compile using the "-O" optimization flag instead, so clearly we had seen the problem here before, probably when Masha was here and running the neural network code on the pem model.  In the RCG 2.6 release, all models are compiled using the "-O" flag.  We tried compiling the c1tst model with this "-O" optimization, and the model started and the computer is just fine.  This solved the problem.

Since we are going to upgrade to RCG 2.6 in the near-ish future anyway, Alex changed our make files so that all models will now compile with the "-O" flagWe should monitor other models when we recompile them, to make sure none of them start running long with the different optimization. 

The future:

Implement LSC whitening triggering!

  4915   Thu Jun 30 00:58:19 2011 KojiSummaryLSCLSC whitening filter test

[Jenne, Koji]

We have tested the LSC whitening filters. In summary, they show the transfer functions mostly as expected (15Hz zerox2, 150Hz pole x2).
Only CH26 (related to the slow channel "C1:LSC-PD9_I2_WhiteGain. VAL NMS", which has PD10I label in MEDM) showed different
phase response. Could it be an anti aliasing filter bypassed???

The 32 transfer functions obtained will be fit and summarized by the ZPK parameters.


Method:

The CDS system was used in order to get the transfer functions
- For this purpose, three filter modules ("LSC-XXX_I", "LSC-XXX_Q", "LSC-XXX_DC") were added to c1lsc
in order to allow us to access to the unused ADC channels. Those filter modules have terminated outputs.
The model was built and installed. FB was restarted in order to accomodate the new channels.

- Borrow a channel from ETMY UL coil output mon. Drag the cable from the ETMY rack to the LSC analog rack.
- Use 7 BNC Ts to split the signal in to 8 SMA cables.
- Put those 8 signals into each whitening filter module.

- The excitation signal was injected to C1:SUS-ETMY_ULCOIL_EXC by AWGGUI.
- The transfer functions were measured by DTT.
- The excitation signal was filtered by the filter zpk([150;150],[15;15],1,"n")
   so that the whitened output get flat so as to ensure the S/N of the measurement.

- For the switching, we have connected the CONTEC Binary Output Test board to the BIO adapter module
   in stead of the flat cable from the BIO card. This allow us to switch the individual channels manually.

- The whitening filters of 7 channels were turned on, while the last one is left turned off.
- We believe that the transfer functions are flat and equivalent if the filters are turned off.
- Use the "off" channel as the reference and measure the transfer functions of the other channels.
- This removes the effect of the anti imaging filter at ETMY.

- Once the measurement of the 7 channels are done, switch the role of the channels and take the transfer function for the remaining one channel.

Result:

- We found the following channel assignment

  • The ADC channels and the PDs. This was known and just a confirmation. 
  • The ADC channels and the WF filter on MEDM (and name of the slow channel)

- We found that the binary IO cable at the back of the whitening filter module for ADC CH00-CH07 were not connected properly.
This was because the pins of the backplane connector were bent. We fixed the pins and the connector has been properly inserted.

- CH26 (related to the slow channel "C1:LSC-PD9_I2_WhiteGain. VAL NMS", which has PD10I label in MEDM) showed different
phase response from the others although the amplitude response is identical.

Summary of the channel assignment (THEY ARE OBSOLETE - SEPT 20, 2011)

ADC                    Whitening Filter
CH  PD                 name in medm   related slow channel name for gain
---------------------------------------------------------------------------
00  POY11I             PD1I           C1:LSC-ASPD1_I_WhiteGain. VAL NMS
01  POY11Q             PD1Q          
C1:LSC-ASPD1_Q_WhiteGain. VAL NMS
02  POX11I             PD2I           C1:LSC-SPD1_I_WhiteGain. VAL NMS
03  POX11Q             PD2Q           C1:LSC-SPD1_Q_WhiteGain. VAL NMS
04  REFL11I            PD3I           C1:LSC-POB1_I_WhiteGain. VAL NMS
05  REFL11Q            PD3Q           C1:LSC-POB1_Q_WhiteGain. VAL NMS
06  AS11I              PD4I           C1:LSC-ASPD2_I_WhiteGain. VAL NMS
07  AS11Q              PD4Q           C1:LSC-ASPD2_Q_WhiteGain. VAL NMS
08  AS55I              AS55_I         C1:LSC-ASPD1DC_WhiteGain. VAL NMS
09  AS55Q              AS55_Q         C1:LSC-SPD1DC_WhiteGain. VAL NMS
10  REFL55I            PD3_DC         C1:LSC-POB1DC_WhiteGain. VAL NMS
11  REFL55Q            PD4_DC         C1:LSC-PD4DC_WhiteGain. VAL NMS
12  POP55I             PD5_DC         C1:LSC-PD5DC_WhiteGain. VAL NMS
13  POP55Q             PD7_DC         C1:LSC-PD7DC_WhiteGain. VAL NMS
14  REFL165I           PD9_DC         C1:LSC-PD9DC_WhiteGain. VAL NMS
15  REFL165Q           PD11_DC        C1:LSC-PD11DC_WhiteGain. VAL NMS
16  NC (named XXX_I)   PD5I           C1:LSC-SPD2_I_WhiteGain. VAL NMS
17  NC (named XXX_Q)   PD5Q           C1:LSC-SPD2_Q_WhiteGain. VAL NMS
18  AS165I             PD6I           C1:LSC-SPD3_I_WhiteGain. VAL NMS
19  AS165Q             PD6Q           C1:LSC-SPD3_Q_WhiteGain. VAL NMS
20  REFL33I            PD7I           C1:LSC-POB2_I_WhiteGain. VAL NMS
21  REFL33Q            PD7Q
           C1:LSC-POB2_Q_WhiteGain. VAL NMS
22  POP22I             PD8I
           C1:LSC-ASPD3_I_WhiteGain. VAL NMS
23  POP22Q             PD8Q
           C1:LSC-ASPD3_Q_WhiteGain. VAL NMS
24  POP110I            PD9I
           C1:LSC-PD9_I1_WhiteGain. VAL NMS
25  POP110Q            PD9Q
           C1:LSC-PD9_Q1_WhiteGain. VAL NMS
26  NC (named XXX_DC)  PD10I
          C1:LSC-PD9_I2_WhiteGain. VAL NMS
27  POPDC              PD10Q
          C1:LSC-PD9_Q2_WhiteGain. VAL NMS
28  POYDC              PD11I
          C1:LSC-PD11_I_WhiteGain. VAL NMS
29  POXDC              PD11Q
          C1:LSC-PD11_Q_WhiteGain. VAL NMS
30  REFLDC             PD12I
          C1:LSC-PD12_I_WhiteGain. VAL NMS
31  ASDC               ASDC
           C1:LSC-PD12_Q_WhiteGain. VAL NMS
---------------------------------------------------------------------------

Attachment 1: chans_24_31_WeirdPhase.pdf
chans_24_31_WeirdPhase.pdf
Attachment 2: Octopus.jpg
Octopus.jpg
Attachment 3: Test_Inputs_Plugged_In.jpg
Test_Inputs_Plugged_In.jpg
Attachment 4: Contec_Tester_Board.jpg
Contec_Tester_Board.jpg
  4577   Wed Apr 27 21:19:25 2011 kiwamuUpdateLSCLSC whitening for PD1-4

On the back side of 1Y2 rack I found a cable, CAB-1X2-LSC_7, which is supposed to be connected to the whitening filter was disconnected.

I plugged it back and confirmed that the whitening filter is under control of EPICS.

Now all the gain sliders seem to be working because I can change the amplitude of signals with the sliders.

 

(method)

  To check if the gain sliders are working or not, I intentionally disconnected all the inputs to the whitening filter.

Then I brought a gain slider of interest to the maximum. Due to the big gain I was easily able to see noise lying above ADC noise.

Also if the gain slider is 0 dB, which is the minimum value, the spectrum becomes just ADC noise.

In this way I checked all the gain sliders from PD1 to PD4. The picture below is just an example screenshot when I was doing this test.

Note that each filer is designed to have two poles at 150 Hz and two zeros at 15 Hz.

Screenshot-1.png

Quote from #4570

While checking whitening filters on the LSC rack, I found some epics controls for the whitening looked not working.

So I powered two crates off : the top one and the bottom one on 1Y3 rack.

These crates contain c1iscaux and c1iscaux2. Then powered them on. But it didn't solve the issue.

  8215   Sun Mar 3 22:16:46 2013 JenneUpdateLSCLSC whitening triggering started

[Jenne, Annalisa]

We have started working on writing the c-code to parse the LSC input matrix, to see which PD is used for what degree of freedom, and to output a trigger for the PD.  The code is in ..../isc/c1/src, and there is a little block in the LSC code to the left of the triggering stuff.  Right now, the output of the c-code just goes to some temporary EPICS channels, so that we can see if things are working before we actually implement it.  At this time, there is no change to how the LSC model runs.

I can't figure out a bug in my c-code though.  Right now it's all commented out, so that the LSC model would start, but if I try to sum all of the elements in an array, the model compiles fine, but it won't start running.  I'm going to ask Jamie about it tomorrow.  I have a less-tidy backup plan if we can't get this figured out.

If I have time on the IFO to check that this works tomorrow, I expect another few hours of work (2?  3?), and then we'll have whitening filter triggering.

  8217   Mon Mar 4 09:55:33 2013 ranaUpdateLSCLSC whitening triggering started

  How about posting a logic flow diagram? Is the idea to trigger only on the power signals to determine the lock state? Is the hysteresis going to be done in the same way as the main filter bank triggers?

  8234   Tue Mar 5 18:36:27 2013 JenneUpdateLSCLSC whitening triggering started

More effort at debugging the LSC whitening. 

Today I tried moving things over to the c1tst model, which runs on the y-end computer, but I crashed c1iscey.  I rebuilt the TST model to a known good state, then cycled the power on c1iscey, and the computer came back up fine. 

I have now backed off and am just writing the code inside a little wrapper script, so that I can just compile and test the code completely independent from the realtime system.  Then once I get all the bugs out, I can try again installing on the actual system.

Still, there are no changes to the functionality of the c1lsc model.  There will not be until I get the c-code for matrix parsing debugged.

The logic, in non-diagram form (I'll make a diagram, but so you can read without waiting):

*** C-code

* Inputs is an array of degree of freedom triggers, the same schmidt triggers used for main LSC locking. (This means it also uses the same thresholds as main triggers.  Side note, now that the WAIT command (see below) works, I want to change the filter module triggers to use the same main trigger, and then just wait a specified time before turning on.)

* Parse the LSC input matrix (internal to the c-code).

     * This tells you which photodiode is being used to control which degree of freedom.

* Multiply rows of the LSC input matrix by the degree of freedom triggers (the same trigger as the main LSC triggers, which is a schmidt trigger).

     * This gives a matrix, where non-zero elements indicate that a photodiode is supposed to be used for a degree of freedom, AND that DoF has been triggered (is locked or has flashed).

* Sum along the columns of the matrix.

     * If a column has a non-zero element, that means that that PD quadrature is used, and has been triggered (by any DoF).

* Apply OR to I and Q quadratures of each PD. 

      * Since the phase rotation happens after whitening and dewhitening, if either I_ERR or Q_ERR is requested (used and triggered), we need to turn on the whitening for both channels.  I am hopeful that this doesn't cause problems for cases when we want to use both quadratures of a PD to control 2 degrees of freedom, but I haven't yet put much thought into it.  COMMENTS WELCOME on this point.

*  Output of c-block is array of PD triggers.  So if either AS11I or AS11Q is triggered, output a "1" for the first element, which corresponds to AS11, etc.

*** LSC model

* Give GoTo/From flag for each DoF trigger to the mux of inputs.

* Go through c-code

* Demux outputs into GoTo/From flags, one per PD (one flag for AS11, one for AS55, and one for ASDC...DC elements count separately, even though they're derived from the same physical PD).

* For each PD, trigger flag goes through WAIT c-code

   * This allows you to define a wait time, in seconds, with an EPICS variable. 

   * Starts counting the wait time as soon as it receives a "1".  Resets counter each time it receives a "0".

    * Output of wait function is ANDed with the current (non-delayed) trigger.

         * This allows for cavity to flash, but if it's not still locked after the wait time, don't actually flip any switches.

* Use delayed ANDed trigger to flip the FM1 switch on both the I and Q filterbank for that PD.

  8462   Thu Apr 18 19:54:11 2013 JenneUpdateLSCLSC whitening triggering working

I have implemented automatic triggered switching of the analog whitening (and digital dewhitening). 

The trigger is the same as the degree of freedom trigger.  On the LSC RFPD screen there is a space to enter the amount of time (in seconds) you would like to wait between receiving a trigger and actually having the whitening filter switch. 

The trigger logic is as follows: 

* For each column of the LSC input matrix (e.g. AS11 I), check if there is a non-zero element.  If there is a non-zero element (indicating that we are using that PD as the error signal for a degree of freedom), check if the corresponding DoF has been triggered.  Repeat for all columns of the matrix. 

* If either the I or the Q signal from a single PD is being used, send a trigger in the direction of the PD signal conditioning / phase rotation blocks.  (Since the whitening happens before the phase rotation, we want to have the whitening state be the same for both the I and Q signals coming from the demod boards.

* Before actually changing the whitening state, wait for the amount of time indicated on the RFPD overview screen.

* Switch the digital dewhitening.  If the digital dewhitening is on, send a bit over to the binary I/O to switch the analog whitening on.

LSC_triggers.png

LSC_SigCond.png

 

This required changing the LSC RF_PD library part so that you can send the trigger to the filter bank from outside that part..  This part is in use by all LSC models, so I'll make sure the LLO people are aware of this change before I commit it to the svn.

RF_PD_block.png

 

While I was working on the LSC model, I also put in a wait between the time that the filter module trigger is received, and when it actually switches the filter modules.  So far, this time is defined for a whole filter bank (so all filters for a given DoF still switch at the same time).  If I need to go back and make the timing individual for each filter module, I can do that.  This new EPICS variable (the WAIT) defaults to zero seconds, so the functionality will not change for anyone who uses this part.

LSC_FM_Trig.png

These changes also require 2 pieces of c-code:  {userapps}/cds/common/src/wait.c and {userapps}/isc/c1/src/inmtrxparse.c

  7184   Tue Aug 14 22:16:46 2012 JenneUpdateLSCLSC whitening triggers

I'm ~30% of the way through implementing LSC whitening filter triggers.  I think that everything I have done should be compile-able, but please don't compile c1lsc tonight.  I haven't tested it, and some channel names have changed, so I need to fix the LSC screen when I'm not falling asleep.

Also, Rana pointed out that we may not want the whitening to trigger on immediately upon acquiring lock - if there are other modes ringing down in the cavity, or some weird transients, we don't want to amplify those signals.  We want to wait a second or so for them to die down, then turn on analog whitening.  Jamie - do you know how long the "unit delay" delays things in the RCG?  Do those do what I naively think they do?  I'll ask you in the morning.

  7188   Wed Aug 15 09:09:45 2012 jamieUpdateLSCLSC whitening triggers

Quote:

I'm ~30% of the way through implementing LSC whitening filter triggers.  I think that everything I have done should be compile-able, but please don't compile c1lsc tonight.  I haven't tested it, and some channel names have changed, so I need to fix the LSC screen when I'm not falling asleep.

Also, Rana pointed out that we may not want the whitening to trigger on immediately upon acquiring lock - if there are other modes ringing down in the cavity, or some weird transients, we don't want to amplify those signals.  We want to wait a second or so for them to die down, then turn on analog whitening.  Jamie - do you know how long the "unit delay" delays things in the RCG?  Do those do what I naively think they do?  I'll ask you in the morning.

The unit delay delays for a single cycle, so I think that's not what you want.  I'm not sure that there's an existing part to add delays like that.

We also need to be a little clever about it, though, since we'll want it to flip off if we loose lock during the delay.

  276   Sat Jan 26 22:00:03 2008 JohnUpdateGeneralLSC-TRY_OUT and ETMY-QPD
In the path from the ETM to the trans PD and QPD at the Y end I have replaced a BS1-1064-10-2037-45P with a polariser. The power falling on these diodes has been reduced. When the arm is locked in its nominal state the transmitted power is now less than 1.

This polariser should serve as an injection point for the auxiliary arm locking. I am attempting to use crossed polarisations to separate this loop from the main arm light.
  11515   Wed Aug 19 00:55:35 2015 IgnacioUpdateLSCLSC-YARM-EXC to LSC-YARM-IN1 TF measurement + error analysis

Yesterday, Rana, Jessica and I measured the Transfer function from LSC-YARM-EXC to LSC-YARM-IN1. 

The plot below shows the magnitude and the phase of the measured transfer function. It also shows the normalized standard error in the estimated transfer function magnitude; the same quantity can be applied to the phase, only in this case it is interpreted as its standard deviation (not normalized). It is given by

 \frac{[1-\gamma_{xy}^2(f)]^{1/2}}{|\gamma_{xy}(f)|\sqrt{2n_{d}}}

where \gamma_{xy}^2(f) is the ordinary coherence function and n_{d} is the number of averages used at each point of the estimate, in the case here we used 9 averages. This quantity is of interest to us in order to understand how the accuracy of transfer function measurement affects the ammount of subtraction that can be achieved online.

 

Since this transfer function is flat from 1-10 Hz (out of phase by 180 deg), this means that we can apply our IIR wiener filters direclty into YARM without taking into account the TF by prefiltering our witnesses with it. Of course this is not the case if we care about subtractions at frequencies higher than 10 Hz, but since we are dealing with seismic noise this is not a concern.

The coherence for this transfer function measurement is shown below,

  2946   Tue May 18 14:30:31 2010 josephbUpdateCDSLSC.mdl problem found and fixed

After having checked old possibilities and deciding I wasn't imagining the lsc.mdl file not working, but working as another name, I tracked Alex down and asked for help.

After scratching our heads, we finally tracked it down to the RCG code itself, as opposed to any existing code.

Apparently, the skeleton.st file (located in /home/controls/cds/advLigoRTS/src/epics/util/) has special additional behavior for models with the following names: lsc, asc, hepi, hepia, asc40m, ascmc, tchsh1, tchsh2.

Alex was unsure what this additional code was for.  To disable it, we went into the skeleton.st file, and changed the name "SEQUENCER_NAME_lsc" to "SEQUENCER_NAME_lsc_removed" where ever it occured.  These names were in #ifdef statements, so now these codes will only be used if the model is named lsc_removed.  This apparently fixed the problem.  Running startlsc now runs the code as it should, and I can proceed to testing the communication to the lsp model.

Alex said he'd try to figure out what these special #ifdef code pieces are intended for and hopefully completely remove them once we've determined we don't need it.

  8553   Wed May 8 19:31:17 2013 JamieConfigurationLSCLSC: added new SQRT_SWITCH to power normalization DOF outputs

This removes the old sqrt'ing from the inputs to the POW_NORM matrix (was only on the POP110 I/Q) and moves it to the DOF outputs.  Koji wanted this so that he could use the DC signals for normalization both sqrt'd and not sqrt'd.

The POW_NORM medm screen was updated accordingly.

  8501   Sat Apr 27 00:29:40 2013 KojiUpdateLSCLSCoffset script fixed

Prior to the locking trials...

scripts/LSC/LSCoffset script had behaved peculiarly:

This script spawns LSC/offset3 in order to remove the dark offset from the channels.
How ever the offsets had been nulled every other PDs
(i.e. The offsets REFL11 I&Q were nulled.
The offsets REFL33 I&Q had been left untouched
The offset REFL55 I&Q had been nulled
and so on.)

I found that the script run many instances of "offset3" scripts in background.
It seemed that tdsavg did not like too many averaging channels at once.

So the "&"s in the LSCoffsets were removed and now the script runs much more slowly,
but works for all of the PDs listed.

I think I have never seen the offsets in REFL33 and REFL165 nulled down to this level before.

  9063   Mon Aug 26 18:59:08 2013 MasayukiUpdateLSCLSCoffset script updated

I made scripts/LSC/LSCoffsets2.py which is the script to zero the dark offset of all the LSC PD.  The list of PDs is same as the list in scripts/LSC/LSCoffsets. New script average all outputs of PDs parallelly, so we can zero the offsets much faster.

You can define the averaging time, and you can choose the channel for getting the dark offset from INMON or OUT16. You should know that if you use OUT16 channel, the effect of the unwhite filter is not taken into account.

Example usage (at scripts/LSC):

   ./LSCoffsets2.py -d 20 --out16

you can find the help by calling this script with option -h or --help

  9064   Mon Aug 26 19:13:38 2013 KojiUpdateLSCLSCoffset script updated

What do you mean???

What is the effect of the anti-whitening filter?

Quote:

You should know that if you use OUT16 channel, the effect of the unwhite filter is not taken into account.

 

  3062   Thu Jun 10 07:53:14 2010 AlbertoUpdatePEMLaTeXlabs

Quote:

BTW, latex launched this new thing for writing pdfs. doesnot require any installations.  check  http://docs.latexlab.org

 so cool!

  3063   Thu Jun 10 10:58:02 2010 KojiUpdateGeneralLaTeXlabs

I could not dare to share my google doc with this site...

Quote:

Quote:

BTW, latex launched this new thing for writing pdfs. doesnot require any installations.  check  http://docs.latexlab.org

 so cool!

 

  3064   Thu Jun 10 11:10:21 2010 AlbertoUpdateGeneralLaTeXlabs

Quote:

I could not dare to share my google doc with this site...

Quote:

Quote:

BTW, latex launched this new thing for writing pdfs. doesnot require any installations.  check  http://docs.latexlab.org

 so cool!

 

Just in case,  granted access to Google docs can be revoked any time from here:

https://www.google.com/accounts/IssuedAuthSubTokens

  17110   Mon Aug 29 13:33:09 2022 JCUpdateGeneralLab Cleanup

The machine shop looked a mess this morning, so I cleaned it up. All power tools are now placed in the drawers in the machine shop. Let me know if there are any questions of where anything here is placed. 

Attachment 1: EDE63209-D556-41F1-9BF2-89CD78E3D7B7.jpeg
EDE63209-D556-41F1-9BF2-89CD78E3D7B7.jpeg
  17187   Thu Oct 13 14:46:34 2022 JCUpdateLab OrganizationLab Cleanup 10/12/2022

During Wednesday’s lab clean up, we made a ton of progress in organization. Our main focus was to tackle CDS debris from the ongoing upgrade. We proceeded with the following tasks.

  • Loop the OneStop Cables and mark ‘good’ or ‘bad’.
  • Clean materials from the PD testing table.
  • Removed the SuperMicro boxes from the lab
  • Vacuum area organization.
  • Remove old plastic containers from the laboratory.
  • Relocate Koji’s electronics underneath Y-Arm
  • Arrange cabling to the TestStand and create clearance to the Machine Shop/Laboratory exit.

Attachment #2 shows that all the CDS equipment has been relocated behind Section X3 of the X-Arm.

Attachment 1: IMG_6356.JPG
IMG_6356.JPG
Attachment 2: IMG_6358.JPG
IMG_6358.JPG
  17188   Thu Oct 13 19:06:42 2022 KojiUpdateLab OrganizationLab Cleanup 10/12/2022

I have moved the following electronics / components to "Section Y10 beneath the tube"

  • IQ Demod Spares D0902745 (Components)
  • Sat Box / HAM-A 40m parts D08276/D110117
  • 16bit DAC AI Rear PCB D070101-v3
  • D1900163 HV COIL DRIVER
  • Ribbon Cables for Chassis (Cardboard box)
  • Chassis DC Breaker Switches (Cardboard box)
  • Triplett HDMI displays (x3) / Good for portable CCD monitors / PC monitors. Battery powered!
  • ISC Whitening BI Config Boards D1001631/D1900166
  • AA/AI Untested D070081
  • WFS Interface / Soft Start D1101865/D1101816
  • Internal Wiring Kit Cable Spools
  • ISC Whitening / Interface D1001530 / D1002054
  • aLIGO WFS Head D1101614
  • Internal Wiring Kit (Large Plastic Box)
  • Front/Rear Panels (Large Plastic Box)
  • HV Coil Driver Test Kit / Spare PA95s (Large Plastic Box)

 

ELOG V3.1.3-