On the wiki I summarized about the modification of the PDH box which is currently running on the end PDH locking.
The box was newly labeled "G1" standing for "Green locking #1".
standing for "Green locking #1".
by using a modified PDH box the green laser on the X-end station is locked to the arm cavity.
Some pictures of "magnet inspection" from Picasa.
The coating of some magnets are chipped...
[Jenne, Kiwamu, Rana, Eric Gustafson]
The SRM and PRM have been re-hung, and are ready for installation into the chambers. Once we put the OSEMs in, we may have to check the rotation about the Z-axis. That was not confirmed today (which we could do with the microscope on micrometer, or by checking the centering of the magnets in the OSEMs).
Also, Eric and Rana inspected the Tip Tilt magnets, and took a few that they did their best to destroy, and they weren't able to chip the magnets. There was concern that several of the magnets showed up with the coatings chipped all over the place. However, since Rana and Eric did their worst, and didn't put any new chips in, we'll just use the ones that don't have chips in them. Rana confiscated all the ones with obvious bad chips, so we'll check the strengths of the other magnets using a gaussmeter, and choose sets of 4 that are well matched.
Eric, photographer extraordinaire, will send along the pictures he took, and we'll post them to Picasa.
Were these magnets chipped before the Ni plating?
RA: Yes, it looks like this is the case. We also smashed some of the magnets against a metal surface and saw that a black grime was left. We should hold the magnets with a clean teflon clamp to measure the Gauss. Then we have to wipe the magnets before installing. I share Jenne's concern about the press-fit damaging the plating and so we need to consider using using glue or the ole magnetic attachment method. We should not rely on the structural integrity of the magnets at all.
We've set up a preliminary test bed for the phase camera. It simply uses a HeNe that is split into two beams. One is frequency shifted by an AOM by -40 MHz - df, where df is some acoustic frequency. The second beam is transmitted through a 40MHz EOM to get sidebands. The two beams are recombined and are, currently, incident on a photodetector, but this can be replaced by the phasecamera.
We turned everything on with df = 1kHz and confirmed that a 1kHz signal is visible on the output from the photodetector (PD). The signal looks to be about 1:300 of the DC level from the PD.
1. In terms of the AOM:
How much beam power is incident on the AOM? How much is the deflection efficiency?
i.e. How much is the power lost by the crystal, deflected in the 1st order, and remaining in the oth order?
I am curious because I assume the AOM (which vender?) is designed for 1064nm and the setup uses 632nm.
2. In terms of the EOM:
How much sidebands do you expect to have?
I assume the EOM is designed for 1064nm, the only difference is the coating at the end. Is this right?
How much beating strength do you expect?
Is your beating level as expected?
How much is the contrast between the PM sideband and the frequency shifted carrier?
This must include the consideration on the presence of the carrier and the other sidebands.
Someone has been moving the big blue recycling bin in front of the laser-chiller-chiller (the air conditioner in the control room). This is unacceptable. The chiller temp was up to 20.76C. No good.
You are free to move the recycling bin around so you can access drawers or the bike-exit-door in the control room, but make sure that it does not block air flow between the chiller-chiller and the chiller.
The attached photo shows the BAD configuration.
[Jenne, Steve, Nancy, Gopal]
We made an attempt at hanging some of the Tip Tilt eddy current dampers today.
Photo 1 shows the 2 ECDs suspended.
(1) Loosen the #4-40 screws on the side of the ECDs, so the wire can be threaded through the clamps.
(2) Place the ECDs in the locator jigs (not shown), and the locator jigs in the backplane (removed from main TT structure), all laying flat on the table.
(3) Get a length of Tungsten wire (0.007 inch OD = 180um OD), wipe it with acetone, and cut it into 4 ~8cm long segments (long enough to go from the top of the backplane to the bottom).
(4) Thread a length of wire through the clamps on the ECDs, one length going through both ECDs' clamps.
(5) One person hold the wire taught, and straight, and as horizontal as possible, the other person tightened the clamping screws on the ECDs.
(6) Again holding the wire in place, one person put the clamps onto the backplane (the horizontal 'sticks' with 3 screws in them).
(7) The end. In the future, we'll also clip off extra pieces of wire.
When we held up the backplane to check out our handy work, it was clear that the bottom ECD was a much softer pendulum than the top one, since the top one has the wire held above and below, while the bottom one only has the wire held on the top. I assume we'll trim the wire so that the upper ECD is only held on the top as well?
* This may be a 3 person job, or a 2 people who are good at multitasking job. The wire needs to be held, the ECDs need to be held in place so they don't move during the screwing/clamping process, and the screws need to be tightened.
* Make sure to actually hold the wire taught. This didn't end up happening successfully for the leftmost wire in the photo, and the wire is a bit loose between the 2 ECDs. This will need to be redone.
* We aren't sure that we have the correct screws for the clamps holding the wire to the backplane. We only have 3/16" screws, and we aren't getting very many threads into the aluminum of the backplane. Rana is ordering some 316 Stainless Steel (low magnetism) 1/4" #4-40 screws. We're going for Stainless because Brass (the screws in the photo), while they passed their RGA scan, aren't really good for the vacuum. And titanium is very expensive.
The 2nd photo is of the magnet sticking out of the optic holder. The hole that the magnet is sitting in has an aluminum piece ~2/3 of the way through. A steel disk has been placed on one side, and the magnet on the other. By doing this, we don't need to do any press-fitting (which was a concern whether or not the magnets could withstand that procedure), and we don't need to do any epoxying. We'll have to wait until the ECDs are hung, and the optic holder suspended, to see whether or not the magnet is sticking out far enough to get to the ECDs.
We compared the magnetic field strength for 4 magnets in the original setup. The standard deviation was 3.15 G which corresponds to a variation of 2.4%. We had encountered difficulties with the stability of the Gaussmeter. The tip of the Gaussmeter was unsteady and wobbling which led to huge variations for a small change in distance. We stabilized the meter by taping it to a pencil and securing it with wire ties to an aluminum block. We then used translation stages to find the point of maximum field strength for each magnet, which allowed us much more stable readings.
We are reading and learning about feedback control systems.
Learning to model in Comsol. Our goals for the 1X1 model include incorporating the gravitational force in the measurements and find the distance for which attraction is the strongest, and experimenting with the mesh density and boundary conditions of the domain.
Attended many meetings, including:
Laser safety training
SURF safety training
LIGO experimental group meeting
This week I attended a whole lot of orientations, lectures, and meetings related to SURF. Done with general and laser safety training.
read Nergis' thesis for, and other material on WFS.
got confused with how the sidebands and shifted carrier frequencies are chosen for the Interferometer, read initial chapters of Regehr's thesis for teh same.
Made a plan for proceeding with the WFS work through discussions with Koji.
Understood the MC cavity and drew a diagram for it and the sensors.
Did Calculations for Electric field amplitudes inside and outside the MC cavity.
Saw the hardware of the WFS and QPD inside, and their routes to computers. Figured out which computer shows up the conditioned data from teh sensors.
Tried calculating the cavity axis for MC using geometry and ray tracing. Too complicated to be done manually.
Read some material (mainly Seigman) for physics of calculating the eigen-axis of the MC cavity with mirrors mis-aligned. Will calculate that using simulations, using the ABCD matrices approach.
Made a simple feedback simulink model yesterday to learn simulink. Made it run/compile. Saw the behaviour thru time signals at different points.
in the night, Made a simulink model of the sensor-mirror thing, with transfer functions for everything as dummy TFs. Compiles, shows signals in time. Remaining part is to put in real/near-real TFs in the model.
Summary of This Week's Activities:
6/16: LIGO Orientation; First Weekly Meeting; 40m tour with Jenne; Removed WFS Box Upper Panel, Inserted Cable, Reinstalled panel
6/17: Read Chapter 1 of Control Systems Book; LIGO Safety Meeting; Koji's Talk about PDH Techniques, Fabry-Perot Cavities, and Sensing/Control; Meeting w/ Nancy and Koji
6/18: LIGO Talk Part II; Glossed over "LASERS" book; Read Control Systems Book Chapter 2; Literary Discussion Circle
6/21: Modecleaner Matrix Discussion with Nancy; Suggested Strategy: construct row-by-row with perturbations to each d.f. --> Leads to some questions on how to experimentally do this.
6/22: Learned Simulink; Learned some Terminal from Joe and Jenne; LIGO Meeting; Rana's Talk; Christian's Talk; Simulink Intro Tutorial
6/23 (morning): Simulink Controls Tutorial; Successfully got a preliminary feedback loop working (hooray for small accomplishments!)
Outlook for the Upcoming Week:
Tutorials (in order of priority): Finish Simulink Tutorials, Work through COMSOL Tutorials
Reading (in order of priority): Jenne's SURF Paper, Controls Book, COMSOL documentation, Lasers by Siegman.
Work: Primarily COMSOL-related and pre-discussed with Rana
I fitzed with the PRM and SRM briefly, and I now believe that they're both ready to go into the chambers.
For each optic, I used the microscope on a micrometer to check that the scribe lines on each side of the optic were at the same height. Basic procedure was to center the microscope on one scribe line, move the microscope to the other side, to see how far the line was from center, and try to (very gently!!) rotate the optic in the wire about the z-axis about half the distance that the one scribe line needed to be. Rinse and repeat several times until satisfied.
I then checked that our HeNe oplev was still at 5.5" beam height, and that the beam traveled straight across the table. I put the SRM in the oplev, unclamped the EQ stops, and waited for it to settle. The HEPA filters were turned off, to minimize the breeze. While the SRM settled, I worked on the height/rotation for the PRM on the other table.
After checking the SRM balance, I clamped it and moved it, and checked the PRM balance, then turned off the HeNe and rewrapped everything in foil, and turned on the HEPAs.
Both the SRM and the PRM seem a little off in Pitch. The beam returning to the QPD (placed just next to the laser) was always ~1cm above the center of the QPD. The beam travel distance was ~3m (vaguely) from laser to optic to QPD. This effect may be because the optics were originally balanced with OSEMs in place, and I didn't have any OSEMs today. Koji and I found several months ago that the OSEMs have some DC affect on the optics.
Anyhow, since our optics are so small, I think the OSEMs and coils can handle this small DC offset in pitch, so I think we're ready to rock-n-roll with putting them in the chambers.
Still on the to-do list......Tip Tilts!
The photo shows the oplev beam position on (kind of) the QPD, for the SRM. The PRM was basically the same.
I visited downs and announced that I would be showing up again until all the 40m hardware is delivered.
I brought over 4 ADC boards and 5 DAC boards which slot into the IO chassis.
The DACs are General Standards Corporation, PMC66-16AO16-16-F0-OF, PCIe4-PMC-0 adapters.
The ADCs are General Standards Corporation, PMC66-16AI6455A-64-50M, PCIe4-PMC-0 adapters.
These new ones have been placed with the blue and gold adapter boards, under the table behind the 1Y4-1Y5 racks.
With the 1 ADC and 1 DAC we already have, we now have enough to populated the two ends and the SUS IO chassis. We have sufficient Binary Output boards for the entire 40m setup. I'm going back with a full itemized list of our current equipment, and bring back the remainder of the ADC/DAC boards we're due. Apparently the ones which were bought for us are currently sitting in a test stand, so the ones I took today were from a different project, but they'll move the test stand ones to that project eventually.
I'm attempting to push them to finish testing the IO chassis and the remainder of those delivered as well.
I'd like to try setting up the SUS IO chassis and the related computer this week since we now have sufficient parts for it. I'd also like to move megatron to 1Y3, to free up space to place the correct computer and IO chassis where its currently residing.
The laser chiller temp is fluctuating and the power output is decreasing. See 120 days plot.
Yesterday I removed ~300cc water from the overflowing chiller tank.
Some unused optics in the BS chamber were removed.
After that the beam splitter has been drag wiped.
So now the BS chamber is waiting for the installation of the other core optics i.e. PRM, SRM and Tip-Tilts.
-- removing of unused optics
There were some unused optics, mainly 1.5 inch optics which had been used for the oplevs in the chamber.
Kathaine, Shamila (Team Magnet) and Kiwamu took those optics out from the chamber.
And then we carefully wrapped each of them by aluminum foils and put them in some clear boxes.
In fact, before wrapping them, we gently attached lens papers on their HR surfaces such that aluminum foils can not damage it.
Now there are only three 1.5 inch optics in the chamber, and they are supposed to be used for the oplevs.
We didn't remove any of the 2 inch optics and the PZT mirrors because they are still going to be used.
These are the pictures of the BS chamber after we cleaned up them.
-- wiping of the BS
Rana and Kiwamu drag wiped the HR surface of the BS by using lens paper with the solvents.
The below is the procedure we did. You can find some details about the wiping technique for suspended optics in this entry.
In this time we could wipe the beam splitter without removing the front earthquake stops because the beam splitter was brought close enough to us.
(1). put some blocks attaching the edge of the bottom plate of the tower in order to record the original position.
(2). locked the beam splitter to the frame by screwing the earthquake stops.
(3). made sure if it is really locked by seeing the output signal of the OSEMs in dataviewer. If it's locked successfully, the resonant frequency gets higher and the Q-value gets lower.
(3). moved the BS tower close to the door in order to reach the beam splitter easily.
(4). inspected the surface by using a fiber light. There were about 10 bright spots on the HR surface.
(5). wiped the surface three times by using the lens paper with Aceton.
(6). wiped it several times with Isopropyl.
(7). inspected the surface again, found there were no big bright spots near the center. Thumbed up
(8). put the tower back to the original place and released the beam splitter from the earthquake stops.
We added a channel on c1psl in order to monitor the temperature of the PPKTP sitting on the PSL table.
To take continuous data of the temperature we added the channel by editing the file: target/c1psl/c1psl.db
We named the channel "C1:PSL-PPKTP_TEMP".
To reflect this change we physically rebooted c1psl by keying the crate.
Is this a setpoint temperature that we can change by writing to the channel or is it a readout of the actual temperature of the oven?
This is a readout channel just to monitor the actual temperature.
[Jenne, Megan, Frank]
We rebooted c1iovme, c1susvme1, and c1susvme2 during lunch. Frank is going to write a thrilling elog about why c1iovme needed some attention.
C1susvme 1&2 have had their overflow numbers on the DAQ_RFMnetwork screen red at 16384 for the past few days. While we were booting computers anyway, we booted the suses. Unfortunately, they're still red. I'm too hungry right now to deal with it....more to follow.
[Jenne, Kiwamu, Steve, Sharmila, Katherine, Joe]
We finished bolting the door on the new ITMX (old ITMY) and putting the access connector section back into place. We finished with torquing all the bolts to 40 foot-pounds.
Yesterday afternoon I went to downs and acquired the following materials:
2 100 ft long blue fibers, for use with the timing system. These need to be run from the timing switch in 1Y5/1Y6 area to the ends.
3 ADCs (PMC66-16AI6455A-64-50M) and 2 DACs (PMC66-16AO16-16-F0-OF), bringing our total of each to 8.
7 ADC adapter boards which go in the backs of the IO chassis, bringing our total for those (1 for each ADC) to 8.
There were no DAC adapter boards of the new style available. Jay asked Todd to build those in the next day or two (this was on Thursday), so hopefully by Monday we will have those.
Jay pointed out there are different styles of the Blue and Gold adapter boxes (for ADCs to DB44/37) for example. I'm re-examining the drawings of the system (although some drawings were never revised to the new system, so I'm trying to interpolate from the current system in some cases), to determine what adapter style and numbers we need. In any case, those do not appear to have been finished yet (there basically stuffed boards in a bag in Jay's office which need to be put into the actual boxes with face plates).
When I asked Rolf if I could take my remaining IO chassis, there was some back and forth between him and Jay about numbers they have and need for their test stands, and having some more built. He needs some, Jay needs some, and the 40m still needs 3. Some more are being built. Apparently when those are finished, I'll either get those, or the ones that were built for the 40m and are currently in test stands.
Aparently Friday afternoon (when we were all at Journal Club), Todd dropped off the 7 DAC adapter boards, so we have a full set of those.
Things still needed:
1) 3 IO chassis (2 Dolphin style for the LSC and IO, and 1 more small style for the South end station (new X)). We already have the East end station (new Y) and SUS chassis.
2) 2 50+ meter Ethernet cables and a router for the DAQ system. The Ethernet cables are to go from the end stations to 1Y5-ish, where the DAQ router will be located.
3) I still need to finish understanding the old drawings drawings to figure out what blue and gold adapter boxes are needed. At most 6 ADC, 3 DAC are necessary but it may be less, and the styles need to be determined.
4) 1 more computer for the South end station. If we're using Megatron as the new IO chassis, then we're set on computers. If we're not using Megatron in the new CDS system, then we'll need a IO computer as well. The answer to this tends to depend on if you ask Jay or Rolf.
I've just stolen a GPIB controller, an yellow small box, from the spectrum analyzer HP8591E.
The controller is going to be used for driving the old spectrum analyzer HP3563A for a while.
Gopal and I will be developing and testing a GPIB program code for HP3563A via the controller.
Once after we get a new GPIB controller, it will be back to the original place, i.e. HP8591E.
--- GPIB controller ----
The power of the green beam generated on the PSL table should be about 650uW in terms of the shot noise.
One of the important parameters we should know is the power of the green beam on the PSL table because it determines the SNR.
The green beam finally goes to a photo detector together with another green beam coming from the arm cavity, and they make a beat signal and also shot noise.
So in order to obtain a good SNR toward the shot noise at the photo detector, we have to optimize the powers.
If we assume the green power from the arm is about 650uW, a reasonable SNR can be achieved when these powers are at the same level.
To get such power on the PSL table, a 90% partial reflector is needed for picking it off from the PSL as we expected.
power dependency of SNR
Suppose two lasers are going to a photo detector while they are beating (interfering).
The beat signal is roughly expressed by
[signal] ~ E1* E2 + E1 E2*,
~ 2 ( P1 P2)½ cos (phi),
where E1 and E2 represent the complex fileds, P1 and P2 represent their powers and phi is a phase difference.
This equation tells us that the strength of the signal is proportional to ( P1 P2)½ .
At the same time we will also have the shot noise whose noise level depends on the inverse square route of the total power;
[noise] ~ ( P1 + P2)½.
According to the equations above, SNR is expressed by
SNR = [signal] / [noise] ~ ( P1 P2)½ / ( P1 + P2)½.
If we assume P1 is fixed, the maximum SNR can be achieved when
P2 goes to the infinity. But this is practically impossible.
Now let's see how the SNR grows up as the power P2 increases. There are two kinds of the growing phase.
(1) When P2 <
P1 , SNR is efficiently improved with the speed of P2½.
(2) But when P2 >
P1 , the speed of growing up becomes very slow. In this regime increasing of P2 is highly inefficient for improvement of the SNR.
Thus practically P1 ~ P2 is a good condition for the SNR.
At this point the SNR already reaches about 0.7 times of the maximum, it's reasonably good.
According to the fact above, we just adjust the green powers to have the same power levels on the PSL table.
The table below shows some parameters I assume when calculating the powers.
Attached figure shows a simplified schematic of the optical layout with some numbers.
By using those parameters we can find that the green beam from the arm cavity is reduced to 650uW when it reaches the PSL table.
To create the green beam with the same power level on the table, the power of 1064 nm going to the doubling crystal should be about 150mW.
This amount of the power will be provided by putting a 90% partial reflector after the PMC.
ORPHAN ENTRY FOUND ON ROSALBA:::::::::::::::::::::::::::::::::::::::::::::::::::>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
We did svn update. Then Alex realized he missed adding some files, so added them to the svn, and then we checked out again.
We rebuilt awg, fb, nds.
We reloaded service xinet.d, after editing /etc/xinetd.d/chnconf. We changes all the tpchn_c1 to tpchn_c1SYS
There's a new naming scheme for the model files. They start with the site name. So, lsc becomes c1lsc.
On any machine you want code running, make a symbolic link to /cvs/cds/rtcds/ in /opt/
Using the three Marconis in 40m at 11.1 MHz, the Three Cornered Hat technique was used to find the individual noise of each Marconi with different offset ranges and the direct/indirect frequency source of the rubidium clock.
Rana explained the TCH technique earlier - by measuring the phase noise of each pair of Marconis, the individual phase noise can be calculated by:
S1 = sqrt( (S12^2 + S13^2 - S23^2) / 2)
S2 = sqrt( (S12^2 + S23^2 - S13^2) / 2)
S3 = sqrt( (S13^2 + S23^2 - S12^2) / 2)
I measured the phase noise for offset ranges of 1Hz, 10Hz, 1kHz, and 100kHz (the maximum allowed for a frequency of 11.1Mhz) and calculated the individual phase noise for each source (using 7 averages, which gives all the spikes in the individual noise curves). The noise from each source is very similar, although not quite identical, while the noise is greater at higher frequencies for higher offset ranges, so the lowest possible offset range should be used. It appears the noise below a range of 10Hz is fairly constant, with a smoother curve at 10Hz.
The phase noise for direct vs indirect frequency source was measured with an offset range of 10Hz. While very similar at high and low frequencies for all 3 Marconis, the indirect source was consistently noisier in the middle frequencies, indicating that any Marconis connected to the rubidium clock should use the rubidium clock as a direct frequency reference.
Since I can't adjust settings of the Marconis at the moment, I have yet to finish measurements of the phase noise at 160 MHz and 80 MHz (those used in the PSL lab), but using the data I have for only the first 2 Marconis (so I can't finish the TCH technique), the phase noise appears to be lowest using the 100kHz offset except at the higher frequencies. The 160 MHz signal so far is noisier than the 11.1 MHz signal with offset ranges of 1 kHz and 10 Hz, but less noisy with a 100 kHz offset.
I still haven't measured anything at 80 MHz and have to finish taking more data to be able to use the TCH technique at 160 MHz, then the individual phase noise data will be used to measure the noise of the function generators used in the PSL lab.
Last week Alex merged in the changes I had made to the local 40m copy of the Real Time Code Generator. These were to add a new part, called FiltMuxMatrix, which is a matrix of filter banks, as well as fixing the filter medm generation code so the filter banks actually have working time stamps.
I checked out a new version of the CDS SVN with these changes merged in. Changes that will be added in the near future by Rolf and Alex include the addition of "tags". These are pieces in simulink which act as a bridge between two points, so you can reduce the amount of wire clutter on diagrams. Otherwise they have no real affect on the generated C code. Also the ADC/DAC channel selector and in fact the ADC/DAC parts will be changing. The MIT group has requested the channel selector be freed up for its original purpose in matlab, so Rolf is working on that.
For the time being, Alex has created a directory /rtcds on Linux1 under /home/cds. He then created softlinks to that directory on megatron, c1iscex, and allegra in the /opt directory. This was an easy way to have a shared path.
After checking out the CDS SVN, we discovered there some files missing that Alex had added to his version, but not the main branch. Alex came over to the 40m and proceeded to get all those files checked in. We then checked it out again. Changes were made to the awg, framebuilder, and nds codes and needed to be rebuilt.
Certain other file name conventions were also changed. Instead of tpchn_c1.par, tpchn_c2.par, etc, its now tpchn_c1lsc.par, tpchn_c2lsp.par, etc. The system name is included at the end of the filename, to help make it clearer what file goes with what.
This required an edit of the chnconf file, which has explicit calls to those file names. Once we edited that file, we had to reload the xinetd service which its apparently a subpart of (this can be accomplished by /etc/init.d/xinetd stop, then /etc/init.d/xinetd start).
/etc/rc.d/rc.local also had to be edited for the new model names (c1lsc, c1lsp, etc).
The daqdrc file (for the framebuilder) now parses which dcu_rate to use from the tpchn_c1lsc.par type files, so the dcu_rate 20 = 16384 lines have been removed. set gds_server has also been removed, and replaced with tpconfig "/opt/rtcds/caltech/c1/target/gds/param/testpoint.par"; from which it can get the hostname. This information is now derived from the c1SYS.mdl file.
After that Alex informed me the IOP processor needs to be running for the other models to work properly, as well as for the Framebuilder to work.
Initially there was a problem running on Megatron, because the IOP gets its timing signal from the IO chassis, and there was none connected to megatron. However, he has since modified the code so that if there's no IO chassis, the IOP processor just uses the system clock. It has been tested and runs on megatron now.
I found the laser dead this morning.
The crane people are here to unjam it.
Laser hazard mode is lifted and LASER SAFE MODE is in place. No safety glasses but CRANE HAZARD is still active.
Stay out of the 40m lab !
Not dead. It just had a HT fault. You can tell by reading the front panel. Cycling the power usually fixes this.
I talked with Rolf, and asked if we were using Megatron for IO. The gist boiled down to we (the 40m) needed to use it for something, so yes, use it for the IO computer. In regards to the other end station computer, he said he just needed a couple of days to make sure it doesn't have anything on it they need and to free it up.
I had a chat with Jay where he explained exactly what boards and cables we need. Adapter boards are 95% of the way there. I'll be stopping by this afternoon to collect the last few I need (my error this morning, not Jays). However it looks like we're woefully short on cables and we'll have to make them. I also acquired 2 D080281 (Dsub 44 x2 to SCSI).
For each 2 Pentek DACs plus a 110B, you need 1 DAC adapter board (D080303 with 2 connectors for IDC40 and a SCSI). You also need a D080281 to plug onto the back of the Sander box (going to the 110Bs) to convert the D-sub 44 pins to SCSI.
LSC will need none, SUS will need 3, IO will need 1, and the ends will need 1 each. We have a total of 6, we're set on D080303s. We have 3 110Bs, so we need one more D080281 (Dsub44 to SCSI). I'll get that this afternoon.
For each XVME220, we'll need one D080478 binary adapter. We have 8 XVME220s, and we have 8 boards, so we're set on D08478s.
For the ends, there's a special ADC to DB44/37 adapter, which we only have 1 one of. I need to get them to make 1 more of these boxes.
We have 1 ADC to DB37 adapter, of which we'll need 1 more of as well, one for IO and one for SUS.
However, for each Pentek ADC, we need a IDC40 to DB37 cable. For each Pentek DAC we need an IDC40 to IDC40 cable. We need a SCSI cable for each 110B. I believe the current XVME220 cables plug directly in the BIO adapter boxes, so those are set.
So we need to make or acquire 11 IDC40 to DB37 cables, 7 IDC40 to IDC40 cables, and 3 SCSI cables.
I picked up the ribbon cable connectors from Jay. It looks like we'll have to make the new cables for connecting the ADCs/DACs myself (or maybe with some help). We should be able to make enough ribbon cables for use now. However, I'm adding "Make nice shielded cables" to my long term to do list.
I pointed out the 2 missing adapter boxes we need to Jay. He has the parts (I saw them) and will try to get someone to put it together in the next day or so. I also picked up 2 more D080281 (DB44 to SCSI), giving us enough of those.
I once again asked Jay for an update on IO chassis, and expressed concern that without them the CDS effort can't really go forward, and that we really need this to come together ASAP. He said they still need to make 3 new ones for us.
So we're still waiting on a computer, 3 IO chassis, router + ethernet.
MOPA is back onliine. Rana found that the fuse in the AC power connector's fuse had blown. This was evident by smelling all of the inputs and outputs of the MOPA controller. The power cord we were using for this was only rated for 10A and therefore was a safety hazard. The fuse should be rated to blow before the power cord catches on fire. The power cord end was slightly melted. I don't know why it hadn't failed in the last 12 years, but I guess the MOPA was drawing a lot of extra current for the DTEC or something due to the high temperature of the head.
We got some new fuses from Todd @ Downs.
The ones we got however were fast-blow, and that's what we want The fuses are 10A, 250V. The fuses are ~.08 inches long, 0.2 inches in diameter.
The folding crane was fixed and tested this morning by the NNN rigging company. Pictures will be posted by Steve in the morning.
Afterwards, the ITM-east door was installed, jam-nuts checked. No high voltage was on for the in-vac PZTs.
The annulus spaces were roughed down to 350mTorr by Roughing Pump RP1. For this operation, we removed the low flow valve from the RP1 line.
After the spaces came down to ~400 mTorr, we closed their individual valves.
Warning: The VABSSC1 and VABSSC0 valves are incorrect and misleadingly drawn on the Vacuum overview screen.
Our idea is to have a much slower pumpdown this time than the last time when we had a hurricane kick up the dust. Looks like it worked, but next time we should do only 1/2 turn.
A little D-sub terminator was put on the Gur1 input to the Guralp box, to check again the noise level of the box.
The pumpdown started at 4 PM (2300 UTC). At 10 PM, we (Jenne, Jan, and I) opened up the RV1 valve to full open. That's the second inflection point in the plot.
As per Steve's instructions, at 12:43 AM, I used the following steps to stop the pumpdown until the morning:
Summary of this Week's Activities:
6/23: LIGO Safety Tour; Simulink Controls Tutorial
6/24: Simulink Diagram for Feedback Loop; Constructed Pendulum Transfer Function; Discussion with Dr. Weinstein
6/25: Prepare for pump-down of vacuum chamber; crane broken due to locking failure; worked through COMSOL tutorials
6/28: Ran through Python Tutorials; Began learning about Terminal
6/29: Wrote Progress Report 1 First Draft
6/30: Began editing Progress Report 1
Wednesday Morning E-log :
Most of the time through this week, i was working towards making the simulink model work.
It involved learning simulink functions better, and also improving on the knowledge of control theory in general, and control theory of our system.
1. Thusrday : found tfs for the feedback loop. and tried many different filters and gains to stabilize the system (using the transient response of the system). - not through
2. Friday : decided to use error response and nullify the steady state error instead of looking at convergence of output. tried many other filter functions for that.
Rana then showed me his files for WFS.
3. Sunday - played with rana's files, learnt how to club simluink with matlab, and also about how to plot tfs using bode plots in matlab.
4. Monday : Read about state-space models, and also how to linearize in matlab. done with the latter, but the former still needs deeper understanding.
read ray-optics theory to calculate the geometric sensing matrix.
It first requires to calculate the eigen mode of the cavity with tilted mirrors. this eigen mode is needed to be found out using ray-optics transfer matrices for the optics involved . figured out matrices for the tilted plane mirrors, and am working on computing the same for MC2.
5. Tuesday : went to Universal Studios , Hollywood :P
6. Wednesday (today) : Writing the report to be submitted to SFP.
I spent this morning populating the SUS IO Chassis and getting it ready for installation into the 1Y4 rack. I discovered I'm lacking the internal cables to connect the ADC/DAC boards to the AdL adapter boards that also go in the chassis (D0902006 and D0902496). I'm not sure where Alex got the cables he used for the end IO chassis he had put in. I'll be going to Downs after the meeting today either to get cables or parts for cables, and get the SUS chassis wired up fully.
I'd also like to confirm with Alex that the OSS-MAX-EXP-ELB-C board that goes in the IO chassis matches the host interface board that goes in the computer (OSS-HIB2-PE1x4-1x4 Re-driver HIB, since we spent half a day the last time we installed an IO chassis determining that one of the pair was bad or didn't match.
The SUS chassis has been populated in the following way:
Slot 1 ADC PMC66-16AI6455A-64-50M
Slot 2 DAC PMC66-16AO16-16-F0-OF
Slot 3-6 BO Contec DIO-1616L-PE Isolated Digital IO board
Slot 7 ADC PMC66-16AI6455A-64-50M
Slot 8-9 DAC PMC66-16AO16-16-F0-OF
Slot 1 ADC adapter D0902006
Slot 2 DAC adapter D0902496-v1
Slot 7 ADC adapter D0902006
Slot 8-9 DAC adapter D0902496-v1
Weekly Project Update:
We are studying Haixing's circuit diagram for the quadrant maglev control circuit. We have analyzed several of the sub-circuits and plotted transfer functions for these in MatLab. To check the circuit, we will compare the calculated transfer functions with those obtained from the HP control systems analyzer.
To learn how to use the control systems analyzer, we are reading App Note 243 as well as an online manual (477 pages in the first volume). We are beginning with a simple test circuit, and are comparing its measured frequencyresponse with calculated transfer functions. We currently have obtained a response graph beginning at 100 Hz (which we have not yet figured out how to print), and we are planning to investigate behavior at lower frequencies.
We also have been continuing our reading on control systems after a failed attempt at magnetic levitation.
This week I have completed following tasks:
1. Worked out the analytical expressions for the amount of power of the DC and oscillatory part going into the camera.
2. Realigned the He-Ne PhaseCam setup as we had to replace the first steering mirror after the laser with a silvered mirror ( one without a dielectric coating for 1064 nm).
3. Gone through the code written by a previous surfer (Zach Cummings).
4. Read the paper 'Real-time phase-front detector for heterodyne interferometers'- F. Cervantes et. el. where they talk about constructing a phase detector for LISA pathfinder mission. One interesting fact I found was that, they used InGaAs chip for their CCD Cam which has a amazing QE of 80% @ 1064 nm. Unfortunately, the one we are using (Micro MT9V022 CMOS) has only ~5% QE for 1064 nm and 50% for 633 nm. One top of it MT9V022 has a built-in infra-red filter infront of it to make it more insenstive to 1064. In such limitations, we may have to find a work-around for this issue. Any idea?
5. Read about the EOM and AOM and their vibrating (!) way to add on and alter the incident light on them. (Source: Intro to Optical Electronics-Yariv)
One task that we couldn't accomplish even though I planned on doing is:
1. Move,if possible, to the Nd:YAG setup.
Task for this week:
1. Produce breathtaking calibration of the camera at He-Ne setup.
2. Read 'Fringe Analysis'-Y.Surrel and 'Phase Lock Technique'-Gardner.
3. Modify the phasecam code.
4. Produce an alternate triggerbox using diodes instead of Op-Amp as op-amp is suspected to fail at some point driving the camera due to impedance mismatch.
5. Answer Koji's question at Aidan's ELOG .
I moved the Guralp box's input terminator from Gur1 to Gur2 a minute or so ago to check the other channels.
Atm 2 is showing the butterfly valve that closes down down the orifice at higher pressure to slow down the pumping speed.
See elog entry #2573
Now that the MC is back up and running, I put the Guralp seismometers at the ends of the mode cleaner. Gur1 is near MC2, and Gur2 is near MC1 (yes, it seems backwards....that's how the cable lengths work). Also, the set of 3 MC2 accelerometers are in place under MC2. I can't find the black cube for the other set of accelerometers, so there aren't any around MC1/3.
40m SURFs Razib Obaid, Nancy Aggarwal, Unknown Bearded SMURF, Megan Daily, Gopal Nataraj, Katharine Larson and Sharmila Dhevi received 40m specific safety training on June 23, 2010.
In order to identify the output adapter of the BNC patch panel used for about 20 PEM channels, I had to disconnect its power and remove the back panel. Channels coming into that panel (seismometers and so forth) was out from 1:36 to 1:56 pm.
I did a quick check of some of the channels and it looks like its working again after putting it all back together.
Kevin sent me an email with top secret info on where one of the other accelerometer cubes was hiding (it was with his shaker setup on the south side of the SP table), so I took it and put the 3 MC1 accelerometers in their 3-axis configuration.
Also, I changed the orientation of both sets of 3 axis accelerometers to reflect a Right Handed configuration, to go along with the new and improved IFO configuration. Previously (including last night), the MC2 accelerometers were together in a Left Handed configuration.
Thanks to Steve's work on some L brackets, and Kiwamu's lifting help, we now have a new SUS IO chassis in the new 1X4 rack (formerly the 1Y4 rack), just below the new SUS and LSC computers. I have decided to call the sus machine, c1sus, and give it IP address 192.168.113.85. We also put in a host interface adapter, OSS-HIB2-PE1x4-1x4 Re-driver HIB, which connects the computer to the IO chassis.
The IP was added to the linux1 name server. However, the computer itself has not been configured yet. I'm hoping to come in for an hour or two tomorrow and get the computer hooked up to a monitor and keyboard and get its network connection working, mount /cvs/cds and get some basic RCG code running.
We also ran ethernet cables for the SUS machine to the router in 1X6 (formerly 1Y6) as well as a cable for megatron from 1X3 (formerly 1Y3) to the router, in anticipation of that move next week.
During the day, I realized we needed 2 more ADCs, one of which I got from Jay immediately. This is for two 110Bs and 4 Pentek ADCs. However, there's a 3rd 110B connected to c0dcu1 which goes to a BNC patch panel. Original Jay thought we would merge that into 4 pin lemo style into the 2nd 110B associated with the sus front ends. We've decided to get a another ADC and adapter. That will have to be ordered, and generally take 6-8 weeks. However, it may be possible to "borrow" one from another project until that comes in to "replace" it. This will leave us with our BNC patch panel and not force me to convert over 20 cables.
I also discovered we need one Contec DIO-1616L-PE Isolated Digital IO board for each Chassis, which I wasn't completely aware of. This is used to control the ADCs/DACs adapter boards in the chassis. It means we need still need to put a Binary Output board in the c1iscex chassis. Hopefully the chassis as they come in come from Downs continue to come with the Contec DIO-1616L-PE boards (they have so far).
The current loadout of the SUS chassis is as follows:
Far left slot, when looking from the front has the OSS-MAX-EXP-ELB-C board, used to communicate with the c1sus computer.
Slot 1 ADC PMC66-16AI6455A-64-50M
Slot 3-6 BO Contec DIO-32L-PE Isolated Digital Output board
Slot 7 ADC PMC66-16AI6455A-64-50M
Slot 10-11 ADC PMC66-16AI6455A-64-50M
Slot 12 Contect DIO-1616L-PE Isolated Digital IO board
Slot 10-11 ADC adapter D0902006
Kiwamu and I went through and looked at the spare channels available near the PSL table and at the ends.
First, I noticed I need another 4 DB37 ADC adapter box, since there's 3 Pentek ADCs there, which I don't think Jay realized.
Anyways, in the IOO chassis that will put in, for the ADC we have a spare 8 channels which comes in the DB37 format. So one option, is build a 8 BNC converter, that plugs into that box.
The other option, is build 4-pin Lemo connectors and go in through the Sander box which currently goes to the 110B ADC, which has some spare channels.
For DAC at the PSL, the IOO chassis will have 8 spare channel DAC channels since there's only 1 Pentek DAC. This would be in a IDC40 cable format, since thats what the blue DAC adapter box takes. A 8 channel DAC box to 40 pin IDC would need to be built.
The ends have 8 spare DAC channels, again 40 pin IDC cable. A box similar to the 8 channel DAC box for the PSL would need to be built.
The ends also have spare 4-pin Lemo capacity. It looked like there were 10 channels or so still unused. So lemo connections would need to be made. There doesn't appear to be any spare 37 DB connectors on the adapter box available, so lemo via the Sander box is the only way.
Joe needs to provide Kiwamu with cabling pin outs.
If Kiwamu makes a couple spares of the 8 BNC to 37DB connector boards, there's a spare 37DB ADC input in the SUS machine we could use up, providing 8 more channels for test use.
I connected a monitor and keyboard to the new c1sus machine and discovered its not running RTL linux. I changed the root password to the usual, however, without help from Alex I don't know where to get the right version or how to install it, since it doesn't seem to have an obvious CD rom drive or the like. Hopefully Tuesday I can get Alex to come over and help with the setup of it, and the other 1-2 IO chassis.
I went to talk to Rolf and Jay this morning. I asked Rolf if a chassis was available, so he went over and disconnected one of his test stand chassis and gave it to me. It comes with a Contect DIO-1616L-PE Isolated Digital IO board and an OSS-MAX-EXP-ELB-C, which is a host interface board. The OSS board means it has to go into the south end station. There's a very short maximum cable length associated with that style, and the LSC and IOO chassis will be further than that from their computers (we have dolphin connectors on optical fiber for those connections).
I also asked Jay for another 4 port 37 d-sub ADC blue and gold adapter box, and he gave me the pieces. While over there, I took 2 flat back panels and punched them with approriate holes for the scsi connectors that I need to put in them. I still need to drill 4 holes in two chassis to mount the boards, and then a bit of screwing. Shouldn't take more than an hour to put them both together. At that point, we should have all the adapter boxes necessary for the base design. We still need some stuff for the green locking, as noted on Friday.