How about measuring the actual weight with a scale? There are a couple of scales on Yuta's desk.

Thanks, I was actually looking for a scale earlier but could not find it after asking a couple of people. One of the scales reads 298 g, while the other has a limit of 200g. Looks like it is indeed aluminium.

[Reuben, Radhika]

Checked out the AUX PDH locking system at the XARM. Started by locking the AUX laser using the uPDH servo box and adjusting the test masses to maximize transmission (~0.6 achieved). There were some issues where the fundamental mode would be briefly visible and then lose lock. Higher order modes were also seen which could be removed by adjusting test masses. We also noticed the laser spot moving around a lot, as if the test masses were swaying. Finally after repeated tries we managed to lock and hold the laser to the cavity long enough to measure the open loop transfer function using the Moku:Go frequency response analyzer tool. Got an idea of the finicky and temperamental nature of the locking process.

Taking the transfer function data from the Moku:Go and using a Python script, found the UGF to be around 25.6 kHz and phase margin to be around 25.5 deg. My current goal is to keep reading up on control systems and related theory (I still feel like I lack understanding of the important principles needed), and parallelly making a small script that can take the transfer functions data and calculate some useful information (halfway done).

One issue I found with the script was that the Python control library was giving me a wrong value of Gain Margin (~0.26 where ~-5 was expected) while using the control.margin function. The other parameters phase margin and crossover frequencies agree with the data visually.

Vertex SUS DAC-0 card is kaput (aka C1SUS DAC failure) ed: Koji

[Paco, Yuta]

Continuing our investigation of how a couple of coils seemed to be malfunctioning and the local damping was affected, we did the following:

• We calibrated ITMX actuation strength with ALS beat at 211.11 Hz and found 5.105 nm / count / f^2 or just 5% off from the previous values. So nothing seemed strange (e.g. 25% difference from single coil failure)
• We tried calibrating BS actuation strength and found it very hard to lock MICH. Furthermore the result was off by a factor of ~ 2 with respect to previous values!! Highly sus...
• We tried calibrating ITMX/ITMY actuation strengths and found they were also weaker by ~ 2 with respect to previous values. Extremely sus.. Attachment #1 summarizes these results.
• We decided to repeat our DW board transfer function estimates using single coil to Oplev transfer function measurements, but this also seemed harder in comparison with our last measurements. (couldn't even replicate using our dtt saved template results)

Finally we checked the analog electronics, breaking the BS AI to DW board connection of ULCOIL. We then used awggui to drive the single coil and the AI test mon output to read the commanded signal. We repeated this for a couple more coils, and also for other optics (PRM, SRM). We found that PRM had the same issue as BS that the DAC output couldn't drive positive voltages! In contrast, SRM worked fine. We then swapped the DAC adapter (see Attachment #2) units by swapping cables between SRM /MC3 and BS/PRM (D080303 -- not on DCC) and ruled out a failure from the buffered Test MON outputs on the AI board. So the problem was narrowed down to the DAC_0 card on c1sus chassis.

To try and fix this, we stopped the c1sus model, shutdown its frontend computer, and power cycled the IO chassis including the DC power at the front. This time, we tested the DAC outputs by driving the face coils separate from the side coils (running on DAC_2) using a 0.1 Hz sine excitation on ITMX, BS, ITMY and PRM from awggui and looking at the coil Vmon channels from the acromag on all suspensions. See Attachment #3-4 for a summary of all the tests (BS, PRM, ITMX, ITMY are bad, SRM, MC1-3 are good).

After verifying that this didn't fix the issue, we concluded that c1sus - DAC_0 fails to drive positive voltages.

Next steps

• Replace DAC_0 with spare (does not seem to exist in our cds supplies)
• Swap the Side coil DAC (DAC_2) with the failing DAC (DAC_0) and drive the side coils with an offset since SIDE coils are not critical.
• Adapt the AI boards to be compatible with existing spare 18-bit DAC units.

ITMY actuator calibrated with higher resolution using ALS

Today I came briefly in the lab and restarted all models because the beams were missing in the BHD camera; implying the ASS model controlling TTs has tripped into a weird state. The problem got fixed after that and I recovered the IFO alignment more or less. Thus I began another quick calibration run --

I wrote a script to put calibration line and update the LSC YARM notch filter using python-foton so as to take an ALS calibration sweep of the YARM test mass actuator responses. For a given sweep frequency array, the script loops over the frequency, updates the notchSensMat (LSC-YARM FM10), loads the coefficients, and ramps up the SENSMAT OSC gain and frequency to inject the noise. The YAUX laser is locked to the YARM and YARM is locked to PSL during this measurement. Then, the real-time demodulated BEAT_Y signals are averaged for ~ 3 seconds (just wanted a quick scan, not a very accurate or precise one) and the result is plotted in Attachment #1. Notice that I have included the phase tracker loop correction to account for the high frequency calibration line inferred response (1 + i f/2000)

I then used foton in gui mode and exported the violin filter transfer function (FM1-4 and FM6 for ITMY) magnitude and inverted its effect to get the "dc actuation strength" of ITMY.

Discussion

• The value is consistent with our recently poor actuation due to c1sus - DAC-0 failure, at ~ 3 nm /count /f^2. I look forward to another measurement after the DAC-0 has been replaced / fixed.
• No more "high frequency" lift as seen before?
• There is still some residual frequency dependence near the phase tracker BW; maybe not just a simple integrator?

The idea of having the response shape is so I can then use the 5 lines only to get the response to high accuracy.

{Mayank, Yehonathan}

We updated the c1auxex db file ETMXaux.db. Backup was saved under the same folder called ETMXauxback.db.

The following EPICs channels were added to calculate OSEM PD variances using the RTS:

Additionaly, we changed the watchdog logic such that it will read the variance from these new channels:

We also check that the new variance channels match more or less the old ones. Attachment shows a comparison during the transition from tripped watchdog to damped state.

The watchdog logic was checked by setting the MAX_VAR to 0 and observing the watchdog trip. ETMX damping was restored succesfuly. Now we are ready to install the new coil drivers.

Vertex c1sus DAC-0 card replaced

[Paco, Yuta, JC, Mayank]

This morning JC helped us locate a 16 bit DAC adapter card located behind the XARM vacuum tube with the cds upgrade components. Yuta and I went to the IO chassis and replaced the adapter boards. We then restarted the models and ran the same test as last time (using the Vmon channels from the acromag to monitor DAC outputs) but noticed the values were all negative and large. Using dataviewer (see Attachment #1), we saw that DAC-0 actually railed to output negative values somewhere around 07:00 UTC (midnight), even before we attempted to swap the DAC adapter card, implying that the DAC card itself was the core of the failure. Furthermore, this kind of failure prevented any other suggested workarounds (like swapping face with side coil DACs and applying negative offset to side coils). We then decided to restore the DAC card adapter back to the previous one and further look for a spare 16-bit DAC.

After more digging around, JC found a spare 18 bit DAC card which is not useful... and finally, Mayank and JC suggested using the test stand IO chassis DAC as a replacement. We replaced this (see Attachment #2) and restarted the models a few times until fcinally at around ~15:30 we managed to get the system up and running in its previous state. The awggui tests were done on all affected vertex suspensions (PRM, ITMs, BS) and the results are summarized by Attachment #3-6.

ITMY actuator calibrated with higher resolution using ALS after c1sus-DAC0 replacement

I repeated the previous measurement (with fewer points) and the result is summarized in Attachment #1 -- just as a quick confirmation that the actuation strength (POS) is restored to its nominal ~ 5 nm / ct / f^2 value.

 (plot updated Tue Jun 6 10:34:27 2023 without violin filters and higher resolution)

Paco suggested I start putting together the beginnings of a heating system so that I can get a better idea of what parts and equipment we need and can order them ASAP. This is also to try and match the real data with simulation models for the basic system and then add complexities like insulation foam (which is also currently not in hand) later. This should give insights into loopholes in the models and also into the estimation of parameters like the convective transfer factor (h) which aren't trivial to accurately constrain in simulation according to what I've read.

I will edit in a circuit schematic by tomorrow (done), but the circuit is quite similar to the new one made by Kevin and Kira which I linked in a previous elog. For now, I have used a makeshift and messy combination of resistors (there are very few high wattage ones that we could find in both 40m and the EE shop) which manages to achieve a max current of around 0.25A through a resistive element of 50 ohms, leading to a peak power output of 3.22 W which is good enough for the puck. This resistor comes in a nice brass housing (visible below the puck in image) which makes it convenient to attach to the puck and pump heat into it relatively efficiently. I tested this circuit by turning it on for 30 minutes and the puck did warm up a bit. I will work on calibrating and attaching the old temperature sensor to this tomorrow so I can start doing step responses and quantifying things.

Note that I will add some gain to the RPI output to maybe scale it to 5V so that it can cross the V_{GS} threshold by a comfortable margin.

One critical difference from the old circuit is that this one is meant to drive the MOSFET only in fully-on or fully-off mode to minimize heat dissipation through it, so we basically use PWM to regulate the heat from zero to the peak value. JC and I also set up the ethernet wiring for the Raspberry Pi 2 at the experiment as well as my desk so that I can control it from my laptop over LAN. I tested PWM using Python with an LED that can be seen in the image. Now I basically just have to plug the Pi into the circuit input and measure the RMS current to confirm that it is also controllable in a similar way and linear as we would expect, and also check out the output waveform.

[Radhika, Aaron, Mayank, Paco]

Here I'll describe the setup for T&R measurements of a PR2 replacement, using the Lightwave NPRO laser located at the S/E corner of the PSL table. Our transmittivity prior for this optic is ~20-30 ppm. Aaron and I outlined the setup for measuring the transmittivity of p- and s-polarizations using a chopper wheel for lock-in detection [Attachment 1]. 

JC found a Lightwave laser controller (in cabinet along YARM). Mayank and Paco helped start it up and adjust the current such that we can align with low power. I used the power meter sitting on PSL to record a quick laser calibration up to 160 mW (plot in Attachment 2 - I can go up to 500 mW in the future). Attachment 3 shows the location of the power meter when these points were collected. For alignment, I set the laser current to 0.94 A (~33 mW). 

I removed most optics in the existing setup downstream of the Faraday isolator. I reused 2 PBS cubes and a HWP from the old setup (I still need a QWP). My progress as of 6/6 can be seen in Attachment 4.

Next:

Can you make this flat by compensating the gain bump due to the UGF of the phase tracker?

[Paco, Yuta]

RF FPMI is recovered after c1sus DAC-0 card replacement

Summary:
 - We wanted to check if FPMI locks after DAC-0 card relacement (40m/17620).
 - 60 Hz noise similar to what we saw in February prevented us from locking FPMI stably, but fixed it by turning off FM9 of coil output filters in MC1 and MC3 (40m/17462).
 - There are slight changes in locking gains, but it now locks reliably.

FPMI locking:
 - MICH: 1 for REFL55_Q, MICH_GAIN=18 (used to be 11) gives UGF of 45 Hz
 - DARM: 1 for AS55_Q, DARM_GAIN=0.044 (used to be 0.04) gives UGF of 134 Hz
 - CARM: 0.567 (used to be 0.496) for REFL55_I, CARM_GAIN=0.011 gives UGF of 224 Hz
 - Attachment #1 shows all the OLTFs.

60 Hz noise:
 - FPMI locking was not stable, and we moved back to YARM locking to see if 60 Hz noise is higher or not.
 - Attachment #2 shows 60 Hz noise measured with MC_F and YARM. The noise was actually similar to what we saw in 40m/17461, so we checked MC1 and MC3 dewhitening
 - FM9 of coil output filters was turned on for some reason (probably because of burts we were doing when fixing c1sus). MC1 and MC3 FM9 ELP28 filters should be off.
 - This made FPMI locking stable and 60 Hz noise lower by more than an order of magnitude (Attachment #3).