The following Video MUX inputs(cameras) and outputs(monitors) have been checked:
MC2F, FI, AS Spare, ITMYF, ITMXF, ETMYF, ETMXF, PSL Spare, ETMXT, MC2T, POP, MC1F/MC3F, SRMF, ETMYT, PRM/BS, CRT1(MON1), ETMY Monitor, CRT2(MON2), CRT4(MON4), MC1 Monitor, CRT3(MON3), PSL1 Monitor, PSL2 Monitor, CRT6(MON6), CRT5(MON5), ETMX Monitor, MC2 Monitor, CRT9, CRT7(MON7), CRT10, and Projector.
Their respective statuses have been updated on the wiki: (wiki is down at the moment, I will come back and add the link when it's back up)
[Jamie, Jenne, Koji]
We installed the new c1lsc and started the process.
We still need to configure bunch of the EPICS variables, matrices, and some of the filters.
This should be done in order to transmit the signals to the suspensions.
Jenne is going to work on this task tomorrow (Friday) morning,
and Koji will take over the task afternoon/evening.
Target: To lock the Michelson with the new RF/LSC
RF generation box: READY - already ready to go to the IOO rack. (Suresh)
RF distribution box: In Progress - the internal components are to be connected. (13th evening - Suresh)
Placing PD and CCD: Done - PD and CCD on the AP table (13th Afternoon - Aidan, Larisa with supervision of Kiwamu)
Cabling1: Done - PD signal AP table to the demodulator (13th Afternoon - Jamie with supervision of Suresh)
Cabling2: Done - RF generation box (IOO Rack) to the demodulator
Demodulator: In Progress - Test and install (13th night - Kiwamu with supervision of Suresh)
LSC model: Done - Run the new LSC model. (It is named as "C1LST" so far) (13th evening - Jamie)
LSC medm: Done on 14th - Modify the current LSC medm screens Update the EPICS database Adjust the matrices (- Jenne with supervision of Koji)
There were red lights on the status screen indicating RFM errors for the c1scy, c1mcs and c1rfm processes.
The c1iscey, c1sus machines were receiving data sent over the RFM network from the c1ioo computer with a bad time stamp, a few cycles too late. The c1iscex computer was receiving data from c1ioo fine.
The c1iscex RFM card had gotten into a bad state and was somehow slowing things down/corrupting data. It didn't affect itself, but due to the loop topology was messing everyone else up. Basically the only one who wasn't throwing an error was the culprit.
Hard power cycling the c1iscex computer reset the RFM card and fixed the problem.
The PD signals are transmitted to the suspension now.
The trigger thresholds were set to -1. This means the triggers are always on.
[Koji / Kiwamu]
The Michelson was locked with the new LSC realtime code.
(what we did)
-- Fine alignment of the Michelson, including PZTs, BS and ITMY.
Since the X arm has been nicely aligned we intentionally avoided touching ITMX. The IR beam now is hitting the center of both end mirrors.
At the end we lost X arm's resonance for IR. This probably means the PZTs need more careful alignments.
-- Signal acquisition
We replaced the RFPD (AS55) that Aidan and Jamie nicely installed by POY11 because we haven't yet installed a 55MHz RF source.
The maximum DC voltage from the PD went to about 50 mV after aligning steering mirrors on the AP table.
The RF signal from the PD is transferred by a heliax cable which has been labeled 'REFL33'.
Then the RF signal is demodulated at a demodulation board 'AS11', which is one of the demodulation boards that Suresh recently modified.
Although we haven't fully characterized the demod board the I and Q signal looked healthy.
Finally the demod signals go to ADC_0_3 and ADC_0_4 which are the third and fourth channel.
They finally show up in REFL33 path in the digital world.
With the new LSC code we fedback the signal to BS. We put anti-whitening filters in the I and Q input filter banks.
We found that dataviewer didn't show correct channels, for example C1LSC_NREFL33I showed just ADC noise and C1LSC_NREFL33Q showed NREFL_33I.
Due to this fact we gave up adjusting the digital phase rotation and decided to use only the I-phase signal.
Applying a 1000:10 filter gave us a moderate lock of the Michelson. The gain was -100 in C1LSC_MICH_GAIN and this gave us the UGF of about 300 Hz.
Note that during the locking both ETMs were intentionally misaligned in order not to have Fabry-Perot fringes.
While Kiwamu was working on the RF cabling at the LSC rack, I removed 80% of SMA cables which were not connected anywhere.
The rack is cleaner now, but not perfect yet. We need patch panels/strain relieving for heliaxes, cleaning up of the RF/LO cables, etc.
During checking the 11MHz demod boards I found that the I-Q relative phase showed funny LO power dependence.
It is now under investigation.
In the plot above the green curve represents the I-Q phase of a 11MHz demod board (see here).
It showed a strong dependence on the LO power and it changes from -60 deg to -130 deg as the LO power changes.
This is not a good situation because any power modulation on the LO will cause a phase jitter.
For a comparison I also took I-Q relative phase of a 33MHz demod board, which hasn't been modified recently.
It shows a nice flat curve up to 5 dBm although it looks like my rough measurement adds a systematic error of about -5 deg.
- to do -
* check RF power in every point of LO path on the circuit
* check if there is saturation by looking at wave forms.
Plotting the data points yielded by the spec analyzer of my first LPF yielded a result that was not expected: the desired cutoff frequency wasn't achieved because of some extra 100k resistance that wasn't taken into consideration. (see here ). I have redrawn the Bode graphs for this configuration so that it is easier to see that it is wrong (first attachment)
After some calculation adjustments, it was found that the capacitor value could remain at 10uF, but the resistance needed to be changed to 100k to maintain a gain of 0.5 and critical frequency at 0.1Hz. Second attachment is the Bode graph that results from this configuration.
Note: Bode graphs are both in Log-Linear scales (Wikipedia said so)
[Rana, Koji, Kiwamu]
Moreover the amplitude of the I and Q signals are highly unbalanced, depending on the LO power again.
This implies the coil for a 90 degree splitting won't work at 11 MHz since the coil is home made and used to be designed for a specific frequency (i.g. 24.5 MHz).
We decided to use a Mini circuit 90 deg splitter instead. Steve will order few of them soon and we will test it out.
I was investigating the beat note amplitude on the vertex PD again yesterday. The incident power on the PD was 150uW in the PSL green beam and 700uW in the X-ARM green beam. With perfect overlap and a transimpedance of 240, I expected to get a beat note signal of around 25mV or -19dBm. Instead, the size was -57dBm. Bryan and I adjusted the alignment of the green PSL beam to try and improve the mode overlap but we couldn't do much better than about -50dBm. (The noise floor of the PD is around -65dBm).
When we projected the beams to the wall of the enclosure, the xarm beam was 2 to 3x as large as the PSL green beam, indicating that the beam size and/or curvatures on the PD were less than ideal. There is a telescope that the XARM beam goes through just before it gets to the PD. I mounted the second lens in this telescope on a longitudinal translation stage. With some finagling of the position of that lens we were able to improve the beatnote signal strength to -41dBm.
Obviously the ideal solution would be to measure the beam size and RoC of the PSL beam and XARM beams and then design a telescope that would match them as precisely as possible because there's still another 20dB signal strength to be gained.
One way to avoid some of the bad stuff in there is to take the 1 dBm input and amplify it to ~21 dBm before splitting and sending in to the Level 17 mixers.
One way to do this is by using the A3CP6025 from Teledyne-Cougar. Its an SMA connectorized amp which can put out 25 dBm and has a gain of 24 dB. We can just glue it onto the demod boards. Then we can remove the ERA-5 amplifiers and just use the broadband splitter as Kiwamu mentioned.
We will make them all green !!
Again, all the files are available in the svn.
The original matrix naming conventions for the front ends was broken. It used _11, _12,...,_1e, _1f, _110, _111 and so forth. The code was changes to use _1_1, _1_2,...,_1_16,_1_17, and so on.
In addition the matrix of filter banks was modified to use the same naming convetion (instead of starting at zero, it now start with one).
I rebuilt all the models, and restarted them all.
I wrote a simple script to modify the burt restore files to have the correct names for all the stored matrix values.
I also modified all the suspension screens, by modifying the default screens in /opt/rtcds/caltech/c1/medm/master/
The C1SUS, C1SCX, C1SPX, C1SCY, C1SPY, and C1MCS models had their foton filter files modified to put filters into the newly changed named filters
Just a curiosity:
I just wonder how you have distingushed the difference between _111 and _111.
They are equivalent alone themselves. Have you looked at the contexts of the lines?
Or you just did not have the larger matrix than 16x16, did you?
They are equivalent alone themselves. Have you looked at the contexts of the lines?
Or you just did not have the larger matrix than 16x16, did you?
[Steve / Suresh / Kiwamu]
90 % of unused video cables have been removed.
Still a couple of video cables are floating around the video MUX. They will be removed in the next week's session.
The suggested layout of the 1Y2 Rack is shown below.
To simplify the wiring, I have largely kept demod boards with the same same LO frequency close to each other.
The Heliax cables land on the top and bottom of the of subracks. These are currently flexible plastic sheets. Steve has agreed to replace them with something more rigid. It would be good to have eight N-type connectors on the top and eight at the bottom. As demod boards occur in sets of eight per subrack. So it would be convenient if the 11 and 55 Mhz Heliax cables land on the top and the rest at the bottom. In the layout I have shown the current situation.
The LO signals to the boards come from the RF Distribution box and this is kept in the middle so that cables to both the subracks can be kept short.
The outputs of the AA filter boards from both subracks have to be connected to the SCSI Interface board with a twisted pair ribbon cable.
The east side window guides will be replaced by one long U-channel. There will be drilling into 2x2 steel frame. It should be done by 2pm today
This should remove the jerking motion of windows hitting the individual guides.
New right angle PVC, 2 x 2 x 1/4" installed at the AP table to strain relief the 1/4" spiral corrugated RF coaxes.
The anti aliasing box was opened up at the back to accommodate the junction board and the SCSI cable towards the ADC. Aluminum plate was attached to the bottom to hold the strain relief clamp.
Three more hanging junction cards will be replaced in this manner.
The installation went smoothly. There will be no more banging the doors into guides on the east side.
Atm2 showing the west side as is today
A new 90 degree splitter, PSCQ-2-51W, has arrived today and I installed it on a demod board called AS11.
Results of the I-Q phase measurement with the new splitter will be reported soon.
* Picture 1 = before removal of the handmade coil
* Picture 2 = after removal of the coil and the associated capacitors
* Picture 3 = after soldering PSCQ-2-51-W
First of all we will replace the home-made 90 degree splitter (see this entry) by a commercial splitter, PSCQ-2-51-W+ from Mini circuit. This is the step 1 basically.
A less LO power dependence on the relative phase was found. The new 90 deg splitter works better.
From -3 dBm to 10 dBm in LO power, the relative phase is within 90 +/- 5 deg.
As a comparison I plot the phase that I measured when the handmade coil had been there (green curve in the plot).
I will also measure amplitude unbalances between I and Q.
A 90 degree splitter, PSCQ-2-51W, has arrived today and I installed it on a demod board called AS11.
Restarted the elog with the script.
As seen in the previous measurement the first harmonic of both the 11 MHz and 55 MHz outputs are about 30dB
higher than desired. In an attempt to attenuate these and higher harmonics I introduced SBP-10.7 filters into
the 11MHz outputs and SLP-50 filters into the 55 MHz outputs.
Then I measured the height of the harmonics again and found that they were suppressed as expected. Now harmonic
at 22 MHz is 58dB lower than the 11 MHz fundamental. And the 110 MHz is lower by 55 dB compared to the 55 MHz
fundamental. None of the higher harmonics are seen => they are below 70dB
SLP-50 has an insertion loss(IL) of 4.65 dB and Return Loss(RL) of 3dB. It would be better to use SBP-60
(IL=1.4 dB and RL=23dB)
The filter on the 11 MHz lines is okay. The SBP-10.7 has IL=0.6 dB and RL=23 dB.
RF Amp operating temperature
Earlier measurement reported by Alberto in LIGO-T10004-61-v1 based on the LM34 temperature sensor were lower than that shown by placing a calibrated thermocouple sensor directly on the heat sink by about 5deg C. The difference probably arose because the LM34 was located on a separate free-hanging copper sheet attached to the RF Amp by a single screw, resulting in a gradient across the copper strip. I tried to move the LM34 which was glued down, but broke the leads in the process. I then replaced it with another one mounted much closer to the heat sink and held it down with a copper-strip clamp. There is no glue involved and there is heatsink compound between the flat surface of the LM34 and the heatsink. Picture attached.
The picture also shows the new filters which have been put in place to reduce the harmonics. Note that the SBP-10.7 which was to go on the 11 MHz Demod output is located much farther upsteam due to space constraints.
Amplitude imbalance between I and Q in a demod board, AS11, with the new 90 deg splitter was measured.
It shows roughly 10% amplitude imbalance when the LO power is in a range from 0 to 5 dBm. Not so bad.
With the handmade coil there used to be a huge imbalance (either I or Q goes to zero volt while the other keeps about 1 V rms) as the LO power decreases.
But with the new 90 deg splitter now there are no more such a huge imbalance.
The remaining 10 % imbalance possibly comes from the fact that we are using ERA-5 in each I and Q path. They may have such gain imbalance of 10%.
We should check the ERA-5 gains so that we can confidently say ERA-5 causes the amplitude imbalance.
Then our plan replacing the ERA-5s (see here) will sound more reasonable.
The new 90 deg splitter works better.
Way back, Jay had D-sub to SCSI adapters made to adapt our existing Sander box AA filters to the new SCSI based IO chassis. However, these did not fit inside the box.
At the time, we simply left the cards outside hanging, which was a hack and needed to be replaced.
Steve modified a black AA filter box so that it could fit the D-sub to SCSI adapter board on it, plus strain relief the SCSI cable, rather than let it hang. The back of the box was cut, and an extending piece of metal attached to the bottom of the box. The adapter board was screwed into the box, the SCSI plugged in, then the SCSI cable is clamped to the extending metal as well.
This modification will be propagated to the 3 remaining AA filter boards using the D-sub to SCSI adapter.
To design a new resonant EOM box I started reviewing the prototype that I've built.
As a part of reviewing I checked an important thing that I haven't carefully done so far :
I compared the measured input impedance with that of predicted from a circuit model. I found that they show a good agreement.
So I am now confident that we can predict / design a new circuit performance.
* * * (input impedance) * * *
Performance of a resonant circuit is close related to its input impedance and hence, in other words, determined by the input impedance.
Therefore an investigation of input impedance is a way to check the performance of a circuit. That's why I always use impedance for checking the circuit.
The plot below is a comparison of input impedance for the measured one and one predicted from a model. They show a good agreement.
(Note that the input impedance is supposed to have 50 Ohm peaks at 11, 29.5 and 55 MHz.)
* * * (circuit model) * * *
To make the things simpler I assume the following three conditions in my model:
1. inductor's loss is dominated by its DC resistance (DCR)
2. capacitor's loss is characterized only by Q-value
3. Transformer's loss is dominated by DCR and its leakage inductance
All the parameters are quoted from either datasheet or my measurement. The model I am using is depicted in the schematic below.
Basically the Q-vaules for the capacitors that I used are quite low. I think higher Q capacitors will improve the performance and bring them to more 50 Ohm.
The performance plots for POX_11 in the wiki are horrendous and the schematic is missing.
I opened up the box and found all kinds of horrors. There were multiple tunable parts and a flurry of excess nonsense.
The top 2 worst offenders:
1) The main tunable inductor was busted. I removed it and found that the coil was open. Too much indelicate soldering in its vicinity had melted the wire. Someone had put extra inductors and capacitors around it to make it seem as if the PD was working fine, but the noise performance was off by a factor of ~100.
2) The MAX4107 had a 1.4k series resistor. This make the output go through a 1450/50 voltage division which is not nice for the SNR. I removed it.
I then struggled for awhile to get a sensible response. It turned out that the TEST IN input was not giving me a sensible TF. Jenne and I fired the Jenne laser at it and found that the 11 MHz main resonance is there. In the morning I'll finish this off and post more results. I think its going to end up being fine.
I used the Jenne AM laser to tune up the PD (used to be POX_11 but now is called REFL_11). In addition to the notch at 22 MHz, I have also put in a LC notch at 5*f = 55.3 MHz. The transfer function below shows the RF OUT of the PD v. the drive to the laser. I didn't divide out by the 1811 because its not on the EE bench.
While checking whitening filters on the LSC rack, I found some epics controls for the whitening looked not working.
So I powered two crates off : the top one and the bottom one on 1Y3 rack.
These crates contain c1iscaux and c1iscaux2. Then powered them on. But it didn't solve the issue.
A new 90 deg splitter, PSCQ-2-51W, has been installed on another demod board called AS55.
It shows a reasonably close 90 degree separation between the I and Q signals at 55 MHz with various LO and RF power.
So far we have ordered only three PSCQ-2-51Ws for test. Now we will order some more for the other demodulators.
Some plots will be posted later.
Figure.1 I-Q relative phase measurement as a function of LO power.
Blue curve : relative phase of AS55 that I have modified today (#4572).
Red curve : relative phase of AS11 that I had modified a week ago (#4554). Just for comparison.
The relative phase of AS55 agrees approximately what we expected according to the datasheet of PSCQ-2-51W. We expected 85 degree.
Figure.1 I-Q amplitude imbalance as a function of LO power.
From - 5 dBm to 5 dBm in LO power the imbalance is within 3 %.
But the precision of the measurement is also about 2 % (because I used an oscilloscope). Even so the imbalance is still good.
Some plots will be posted later.
POX11 (see this entry) is now listed as REFL11 (on the very top row).
We will rename POY11 to POP11 for DRMI locking.
The files are on https://nodus.ligo.caltech.edu:30889/svn/trunk/suresh/40m_RF_upgrade/.
I worked on AS_11 today. Its ready for its noise / optical gain calibrations. I have left it on Suresh's desk.
This was one of the 24.5 MHz Black Box (Ben Abbott) style RFPDs rescued from LLO. The tunable inductor that was installed was too small to get the frequency down to 11 MHz and so I swapped in one of the shielded, ferrite core ones from our '7mm' CoilCraft kit. It had a range of 1.2 - 1.8 uH according to the datasheet.
I wasn't able to simulataneously get the peak at 11.06 MHz and the notch at 59.3 MHz and so I took Koji's advice and tuned the peak best. The plot above shows how the notch is slightly off. I think its not a problem; to get it better we would have to change out the inductor for the "2-omega" notch, but I was too lazy. The thinking is that its more important to have the gain be symmetric around the signal readout frequency so as to not imbalance the audio sidebands.
Since this one is going to be AS_11, we think that the 22 MHz signal will be tiny: the transmission of the 11 MHz sidebands to the dark port is small. If we later want to put in a 22 MHz notch anyway, there is space to do this via the 'active notch' pads around the MAX4107.
For the above plot, I used the Jenne laser. The DC output of the PD was ~30 mV (~0.6 mA). The RF drive to the laser was -10 dBm: no saturations. I have calibrated out the cable responses, but not using the 1811 setup, so the absolute calibration has yet to be done.
Also, it needs some new stickers. It would be handy if someone can figure out how to get some sheets of stickers that we can put into the printer. Then we can laser printer all of the data onto the stickers and stick them to the RFPD box.
On the back side of 1Y2 rack I found a cable, CAB-1X2-LSC_7, which is supposed to be connected to the whitening filter was disconnected.
I plugged it back and confirmed that the whitening filter is under control of EPICS.
Now all the gain sliders seem to be working because I can change the amplitude of signals with the sliders.
To check if the gain sliders are working or not, I intentionally disconnected all the inputs to the whitening filter.
Then I brought a gain slider of interest to the maximum. Due to the big gain I was easily able to see noise lying above ADC noise.
Also if the gain slider is 0 dB, which is the minimum value, the spectrum becomes just ADC noise.
In this way I checked all the gain sliders from PD1 to PD4. The picture below is just an example screenshot when I was doing this test.
Note that each filer is designed to have two poles at 150 Hz and two zeros at 15 Hz.
RF Source box has been mounted in the 1X2 rack.
Heliax cables have been directly attached to the box and anchored on the side of the 1X2 rack. Here is a list of Helix cables which have been connected so far.
RF Distribution box has been mounted in the 1Y2 rack and is ready for use.
The box receives 11 and 55 MHz Demod Signals from the RF source located in the 1X2 rack.
1) Turn off MC1, MC2, MC3, BS, ITMX, ITMY, PRM, SRM watchdogs.
2) Turn c1sus computer off (sudo shutdown now)
3) Go connect monitor and keyboard to c1sus. Turn c1sus on.
4) Hit "del" key at the right time to go to setup (BIOS).
5) Go to BIOS advanced tab, CPU options, enable Multi-threading.
6) Hit F10 to save and let the computer continue booting.
Once c1sus was up, I noticed several red lights and dead keep alives for the c1sus models.
Typing dmesg on c1sus revealed many messages like:
[ 107.583420] c1x02: cycle 33737 time 20; adcWait 10; write1 0; write2 0; longest write2 0
[ 107.583771] c1x02: cycle 33760 time 19; adcWait 11; write1 0; write2 0; longest write2 0
This indicates the Input/Output Processor (IOP) is not completing its duties within the 15 microseconds (1/64 kHz) that it has. These lines indicate its take 20 or 19 microseconds. (I saw messages ranging from 16 to 22 microseconds).
So this seems to agree with Rolf's observations that hyperthreading can cause a 5-10 microsecond increase in computation time.
So the next thing to do is modify which core the codes are running on, and try to get them paired up on the same physical core.
First, I disabled front end starts on boot up, and brought c1sus up. I rebuilt the models for the c1sus computer so they had a new specific_cpu numbers, making the assumption that 0-1 were one real core, 2-3 were another, etc.
Then I ran the startc1SYS scripts one by one to bring up the models. Upon just loading the c1x02 on "core 2" (the IOP), I saw it fluctuate from about 5 to 12. After bringing up c1sus on "core 3", I saw the IOP settle down to about 7 consistently. Prior to hyper-threading it was generally 5.
Unfortunately, the c1sus model was between 60 and 70 microseconds, and was producing error messages a few times a second
[ 1052.876368] c1sus: cycle 14432 time 65; adcWait 0; write1 0; write2 0; longest write2 0
[ 1052.936698] c1sus: cycle 15421 time 74; adcWait 0; write1 0; write2 0; longest write2 0
Bringing up the rest of the models (c1mcs on 4, c1rfm on 5, and c1pem on 6), saw c1mcs occasionally jumping above the 60 microsecond line, perhaps once a minute. It was generally hovering around 45 microseconds. Prior to hyper-threading it was around 25-28 microseconds.
c1rfm was rock solid at 38, which it was prior to hyper-threading. This is most likely due to the fact it has almost no calculation and only RFM reads slowing it down.
c1pem continued to use negligible time, 3 microseconds out of its 480.
I tried moving c1sus to core 8 from core 3, which seemed to bring it to the 58 to 65 microsecond range, with long cycles every few seconds.
I built 5 dummy models (dua on 7, dub on 9, duc on 10, dud on 11, due on 1) to ensure that each virtual core had a model on it, to see if it helped with stabilizing things. The models were basically copies of the c1pem model.
Interestingly, c1mcs seemed to get somewhat better and only taking to 30-32 microseconds, although still not as good as its pre-hyper-threading 25-28. Over the course of several minutes it was no longer having a long cycle.
c1sus got worse again, and was running long cycles 4-5 times a second.
At this point, without surgery on which models are controlling which optics (i.e. splitting the c1sus model up) I am not able to have hyper-threading on and have things working. I am proceeding to revert the control models and c1sus computer to the hyper-threading state.
Since Suresh has installed the RF source box and changed the cable configuration somewhat,
the demodulation phase for the MC locking became off by about 10 degree.
I changed the length of some cables and obtained a good demodulation phase by the same technique as Suresh and Koji did before (see here for detail).
I maximized the Q signal. The lock of the MC looks healthy.
We are now using the LIGO CDS SVN for storing our control models.
The SVN is at:
The models are under cds_user_apps, then trunk, then approriate subsystem (ISC for c1lsc for example), c1 (for caltech 40m), then models.
We have checked out /cds_user_apps to /opt/rtcds/.
So to find the c1lsc.mdl model, you would go to /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1lsc.mdl
This SVN is shared by many people LIGO, so please follow good SVN practice. Remember to update models ("svn update") before doing commits. Also, after making changes please do an update to the SVN so we have a record of the changes.
We are creating soft links in the /opt/rtcds/caltech/c1/core/advLigoRTS/src/epics/simLink/ to the models that you need to build. So if you want to add a new model, please add it to the cds_users_apps SVN in the correct place and create a soft link to the simLink directory.
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1sus.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1sus.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1sup.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1sup.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1spy.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1spy.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1spx.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1spx.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1scy.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1scy.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1scx.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1scx.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1mcs.mdl -> /opt/rtcds/cds_user_apps/trunk/SUS/c1/models/c1mcs.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1x05.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1x05.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1x04.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1x04.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1x03.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1x03.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1x02.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1x02.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1x01.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1x01.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1rfm.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1rfm.mdl
lrwxrwxrwx 1 controls controls 55 Apr 28 14:41 c1dafi.mdl -> /opt/rtcds/cds_user_apps/trunk/CDS/c1/models/c1dafi.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1pem.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1pem.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1mcp.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1mcp.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1lsp.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1lsp.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1lsc.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1lsc.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1ioo.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1ioo.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1gpv.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1gpv.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1gfd.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1gfd.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1gcv.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1gcv.mdl
lrwxrwxrwx 1 controls controls 54 Apr 28 14:41 c1ass.mdl -> /opt/rtcds/cds_user_apps/trunk/ISC/c1/models/c1ass.mdl
With some assistance from Kiwamu and Koji, I've drawn up the electronics design for the Beat Box for the vertex green locking. The Omingraffle schematic is posted on the Green Locking Wiki page. It's also attached below. Some final touches are necessary before we can Altium this up.
Attachment 1: Schematic of beatbox
Attachment 2: Front and back panel designs.
The Y arm has been locked with the IR beam. The purpose is to use the arm as an alignment reference for the input PZTs.
Detail will be posted later. Here is a picture of ITMY suspension. You can see there is a beam spot in the middle of the test mass.
First of all, the conclusions / results from the exercise of the Y arm locking yesterday are:
The position of the beam spots on both ETMY and ITMY are now not so bad ( ~ 5 mm off from the center).
The input PZTs are coarsely aligned to the Y arm.
Nevertheless IP_ANG is still too high to come out from the view port at the Y end station.
After the alignments of PRM, SRM and Michelson, POP is still largely clipped.
(what I did)
- Alignments of the Input PZTs
- Adjustment of the demodulation phase for the Y arm PDH.
- Activation of oplev on ITMY
- PDH locking
(Broken or likely broken stuff)
* IP_ANG doesn't give a signal to the digital side.
* ETMY coils look weak and 2 - 3 times weaker than the other test masses. (or OSEM readout gain maybe lower)
* reload button on sitemap.adl doesn't work.
* Farfalla, a lab laptop, seems out of network.