Unsatisfactory.

Neglecting the digital anti-imaging filter makes the discrepancy. You must take into account your digital filter twice.

I attached the slides I made during my visit for March LVC '09. P.5 would be useful.

Um, Beautiful.

Actually, 123.5usec is almost exactly twice of 1/16384Hz.
Because of the loop, we have 1/16384Hz delay. I wonder where we do have the delay.

In order to understand the behaviour of the system can I ask you to test the following things?

1) What are the delay without IOPs with f_sampl of 16k, 32k, 64k?

2) What are the delay with IOP with f_sampl of 32k, 64k?

[Kiwamu Koji]

Today we found the green beam from the end was totally missing at the vertex.

- What we found was very weak green beam at the end. Unhappy.

- We removed the PBS. We should obtain the beam for the fiber from the rejection of the (sort of) dichroic separator although the given space is not large.

- The temperature controller was off. We turned it on again.

- We found everything was still misaligned. Aligned the crystal, aligned the Faraday for the green.

- Aligned the last two steering mirrors such that we hit the approximate center of the ETMX and the center of the ITMX.

- Made the fine alignment to have the green beam at the PSL table.

The green beam emerged from the chamber looks not so round as there is a clipping at an in-vac steering.
We will make the thorough realignment before closing the tank.

Wow! Great guys!!

Can I expect to see the spectra of the frequency counter output with and without the servo?

RA: I think the SBP-70 is a bad idea. It limits the capture range. So does the SHP-25. You should instead just use a DC-block; the SR620 should work from 1-200 MHz with no problems.

Also, we have to figure out a better solution for the DAC at the ends: we cannot steal the QPD gain slider in the long run and the 4116 DAC at the ends has all 8 channels used up. Should we get the purple box for testing or should we try to use the fast DAC in the EX IO chassis as the actuator?

[Suresh, Koji]

- Removed MCT optics in the IMC chamber

- Rotated MC1 and MC3 in clock-wise to debias the YAW bias offsets (-5V and -8V to -1.5V and -0.5V).

- Adjusted insertion of the MC1 OSEMs so as to have the outputs of about 1.0V.

- Locked to TEM00. Trying to get the beams at the center of the mirror using Yuta's A2L.

As MC2 Trans mon QPD is temporary removed for fixing, we needed a reference for the MC alignment.

I replaced the 10% pick-off in the MCREFL path to the HR mirror.
Now the MCREFL DC with MC unlock is ~2.2, while it is ~0.29 in lock.
i.e. The visibility is 87%.

This means that the MCWFS were disabled for the moment.

It didn't make sense in several points.

1. Is the Faraday aperture really 3mm? The beam has the gaussian radius of ~1.5mm. How can it be possible to go through the 3mm aperture?

2. Why the MC3-FT distance is the matter? We have the steering mirror after MC3. So we can hit the center of the Faraday.
But if we have VERTICAL TILT of the beam, we can not hit the center of the Faraday entrance and exit at the same time.
That would yield the requirement.

3. If each coil has 5% variance in the response, variance of the nodal point (measured in % of the coil imbalance) by those four coils will be somewhat better than 5%, isn't it?

1. Look at the Faraday.

2. Look at the wiki. There is the optical layout in PNG and PDF.

3. 5% (0.8mm) and 2.5%(0.4mm) sounds a big difference for the difficulty, but if you say so, it is not so different.

Actualy, if you can get to the 5% level, it is easy to get to the 1-2% level as I did last time.
The problem is we are at the 15-20% level and can not improve it.

The cause is apparent! The connectors on the cables are wrong!
Currently only 50% of the pin length goes into the connector!

[Koji / Yuta]

There were the guys who used the PENTEK 40pin connectors into the IDC 40pin connectors.
Those connectors are not compatible at all.

==> We replaced the connectors on the cables from DAC to IDC adapters to the dewhitening board for the vertex SUSs.

In addition, I found one of the Binary OUT IDC50pin connector has no clamp.

==> We put the IDC50pin clamp on it.

PENTEK connectors were inserted. The latches are not working!

the vertical pitch is different between PENTEK and IDC!

Wow! Where is the clamp???

[Koji Yuta]

We found one of the ADC cables were left unconnected. This left the MC suspensions uncontrollable through the whole afternoon.
Please keep the status updated and don't forget to revert the configuration...

Has C1PSL rebooted? Has burtrestore been forgotten? Even without elog?

We found some settings are wrong and the PMC has pretty low gain.

[Valera Yuta Kiwamu Koji]

Kiwamu burtrestored c1psl. We measured the power levels around the PMC.

With 2.1A current at the NPRO:

Pincident = 1.56W
Ptrans_main = 1.27W
Ptrans_green_path = .104W

==> Efficiency =88%

----

We limited  the MC incident power to ~50mW. This corresponds to the PMC trans of 0.65V.
(The PMC trans is 1.88V at the full power with the actual power of 132mW)

RF Transimpedance of 200Ohm means the residual impedance at the resonance (R_res) of 40,
if you consider the amplifier gain (G_amp) of 10 and the voltage division by the 50Ohm termination,
this corresponds to the thermal noise level of Sqrt(4 kB T R_res)*G_amp/2 = 4nV/rtHz at the analyzer, while you observed 35nV/rtHz.

35nV/rtHz corresponds to 7nV/rtHz for the input noise of the preamp. That sounds too big if you consider the voltage noise of opamp MAX4107 that is 0.75nV/rtHz.

What is the measurement noise level of the RF analyzer?

[Kiwamu/Koji]

- The tanks are open

Plan

[done] - Remove the PZT cable currently underlying between BS and ITMY chambers
[done] - Put this PZT cable between BS and IMC chambers. Connect it on the PZT on the IMC table (SM1)
[done]- Put the two OSEM cables between BS and ITMY chambers. Connect this cable to SRM.
  The connector for this cable at the BS side is coming from Bob's place on Wednesday. We left it disconnected for now.

- Energize all of four PZTs and check the functionality.

I checked the vacuum system and judged there is no apparent issue.

The chambers and annulus had been vented before the power failure.
So the matters are only on the TMPs.

TP1 showed the "Low Input Voltage" failure. I reset the error and the turbine was lift up and left not rotating.
TP2 and TP3 seem rotating at 50KRPM and the each lines show low pressur (~1e-7)
although I did not find the actual TP2/TP3 themselves.

What else?

v: Edit on Dec 15 10PM
v: Edit on Dec 16 10PM


JD:  We should check OSEMs for all optics *after* table leveling.  Some of them (esp. BS and ITMX) are currently close to their limits right now.

KA: Check green alignment.

Take photos of the tables.

Fix the leveling weights


Location    Optics            Action
--------------------------------------------------------------
@ITMX -     v POX             alignment
            v POP1/POP2       alignment
            v Table Leveling

@ITMY -     POY               mirror replacement (45deg->0deg) / alignment
            v SR2-TT          alignment
            v SRM Tower       alignment / EQ-stop release
            v SRM             alignment
            v SRM OSEM
            vvSRM OPLEV (X2)  install (VIS)/ alignment
            v ITMY OPLEV (X2)   install (VIS)/ alignment
            v OM1/OM2         install (DLC 45deg)/ alignment       
            v Table Leveling

@BSC -      v OM3             install (DLC 45deg/ alignment)
            v OM4(PZT)          neutralize, adjustment
            IPPOS steering    alignment
            v BS OPLEV        alignment
            v PRM OPLEV(x2)     alignment
            Beam dumps
            Table Leveling

@IMC -      v REFL              mirror replacement　(45deg->0deg)

@ETMX -     Al foil removal
            Table Leveling

@ETMY -     ETMY damping
            OSEM
            OPLEV
            Al foil removal
            Table Leveling

@OMC -      v OM5(PZT)        neutralize, adjustment

@ITM/ETM -  Mirror Wiping



Great!

I wish this board works fine at least for several days...

I helped the vacuum installation work in the evening.

- Three steering mirrors after the SRM (OM1-OM3) were installed on the table. OM1 and OM2 were aligned.
  OM3 is in-place but not aligned to the OM4 (PZT).

- The ITMY oplev setup was disintegrated. The SRM/ITMY oplev beams were prepared.

- The SRM oplev mirrors were placed on the table and aligned.

- The ITMY oplev mirrors were placed on the table but not in-place.

[Steve and Koji]

The invac OPLEV mirrros were aligned before we get to the PMA party.

The OPLEV mirrors were adjusted in accordance with the optical layout.
Surprisingly the optical layout was enough precise such that we have the healthy red beams on the optical tables.
Steve placed the apertures at the position of the returning spots while I shook the stack to check if the range of the spot motion is sufficient.

The sole thing that has been deviated from the optical layout was that the SRM returning beam had to be reroute
as the SRM has better reflectivity on the AR surface in stead of the HR one.

[Koji and Kiwamu]

We obtained two dark port beams on the AP table: OMC REFL and AS

- First, IPANG and BS were aligned so as to have the beams on the center of the ETMs.

- Then ITMX/ITMY/PRM/SRM were aligned to have fringes in a single spot anywhere.

- As we already had the dark port beam on the steering mirrors on the BS table, today the PZT mirrors were adjusted.
This work was the beam steering between the BS table to the OMC table. After some tweaking of the mirror mounts, 
the spot on the last PZT mirror was found.

As we have not touched any of the OMC optics since they were aligned well, the alignment has been adjusted by the nobs of the PZT steering mirrors.
Once the beam is on the output mode matching telescope (OMMT), the work was quite easy thanks to the beam shrinking by the OMMT.

Note that the dark port beam is slightly clipped by the green steering mirror. The steering mirror will be moved next time.

After the alignment, we indeed obtained OMC REFL and AS beams on the AP table.
The fringes were visible on the OMC REFL CCD.

We keep the dark port setup on the OMC (in-vac) and AP tables so that they can be the reference of the dark port alignment.
In principle we can align the beams onto the OMC by the two PZT mirrors.

What is left?

Our minimum success of this vent is to setup the X arm cavity which is needed for the green locking.
This setup was already realized. So we fulfilled the condition to close the tank even if the damping of
the ETMY is not achieved. (But we should try)

Tomorrow, we make a light touches to POY, Green, IPPOS, and check the table leveling, clamping, etc, in general.

JD:  We should check OSEMs for all optics *after* table leveling.  Some of them (esp. BS and ITMX) are currently close to their limits right now.

KA: Check green alignment. / Take photos of the tables. / Fix the leveling weights

Location    Optics            Action
--------------------------------------------------------------
@ITMY -     POY               mirror replacement (45deg->0deg) / alignment
@BSC -      Green steering    alignment
            IPPOS steering    alignment
            Beam dumps
            Table Leveling

@ETMX -     Al foil removal
            Table Leveling

@ETMY -     ETMY damping
            OSEM
            OPLEV
            Table Leveling

@ITM/ETM -  Mirror Wiping



Did the same.

Did it again. It seemed that Google bot came to the elog and tried to obtain "http://nodus.ligo.caltech.edu:8080/robots.txt". That was the last of the log.
Bot came from the AJW's homepage. Also Google FeedFecther came to the elog.

Monday

• Place the bars on the in-vac tables to mark the positions of the test mass suspensions. (ITMX/ITMY/ETMX/ETMY)
• Check the table leveling again (ITMX/ITMY/ETMX/ETMY/BSC)
• Align the whole interferometer.
• Check the OPLEV spots by either QPDs or apertures
• Check the OSEM values (MC1/2/3, BS, PRM, SRM, ITMX, ITMY, ETMX, ETMY)
• Energize OMC PZTs.
  • We have removed the cards at the back of the HV driver.
  • Insert the card and check the connection.
  • Adjust the DC values at the middle of the range.
    -> They have an internal bias circuit to provide +75V at the outputs. (D060287).
    The actual voltages confirmed.
  • Adjust the physical knobs of the PZTs such that we can see the spots at the OMCR cam
• If everything is fine, attach the access connector.
• If still everythig is fine, put the BS heavy door.

Tuesday

- Do the following list for all of the testmass chambers.

• Check if the OSEMs and the OPLEV are still fine.
• Inspect the surface of the mirror with a laser pointer or a fiber coupled halogen light.
• Blow the mirrors by the ionization gun.
• Inspect the mirror surface again.
• Move the suspension tower close to the door.
• Make a single drag-wipe with iso
• Move the SOS tower at the original place.
• Check the OSEMs and the OPLEVs. Adjust the alignment.
• Put the heavy door.

- Start slow pumping

[Jenne Kiwamu Joe Osamu Steve Koji]

Yesterday (21st), we closed the BSC and the four testmass chambers.

We splitted the team into three.

- Wiping team (Jenne/Kiwamu)
- Suspension team (Osamu/Koji)
- Door closing team (Joe/Steve)

While the wiping team was working, the suspension team prepared the next suspension.
Once the mirror was wiped, the suspension team restored that suspension at the position of the markings on the table.

After the wipe of the first mirror, the wiping team got experienced and they were the fastest among the teams.
So the wiping team worked as the second suspension team when necessary.

All of us became the closing team after the last suspension has been restored.

We checked that we still have the Michelson fringes and the oplev pointings.

In total, the work was very efficient such that we only took four hours for the entire process.

We left the suspension marking on the optical tables because they are quite useful.

ELOG has crashed and I restarted it.

Actually the filtering is not effective so far as elog is not using apache but has its own web server inside.
So this just block the access to port 30889 (=SVN, Dokuwiki, etc).

The four IOO PZTs have been turned on in order to confirm the alignment of the IFO.

Once they are turned on, the spots (ITMX/ITMY/PRM/SRM) on the REFL CCD have been easily found.

When the X-arm was aligned to the green beam, it is easily locked to TEM00. Also some LG modes were visible.
i.e. There is some room to improve the mode matching.
The transmitted green at the PSL table is a bit too high and clipped by the first mirror on the table.

No IR flashes were found in either arms.

------------------

The below are the range and the set values of the strain gauge readback for the PZTs.
When the closed loop buttons are activated the PZTs are fixed at those values, if no one touches the set point dials.

            Min   Max   SetP | Display on the module
PZT1 Yaw    2.20  9.95  6.08 | Broken
PZT1 Pitch -0.011 8.89  4.40 | 1.58

PZT2 Yaw    0.737 9.94  5.37 | 2.17
PZT2 Pitch  0.010 9.42  4.71 | 1.89

- Previously MC TRANS was 9000~10000 when the alignment was good. This means that the MC TRANS PD is saturated if the full power is given.
==> Transimpedance must be changed again.

- Y1-45S has 4% of transmission. Definitively we like to use Y1-0 or anything else. There must be the replaced mirror.
I think Suresh replaced it. So he must remember wher it is.

- We must confirm the beam pointing on the MC mirrors with A2L.

- We must check the MCWFS path alignment and configuration.

- We should take the picture of the new PSL setup in order to update the photo on wiki.

Google bot  crashed the elog again. Then, I found that Google bot (and I) can crash elogd by trying to show the threaded view.
There looks similar issue reported to the elog forum, the author did not think this is a true bag.

Note: This happens only for the 40m elog. The other elogs (ATF/PSL/TCS/SUS/Cryo) are OK for the threaded view.

Nice, nice!

The power budget for the FPMI is here. The expected Intracavity power and the transmission are at  most ~8W and 100uW, respectively.

Fixed the 40m elog crashing with the threaded display.

This morning I found that Google bot crashed the elog again. I started the investigation and found the threaded mode is fine if we use the recent 10 entries.

I gradually copied the old entries to a temporary elog and found that a deleted elog entry on August 6 had a corrupted remnant in the elog file. This kept crashed the threaded mode.

Once this entry has been eliminated again, the threaded mode got functional.

I hope this eliminates those frequent elog crashing.

I can not think of any reason that the input impedance of 13kOhm between the pos/neg inputs produces such a big change at the output. In any case, the differential voltage between the pos/neg inputs produces a big output. But the output was just 2V or so. This means that the neg input was actually about zero volt. This ensures the principle of the summing amplifier of this kind.

Because the input impedance of the summing node (the additional resister you put at the negative input) is not infinity, the voltage divider is not perfect and shows 10% reduction of the voltge (i.e. the output will have +4.5V offset instead of +5V). But still it is not enough to explain such a small output like 2.3V.

What I can think of is that the earlier stages somehow have the offset for some reason. Anyway, it is difficult to guess the true reason unless all of the nodes around the last stage are checked with the multimeters.

At least, we can remove the voltage divider and instead put a 10k between -15V and the neg input in order to impose +5V offset at the output. This costs 1.5mA instead of 10mA.

[Koji Suresh Kiwamu]

Suresh modified the MC board to have +5V offset at the output. (To be reported in the separated elog)

The MC lock has not been obtained at this point. An investigation revealed that there was very small (~5mVpp) PDH signal.

Kiwamu removed his triple resonant adapter and put the 50Ohm termination insted.
This restored the signal level normal although this changed the demodulation phase about 20deg.
We left the demodulation phase as it is because this is a temporary setup and the loss of the signal is not significant.

Now the MC is steadily locked with the single super boost.

These are the next steps for a better operation of the arm locking. They are suitable for the day time activities

Reconfiguration of the X-End table

- End transmission power monitor (CDS model exists, need to configure the PD)

- IR steering mirror for the transmon

- Restore/align end green beam

- Relocate the end trans CCD

- Connect the video output cable for the X-end CRT monitor

LSC Whitening

- LSC Whitening binary IO connection

They are not urgent but also good things to do

MC servo characterization

- Error signal: frequency noise

- Loop characterization

Arm cavity characterization with cavity sweep

- Arm finesse for 1064nm and 532nm

- Arm FSR measurement with 1064 (and optionally with 532nm simultaneously)

- Arm g-factor for 1064nm and 532nm

My feeling was that the saturation was caused by the LSC whitening filter which was always on.
Once the LSC whitening filter is controlled from C1LSC, we would be able to remove the attenuator.

TF looks fine except for the large peak at around 200MHz which has been reported by Rana. The time series and the spectrum without the light are pathetic...

I still prefer to see the fit by LISO as the pole/zero fitting of LISO as the fit result is more physically understandable.
Anyone can ask me about the instruction how to use LISO

I guess Idc of 24mA would be just a mistake. It looks like ~0.2mA from the plot that sounds normal for the transimpedance of 2kOhm.

Question: What is the HWHM of the reesonance when you have f0 and Q.

Damn. If this figure is true, we were looking at wrong signal. We should look at the feedback signal to the VCO.

What is the point to use the error instead of the feedback? It does not make sense to me.

If the cable is flaky why we don't solder it on the circuit? Why we don't put a buffer just after the test point?

It does not make sense to obtain the error signal in order to estimate the freeruning noise without the precise loop characterization.
(i.e. THE FEEDBACK LOOP TRINITY: Spectrum, Openloop, Calibration)

RA: I agree that feedback would be better because we could use it without much calibration. But the only difference between the "error signal" and the "feedback signal" in this case is a 1.6:40 pole:zero stage with DC gain of 0 dB. So we can't actually use either one without calibration and the gain between these two places is almost the same so they are both equally bad for the SNR of the measurement. I think that Suresh and Kiwamu are diligently reading about PLLs and will have a more quantitative result on Monday afternoon.

Well... The ALS loop is engaged and the error was suppressed.
So, how is the IR error signal stabilized when the IR is brought in to the resonance?

I can see the linear trend of 0.1V/s from 5s to 10s.  This corresponds to 100kHz/s and 13nm
for the residual beat drift and the arm length motion, respectively. That sounds huge. The DC gain must be increased.

I found Tara's elog entry that Jenne laser is at PSL Lab.
Since we recently use it frequently, we should be aware where it is now.

1. The dewhitening filter CH6 had no output. I disconnected the cable and put it to the monitor out of the AI filter.
So the dewhitening is not in the loop.

2. I have made a thermal control filter

BANK1: pole 0Hz, zero 1mHz / LF boost stage
BANK2: pole 1mHz, zero 30mHz / LPF stage
BANK3: pole 1Hz, zero 0.1Hz / phase compensation stage
Gain: 0.05

It seems working with the gain of 0.05. As the thermal is very strong, the output has less than 10.
This means the we are effectively only using ~4bit. We need external filter.

Note that output of 30000counts were about 3V at  CH6.

3. Measured End PZT feedback with and without the thermal control. The UGF seems to be 0.2Hz.
The suppression at 10mHz is ~100. This is so far OK.

STATUS:

• Rebooted c1lsc and c1sus. Restarted fb many times.
• c1sus seems working.
• All of the suspensions are damped / Xarm is locked by the green
• Thermal control for the green is working
• c1lsc is frozen
• FB status: c1lsc 0x4000, c1scx/c1scy 0x2bad
• dataviewer not working

1. DataViewer did not work for the LSC channels (liek TRX)

2. Rebooted LSC. There was no instruction for the reboot on Wiki. But somehow the rebooting automatically launched the processes.

3. However, rebooting LSC stopped C1SUS processes working

4. Rebooted C1SUS. Despite the rebooting description on wiki, none of the FE processes coming up.

5. Probably, I was not enough patient to wait for the completion of dorphine_wait? Rebooted C1SUS again.

6. Yes. That was true. This time I wait for everything going up automatically. Now all of c1pemfe,c1rfmfe,c1mcsfe,c1susfe,c1x02fe are running.
FB status for c1sus processes all green.

7. burtrestored c1pemfe,c1rfmfe,c1mcsfe,c1susfe,c1x02fe with the snapshot on Jan 25 12:07, 2010.

8. All of the OSEM filters are off, and the servo switches are incorrectly on. Pushing many buttons to restore the suspensions.

9. I asked Suresh to restore half of the suspensions.

10. The suspensions were restored and damped. However, c1lsc is still freezed.

11. Rebooting c1lsc freezed the frontends on c1sus. We redid the process No. 5 to No.10

12. c1x04 seems working. c1lsc, however, is still frozen. We decided to leave C1LSC in this state.

I have put an offset of 1000 counts to C1:SUS-ETMX_ALS_OFFSET. This actually misalign the mirror a lot.

While the offset is applied. I adjusted the balance of the coil matrix.
UL 1.580 UR 0.620
LL 0.420 LR 1.380

> ezcaread C1:SUS-ETMX_TO_COIL_0_0_GAIN
C1:SUS-ETMX_TO_COIL_0_0_GAIN = 1.58
> ezcaread C1:SUS-ETMX_TO_COIL_0_1_GAIN
C1:SUS-ETMX_TO_COIL_0_1_GAIN = 0.62
> ezcaread C1:SUS-ETMX_TO_COIL_0_2_GAIN
C1:SUS-ETMX_TO_COIL_0_2_GAIN = 0.42
> ezcaread C1:SUS-ETMX_TO_COIL_0_3_GAIN
C1:SUS-ETMX_TO_COIL_0_3_GAIN = 1.38

Now, we can keep TEM00 for green with +/-1000counts of push although the fast step of the offset make the lock lost.

It turned out that the step longitudinal input temporary misalign the mirror in pitch because the length and pitch are coupled.
I guess that we don't excite pitch if we push the mirror slowly. Eventually, we need f2p transfer function adjusted in the output matrix.

This is definitely a nice magic to know as the rebooting causes too much hustles.

Also, you and I should spend an hour in the afternoon to add the suspension swtches to the burt requests.

Experiment in the night of Jan 26.

o The arm was locked for the IR beam and was aligned for it.
o The green was aligned to the arm
o The beat freq was observed with the RF analyzer and the webcam.
o Engaged the ALS servo
o Compared the fluctuation of the beat freq with and without ALS
o Scanned the beat freq in order to find an IR resonance

The beat freq was scanned. A resonance for IR was found.
However, the residual motion of the arm was not within the line width of the IR resonance.

 To Do
- Improve the ALS servo (==>Koji)
- VCO noise characterization (==>Suresh is on it)
- Calibrate the PLL feedback (i.e. ALS error) into Hz/rtHz (==>Suresh)
- Calibrate the end green PZT fb into Hz/rtHz (==>Osamu is on it)
- Tuning of the suspension filters to reduce the bounce mode coupling.

DETAILS

o How to lock the arm with IR

• Coarsely align the arm without lock. Transmittion was ~300 with MCTRANS ~40000
• REFL11I is the error signal. unWhiten filter (FM1) should be on.
• Unlock the MC and null the error and the arm trans offset by running the following commands

ezcaservo -g -0.1 -r C1:LSC-REFL11_I_OUTPUT C1:LSC-REFL11_I_OFFSET
ezcaservo -g -0.1 -r C1:LSC-REFL11_Q_OUTPUT C1:LSC-REFL11_Q_OFFSET
ezcaservo -g 0.1 -r C1:LSC-TRX_OUTPUT C1:LSC-TRX_OFFSET

• Confirm the input matrix to pass REFL11I to MC path (why don't we use XARM path...?)

ezcawrite C1:LSC-MTRX_81 1.0

• Servo configuration
  • For acquisition: Gain of 2. Only FM1 (1000:10) has to be on.
  • After the acquisition (TRX>200): The gain is to be changed to 1. FM2 and FM3 can be turned on for the LF boost.
• Actuator matrix: connect MC path to ETMX and MC2

ezcawrite C1:LSC-OM_MTRX_18 1.0
ezcawrite C1:LSC-OM_MTRX_78 1.0

o How to align the green beam

• After the alignment I went the end and aligned the last two steering mirrors.

o The beat freq monitor

• Put the RF analyzer at the RF splitter of the RFPD output.
• Used Zonet webcam (http://192.168.113.201:3037) for the remote monitoring

o How to engage the ALS servo

• Preparation:
  
  • VCO PLL feedback comes to X_FINE path.
  • Put an offset of -850 to cancel too big offset (when the VCO is unlocked)
  • Use Y_FINE channel for the offset addtion. FM1 is 10mHz LPF in order to make the offset smooth.
  • Add X_FINE and Y_FINE by the matrix.
• Control
  
  • Turn off X_FINE out. Leave Y_FINE output turned on.
  • Turn on ETMX ALS path.
  • Servo setting: FM1 1000:30 ON, others OFF, gain1
  • Wait for the beat comes in to the locking range at around 80MHz.
  • If the peak is too far, sweep Y_FINE offset in order to . Or change GCV slow thermal offset to let the beat freq jump.
  • You may have ambiguity of the feedback sign depending on which green has higher freq.
  • After the capture of the ALS lock, increse the gain up to 20. Turn on 0.1:boost at FM3.

o Comparison of the stability of the beat freq (Attachment3)

• The spectra of the VCO PLL feedback was measured.
• First of all, the signal was measured without ALS (blue).
  The PLL lost lock quite frequently, so the careful adjustment of the offset was necessary.Still I think there was slight saturation upconversion.
• Then, the ALS was turned on (red). The gain was 20. This is an in-loop evaluation of the servo. The suppression was ~1000 at 1Hz.

o Beat freq scanning

• The following command was used for the beat note scanning 

ezcastep -- "C1:GCV-YARM_FINE_OFFSET" "5,500"

• Once the IR transmission was found, the scan was stopped.
• Because the resultant rms stability of the arm was not within the line width of the cavity, the smooth resonant curve was not obtained.
• From the shape of the error signal the peak-to-peak displacement (f>1Hz) was estimated to be +/-0.7nm. The dominant displacement
  in the period is 16Hz component.

No signal is transmitted from C1:GCV-SCX_ETMX_ALS (on c1gcv) to C1:GCV-SCX_ETMX_ALS (on c1scx)

I can't find RFM definition for ALS channels in c1rfm. Where are they???

We had some issues in terms of the script paths. I have fixed it by replacing /cvs/cds/caltech/scripts to /cvs/cds/rtcds/caltech/c1/scripts

Here is the output of diff

----------------------------------------------


rossa:caltech>diff cshrc.40m cshrc.40m.20110128
44,47c44,45
< # OBSOLETE set path = ($path /cvs/cds/caltech/scripts/general)
< # OBSOLETE set path = ($path /cvs/cds/caltech/scripts/general/netgpibdata)
< set path = ($path /cvs/cds/rtcds/caltech/c1/scripts/general)
< set path = ($path /cvs/cds/rtcds/caltech/c1/scripts/general/netgpibdata)
---
> set path = ($path /cvs/cds/caltech/scripts/general)
> set path = ($path /cvs/cds/caltech/scripts/general/netgpibdata)
50,51c48
< # OBSOLETE setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/perlmodules:/cvs/cds/caltech/libs/solaris9/usr_local_lib/perl5/5.8.0/:/cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
< setenv PERL5LIB /cvs/cds/caltech/libs/solaris9/usr_local_lib/perl5/5.8.0/:/cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
---
> setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/perlmodules:/cvs/cds/caltech/libs/solaris9/usr_local_lib/perl5/5.8.0/:/cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
61,64c58,59
< #OBSOLETE setenv PATH ${SOLARISPATH}/bin:$GDSPATH/bin:$ROOTSYS/bin:$TDSPATH/bin:/cvs/cds/caltech/scripts/general/netgpibdata:$PATH
< setenv PATH ${SOLARISPATH}/bin:$GDSPATH/bin:$ROOTSYS/bin:$TDSPATH/bin:/cvs/cds/rtcds/caltech/c1/scripts/general/netgpibdata:$PATH
< #OBSOLETE setenv SCRIPTS /cvs/cds/caltech/scripts
< setenv SCRIPTS /cvs/cds/rtcds/caltech/c1/scripts
---
> setenv PATH ${SOLARISPATH}/bin:$GDSPATH/bin:$ROOTSYS/bin:$TDSPATH/bin:/cvs/cds/caltech/scripts/general/netgpibdata:$PATH
> setenv SCRIPTS /cvs/cds/caltech/scripts
87,88c82
< #OBSOLETE setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
< setenv PERL5LIB /cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
---
> setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
99,100c93
< #OBSOLETE setenv SCRIPTPATH /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/netgpibdata
< setenv SCRIPTPATH /cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/scripts/general/netgpibdata
---
> setenv SCRIPTPATH /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/netgpibdata
103,104c96
< #OBSOLETE setenv SCRIPTS /cvs/cds/caltech/scripts
< setenv SCRIPTS /cvs/cds/rtcds/caltech/c1/scripts
---
> setenv SCRIPTS /cvs/cds/caltech/scripts
135,137c127
< #OBSOLETE alias listenDARM '/cvs/cds/caltech/scripts/c1/listenDARM'
< alias listenDARM '/cvs/cds/rtcds/caltech/c1/scripts/c1/listenDARM'
<
---
> alias listenDARM '/cvs/cds/caltech/scripts/c1/listenDARM'
156,157c146
< #OBSOLETE setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/perlmodules
< setenv PERL5LIB /cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/c1/scripts/general/perlmodules
---
> setenv PERL5LIB /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/perlmodules
167,168c156
< #OBSOLETE setenv SCRIPTPATH /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/netgpibdata
< setenv SCRIPTPATH /cvs/cds/rtcds/caltech/c1/scripts/general:/cvs/cds/rtcds/caltech/scripts/general/netgpibdata
---
> setenv SCRIPTPATH /cvs/cds/caltech/scripts/general:/cvs/cds/caltech/scripts/general/netgpibdata
172,173c160
< #OBSOLETE setenv SCRIPTS /cvs/cds/caltech/scripts
< setenv SCRIPTS /cvs/cds/rtcds/caltech/c1/scripts
---
> setenv SCRIPTS /cvs/cds/caltech/scripts
198,199c185
< #OBSOLETE alias listenDARM '/cvs/cds/caltech/scripts/c1/listenDARM'
< alias listenDARM '/cvs/cds/rtcds/caltech/c1/scripts/c1/listenDARM'
---
> alias listenDARM '/cvs/cds/caltech/scripts/c1/listenDARM'
288,295c274,277
< #OBSOLETE alias makefiltscreen '/cvs/cds/caltech/scripts/Admin/makeFilterScreen.pl'
< #OBSOLETE alias makelockinscreen '/cvs/cds/caltech/scripts/Admin/makeLockInScreen.pl'
< #OBSOLETE alias f_and_r '/cvs/cds/caltech/scripts/Admin/find_and_replace.pl'
< #OBSOLETE alias plotrgascan '/cvs/cds/caltech/scripts/RGA/plotrgascan'
< alias makefiltscreen '/cvs/cds/rtcds/caltech/c1/scripts/Admin/makeFilterScreen.pl'
< alias makelockinscreen '/cvs/cds/rtcds/caltech/c1/scripts/Admin/makeLockInScreen.pl'
< alias f_and_r '/cvs/cds/rtcds/caltech/c1/scripts/Admin/find_and_replace.pl'
< alias plotrgascan '/cvs/cds/rtcds/caltech/c1/scripts/RGA/plotrgascan'
---
> alias makefiltscreen '/cvs/cds/caltech/scripts/Admin/makeFilterScreen.pl'
> alias makelockinscreen '/cvs/cds/caltech/scripts/Admin/makeLockInScreen.pl'
> alias f_and_r '/cvs/cds/caltech/scripts/Admin/find_and_replace.pl'
> alias plotrgascan '/cvs/cds/caltech/scripts/RGA/plotrgascan'

A prototype freq divider has been made which works up to ~40MHz.

74HC4060 (14bit binary ripple counter) divides the freq of the input signal, which is comverted by the comparator LT1016
into the rectangular signal. The division rate is 2^14.

Attachment1: Circuit diagram

Attachment2: Photo, the prototype bread board

Attachment3: Photo, the spectrum of the freq divided output. The 40MHz input has been divided into 2.4k.
There are the 3rd and 5th harmonics seen. The peak was pretty sharp but the phase noise was not evaluated yet.

The circuit was made on the prototype bread board which is apparently unsuitable for RF purposes.
Indeed, it was surprising to see its working up to 40MHz...

In order to increase the maximum freq of the system we need the following considerations

• RF PCB board
• Input RF buffer (or amplifier) with a 50Ohm input impedance.
• Faster comparator. LT1016 has the response time of 10ns, which is not enough fast.
• Faster counter. Faster chip 74HC4020 has already been ordered.

The projector in the controls room has been fixed the orange blinking of the status LED.

What we needed was to push "Volume -" and "Menu" for 5 sec.
This resets the timer of the lamp. When the timer reaches 2500 hours, it automatically start sabotaging.

We've got the spare lamp. It is in the top drawer of the computer cabinet on which the label makers are.

The freq divider was built and installed in the beat detection path.

Attachment 1: Circuit diagram

• Input stage:  Wideband RF amp with DC block at the input and the output. The gain is 10dB typ.
• 2nd stage: Ultra fast comparator AD9696. Note: AD9696 is an obsolete IC and there are only a few extra at Wilson house.
  The output is TTL/CMOS compatible.
• 3rd stage: 14bit binary ripple counter (fmax~100MHz.)

Note: I have added 7805/7905 regulators to the circuit as I could not find -5V supply on the 1X1/2 racks.

Attachment 2: Packaging

• The box is german made Eurocard size box from Techno-Isel Linear Motion http://www.techno-isel.com/lmc/Products/EnclosureProfiles11055.htm
  The box is excellent but I didn't like the fixing bolts as they are self-tapping type. I tapped the thread and used #6-32 screws.
   
• The prototyping board is BPS's (BusBoard Prototype System http://www.busboard.us/)  SP3UT. The card size is 160mm x 100mm.
  The other side is a ground plane and the small holes on the board are through holes to the ground plane.
  This particular card was not easy to use.
   
• The input is SMA. Unfortunately, it is not isolated. The output is an isolated BNC.
   
• The supply voltage of +/-15V is given by the 3pin D-connector. The supply voltages have been obtained from the cross connect of 1X1.

Attachment 3: Input specification

• The input frequency is 10MHz~85MHz. At lower frequency chattering of the comparator against the multiple zero crossing of the (relatively) slow sinusoidal waves.
• The input amplitude. There are no apparent degradation of the freq jitter when the input power was larger than -30dBm.