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ID Date Author Typeup Category Subject
  3814   Thu Oct 28 21:20:11 2010 yutaUpdateCDSFlaky fb, tried DAQ re-install, but no help

Summary:
  Unfortunately, fb is flakier than normal. We can't use dataviewer and diaggui now.
  I thought it might be because editting .ini files(list of DAQ channels) in /cvs/cds/rtcds/caltech/c1/chans/daq/ without using GUI was doing something wrong.
  So, I re-installed DAQ, but it didn't help.

What I did:
1. ssh c1sus, went to /opt/rtcds/caltech/c1/core/advLigoRTS/ and ran
  make uninstall-daq-c1SYS
  make install-daq-c1SYS

It didn't help.
More than that, MC suspension damping went wrong. So;

2. Rebooted c1sus machine.
 I restored MC suspension damping by doing this.
 (Similar thing happened Tuesday when we were trying to lock MC)

Conclusion:
  Editting .ini DAQ channel list file wasn't wrong. (or, I failed in finding anything wrong right now)

Quote:

Attempted Fixes:

Yuta may try restoring the old DAQ channel choices and see if that makes a difference.

 

  3817   Fri Oct 29 04:24:34 2010 KojiUpdateIOOPMC output increased: need attention

[Kevin Koji]

- The PBS alignment increased the transmitted power

- The first faraday and the PMC EOM were realigned.

- The transmission of the PMC increased from ~5.4V to ~6.5V.

Thus we need to pay attention to the incident beam power on to the MC
so that it does not exceed the power of 20-40mW.

Kevin will give us the detail of the work.

  3818   Fri Oct 29 04:58:04 2010 KevinUpdatePSLPBS Optimization

[Koji and Kevin]

Since there was still a lot of power being reflected from the PBS before the Faraday rotator, I placed another PBS at the reflection from the first PBS to investigate the problem. If everything was ideal, we would expect the PBS to transmit P polarization and reflect S polarization. Thus, if the laser was entirely in the TEM00 mode, with the quarter and half wave plates we should be able to rotate the polarizations so that all of the power is transmitted through the PBS. In reality, some amount of P is reflected in addition to S reducing the power transmitted. (We are not sure what the PBS is since there are no markings on it but CVI says that their cubes should have less than 5% P reflection).

For the following measurements, the laser crystal temperature was 31.8° C, the current was 2.1 A, the half wave plate was at 267° and the quarter wave plate was at 330°. I first measured the power reflected from the first PBS then added the second PBS to this reflected light and measured the transmitted and reflected powers from this PBS with the following results:

reflection from first PBS 127 mW
reflection from second PBS 48 mW
transmission from second PBS 81 mW

This shows that approximately 81 mW of P polarization was being reflected from the first PBS and that there is approximately 48 mW of S polarization that could not be rotated into P with the two wave plates. Attachment 1 shows the shape of the reflected (S polarization) beam from the second PBS. This shows that the S polarization is not in TEM00 and can not be rotated by the wave plates. The transmitted P polarization is in TEM00.

We then rotated the first PBS (in yaw) to minimize the amount of P being reflected. Repeating the above measurement with the current alignment gives

reflection from first PBS 59 mW
reflection from second PBS 52 mW
transmission from second PBS 8.5 mW

Thus by rotating the cube to minimize the amount of P reflected, ~70 mW more power is transmitted through the cube. This adjustment moved the beam path slightly so Koji realigned the Faraday rotator and EOM. The PMC was then locked and the beam was realigned on the PMC. At 2.1 A, the transmission through the PMC is 6.55 V and the reflection is 178 mV. With the PMC unlocked, the reflection is 312 mV. This gives a visibility of 0.43.

Note by KA:
We realigned the beam toward the PMC at 1.0A at first so that we don't cook any parts. Once we get the TEM00 resonance, the steering mirrors were aligned to maximize the PMC transmission. Then the pumping current was increased to 2.1A.

  3819   Fri Oct 29 05:40:51 2010 kiwamuUpdatePSLwideband EOM aligned : AM decreased by 24dB

At the PSL table I aligned the wideband EOM more carefully.

Amplitude modulation (AM) components in the main beam at 29.5MHz were successfully diminished by 24 dB. 

Last night when we were locking the MC, we noticed that the reflected light had AM which somewhat disturbes the Pound-Drever-Hall locking of the MC.

So I aligned the wideband EOM to reduce the AM components.

 


(method)

  In order to observe AMs I put a photodiode PDA255 whose bandwidth is 50MHz after the wideband EOM.

Before the PD I also put a convex lens together with a stack of ND filters and put a steering mirror to control the beam spot on the PD.

 EOMalign.png

First I aligned the EOM such that the DC voltage from the PD was maximized. This process corresponds to a coarse alignment.

And then I tried reducing a peak at 29.5MHz seen in the spectrum analyzer. 

 

(results)

At the beginning the AM peak in the spectrum analyzer was at about -48 dBm.

After the alignment of the EOM it went down below the PD's dark noise floor of -72 dBm.

I checked the alignment also with an IR viewer, it looks quite good.

  3820   Fri Oct 29 06:20:20 2010 kiwamuUpdateGreen Locking80MHz VCO for green PLL : VCO calibration

 I calibrated the VCO frequency as a function of the applied input voltage.

The range is approximately +/- 5 MHz, which is large enough to cover the arm's FSR of 3.75MHz.

calibration.png 

======== measured parameters ======

center frequency: 79.5 MHz

VCO range: 74MHz - 84MHz

coefficient : 1.22MHz/ V (+/- 2V range)

nominal RF power: -0.66 dBm

(Note: The measurement was done by using Giga-tronics hand-hold power meter.)

Quote from #3803

Tomorrow I will check the VCO part, especially I am curious about the VCO range.

  3822   Fri Oct 29 11:29:29 2010 josephbUpdateCDSHow I broke the frame builder yesterday

Problem:

Long before Yuta came along and deleted daqd, I had done something to prevent the framebuilder code from running at all.

Cause:

Alex pointed out via e-mail that the corresponded to the inability to access certain frame files due to their permissions being only for root. 

Turns out when I had run the code under the inittab, I forgot to make it use controls, instead of root (which is the default).  This later on caused problems for the code when it tried to access those files, resulting in the wierd errors we saw.

Solution:

Use chown to change the offending frame files back to controls.

Future:

Write a proper inittab script which uses "su controls" before running the daqd code.

  3823   Fri Oct 29 14:06:12 2010 kiwamuUpdateGreen LockingRe: 80MHz VCO for green PLL : VCO calibration

P.S. There is a document about the 80MHz VCO box. This may be helpful. 

link to LIGO DCC

  3824   Fri Oct 29 14:16:26 2010 JenneUpdateSUSPRM baking

[Suresh, Jenne]

We took a look-see at the PRM after the gluing from last night.  The balance is still okay.  The reflected beam is a teeny bit below the laser aperture (center of the beam maybe ~2mm below, so ~1mRad low).  This is within our okay range, since the DC offset that the OSEMs will give will be even more, and the coils can definitely handle this kind of offset.

We took the optic out of the tower, and gave it to Bob and Daphen to bake over the weekend.

  3825   Fri Oct 29 16:03:35 2010 kiwamuUpdatePSLwideband EOM : installed the triple resonant box

 

 small_DSC_2654.jpg

The box is electrically isolated from the optical bench.

Underneath the box there are four rubber legs and two Delrin plates (black and white) on the top of the box. 

As everyone knows this box is a prototype, so I will make another nicer box with a PCB in this November.

  3826   Fri Oct 29 16:39:01 2010 JenneUpdateTreasureOld Green suspension towers disassembled

[Jenne, Joonho]

At Koji's request, we disassembled 2 of the old Green suspension towers that have been sitting along the X-arm forever (read that last word in a 'Sandlot' voice.  Then you'll know how long the suspensions have been sitting there).

They are now hanging out in plastic trays, covered with foil.  They will now be much easier to store.

We should remember that we have these, particularly because the tables at the top are really nice, and have lots of degrees of freedom of fine adjustment.

 

Steve:

Atm1, there is one more of these old suspension towers

Atm2, disassembled

Attachment 1: P1070014.JPG
P1070014.JPG
Attachment 2: P1070015.JPG
P1070015.JPG
  3827   Fri Oct 29 16:43:25 2010 josephbUpdateCDSc1ioo now talking to c1sus

Problem:

c1ioo was not able to talk to c1sus because of timing issues.  This prevented the mode cleaner length signal (MC_L) from getting to c1sus.

Solution:

The replacement c1ioo chassis from Downs with a more recent revision of the IO backplane works. 

The c1ioo is now talking to c1sus and transmitting a signal.

We connected the cable hanging off the DAQ interface board labeled MC OUT1 to the MC Servo board's output labeled OUT1.

During debugging I modified the c1x02, c1x03, c1mcs and c1ioo codes to print debugging messages.  This was done by modifying the /opt/rtcds/caltech/c1/advLigoRTS/src/fe/commData2.c file.  I have since reverted those changes.

Future:

We still need to check that everything is connected properly and that the correct signal is being sent to the MC2 suspension.

 

  3832   Mon Nov 1 10:17:55 2010 steveUpdateGeneralbreakers relabelled

Pedro of the electrical shop helped to retrace wires from the racks to the breakers. Many wrong labels were replaced. These labels are  still representing                          the south arm as Y and  the east arm as X.

Racks: 1X1,2,3,4 and 1Y3,4,5,6,7 and 9 are connected through manual disconnect swithes to  AC power breaker PC-1 on the west wall of IFO room 104.

             This panel PC-1 is connected to T1 isolation transformer in room 101 Panel L - # 38, 40, 42

Racks: 1Y1 & 2  psl and mc are connected through manual disconnect switches to AC power breaker PC-2 just west of the psl enclosure.

             This panel is connected to T2 isolation transformer in room 101 Panel L - # 32, 34, 36

Attachment 1: P1060970.JPG
P1060970.JPG
Attachment 2: P1060972.JPG
P1060972.JPG
Attachment 3: P1060975.JPG
P1060975.JPG
  3834   Mon Nov 1 11:34:08 2010 josephbUpdateCDSCA.Client.Exception spam fixed

Problem:

CA.Client.Exception...............................................
    Warning: "Identical process variable names on multiple servers"
    Context: "Channel: "C1:SUS-ITMX_TO_COIL_0_3_INMON", Connecting to: 192.168.113.85:42367, Ignored: c1susdaq:42367"
    Source File: ../cac.cpp line 1208
    Current Time: Fri Oct 29 2010 18:07:39.132686519

The above exception gets thrown for each channel sent to the framebuilder when you start the frame builder.  Its the 192.168.113.xxx (main martian) and 192.168.114.xxx (DAQ) networks sending the same information.  This makes it hard to see real errors when starting the frame builder.

Solution:

Configure EPICS channel access to only use one network.  This is done by modifying the /etc/bash/bashrc and the /diskless/root/etc/bash/bashrc files with the following two lines:

export EPICS_CA_AUTO_ADDR_LIST=NO
export EPICS_CA_ADDR_LIST="192.168.113.255"

The first line tells the computers not to automatically search all attached network devices.  The second tells it to use the 192.168.113.xxx network for EPICS channel broadcasts.

  3836   Mon Nov 1 14:53:30 2010 josephb, alex, rolfUpdateCDSAlex updated FB and mx_streams code

Problem:

The framebuilder was being flaky.  MX_streams would go down, prevent testpoints from working and so forth.

Solution:

Send Alex up North for a week to fix the code. 

Alex came back and installed updates to the frame builder and the mx_streams code (Myrinet Express over Generic Ethernet Hardware) used by the front ends to talk to the frame builder.  Instead of 1 stream per model, there's now just 1 per front end handling all communications.

Alex did an SVN update and we now have the latest CDS code.

Self restarting codes:

The frame builder code (daqd) and nds pipe have been added to the fb machine's inittab.  Specifically it calls a script called /opt/rtcds/caltech/c1/target/fb/start_daqd.inittab and /opt/rtcds/caltech/c1/target/fb/start_nds.inittab.

The addition to the /etc/inittab file on fb is:

daq:345:respawn:/opt/rtcds/caltech/c1/target/fb/start_daqd.inittab 

nds:345:respawn:/opt/rtcds/caltech/c1/target/fb/start_nds.inittab

When these codes die they should automatically restart.

Self starting codes at boot up:

The front ends now start the mx_stream script (which lives in /opt/rtcds/caltech/c1/target/fb/ directory) at boot up.  They call it with the approriate command line options for that front end. It can be found in the /etc/rc.local file.

They look like: mx_stream -s "c1x02 c1sus c1mcs c1rms" -d fb:0

As always, the front end codes to be started are defined in the /etc/rtsystab file (or on fb, in the /diskless/root/etc/rtsystab file).

However, if it does go down you would need to restart it manually, although it seems more robust now and doesn't seem to go down every time we restart the frame builder.

All the usual front end IOCs and modules should be started and loaded on boot up as well.

 

Current CDS status:

MC damp dataviewer diaggui AWG c1ioo c1sus c1iscex RFM Sim.Plant Frame builder  ...
                     ... 
  3837   Mon Nov 1 15:35:41 2010 josephbUpdateCDSFront end USR and CPU times now recorded by DAQ

Problem:

We have no record of how long the CPUs are taking to perform a cycle's worth of computation

Solution:

I added the following channels to the various slow DAQ configuration files in /opt/rtcds/caltech/c1/chans/daq/

IOO_SLOW.ini:[C1:FEC-34_USR_TIME]
IOO_SLOW.ini:[C1:FEC-34_CPU_METER]
IOP_SLOW.ini:[C1:FEC-20_USR_TIME]
IOP_SLOW.ini:[C1:FEC-20_CPU_METER]
IOP_SLOW.ini:[C1:FEC-33_USR_TIME]
IOP_SLOW.ini:[C1:FEC-33_CPU_METER]
MCS_SLOW.ini:[C1:FEC-36_USR_TIME]
MCS_SLOW.ini:[C1:FEC-36_CPU_METER]
RMS_SLOW.ini:[C1:FEC-37_USR_TIME]
RMS_SLOW.ini:[C1:FEC-37_CPU_METER]
SUS_SLOW.ini:[C1:FEC-21_USR_TIME]
SUS_SLOW.ini:[C1:FEC-21_CPU_METER]

 

Notes:

To restart the daqd code, simply kill the running process.  It should restart automatically.  If it appears not to have started, check the /opt/rtcds/caltech/c1/target/fb/restart.log file and the /opt/rtcds/caltech/c1/target/fb/logs/daqd.log.xxxx files.  If you made a mistake in the DAQ channels and its complaining, fix the error and then restart init on the fb machine by running "sudo /sbin/init q"

  3840   Mon Nov 1 17:27:47 2010 JenneUpdateSUSPRM ready for installation into chamber

[Jenne, Suresh]

Over the weekend, Bob and Daphen gave the PRM a 48hr. vacuum bake.  This afternoon Suresh and I placed it back in the wire in the tower.  We used the microscope-on-translation-stage technique to make sure the scribe lines on each side of the optic are at the same height, and then secured the PRM using all of the EQ stops.  It is wrapped in foil, and ready for its journey into the IFO room.  When we next have the BS chamber open, we should put the PRM in, and move the current PRM to its final place on the ITMY table as the SRM.

  3842   Mon Nov 1 23:31:05 2010 yutaUpdateCDSchecked input hardware filter in single frequency

Background:
  For input filter, we have analog whitening filter and also digital whitening filter. They have the same TF and when analog one is off, digital one should be on and vice versa.
  I made a python script that checks the switching automatically.

Method:
  Excite the suspension in a single frequency and see sensor inputs(XXSEN_IN1).
  Calculate the magnitude in the excitation frequency and compare it when digital whitening is off and on.
  When digital whitening is off, analog should be on, so sensor inputs should gone though the analog filter. That means the signal is multiplied by the TF of that filter, which makes the difference.

  We currently don't have excitation and I thought I have to wait, but instead of putting some extra excitation, I found that 60Hz line noise is useful.

Script:
  The script is /cvs/cds/caltech/users/yuta/scripts/WDWchecker.py
  For every sensor input, it;
    0. Stores current filter switching(XXSEN_SW1R)
    1. turns OFF the digital filter(FM1, using ezcaswitch)
    2. tdsdmd XXSEN_IN1 in 60Hz
    3. turns ON the digital filter
    4. tdsdmd XXSEN_IN1 in 60Hz
    5. divides mag(2.) by mag(4.) and calculate the analog filter gain in 60Hz
    6. Restores the filter switching in the state before the checking

Result:
  The results are;

C1:SUS-BS_ULSEN_IN1: 22.2 dB
C1:SUS-BS_URSEN_IN1: 18.7 dB
C1:SUS-BS_LRSEN_IN1: 22.7 dB
C1:SUS-BS_LLSEN_IN1: 16.0 dB
C1:SUS-BS_SDSEN_IN1: 21.5 dB
C1:SUS-ITMX_ULSEN_IN1: 16.9 dB
C1:SUS-ITMX_URSEN_IN1: 16.3 dB
C1:SUS-ITMX_LRSEN_IN1: 17.5 dB
C1:SUS-ITMX_LLSEN_IN1: 17.1 dB
C1:SUS-ITMX_SDSEN_IN1: 6.2 dB
C1:SUS-ITMY_ULSEN_IN1: 15.5 dB
C1:SUS-ITMY_URSEN_IN1: 16.5 dB
C1:SUS-ITMY_LRSEN_IN1: 17.4 dB
C1:SUS-ITMY_LLSEN_IN1: 16.3 dB
C1:SUS-ITMY_SDSEN_IN1: 18.0 dB
C1:SUS-PRM_ULSEN_IN1: 0.1 dB
C1:SUS-PRM_URSEN_IN1: 10.3 dB
C1:SUS-PRM_LRSEN_IN1: 13.1 dB
C1:SUS-PRM_LLSEN_IN1: -32.3 dB
C1:SUS-PRM_SDSEN_IN1: 14.6 dB
C1:SUS-SRM_ULSEN_IN1: 17.3 dB
C1:SUS-SRM_URSEN_IN1: 13.5 dB
C1:SUS-SRM_LRSEN_IN1: 1.6 dB
C1:SUS-SRM_LLSEN_IN1: 16.7 dB
C1:SUS-SRM_SDSEN_IN1: 18.3 dB

C1:SUS-MC1_ULSEN_IN1: 17.0 dB
C1:SUS-MC1_URSEN_IN1: 18.6 dB
C1:SUS-MC1_LRSEN_IN1: 14.9 dB
C1:SUS-MC1_LLSEN_IN1: 27.0 dB
C1:SUS-MC1_SDSEN_IN1: 16.6 dB
C1:SUS-MC2_ULSEN_IN1: 19.8 dB
C1:SUS-MC2_URSEN_IN1: 14.0 dB
C1:SUS-MC2_LRSEN_IN1: 20.8 dB
C1:SUS-MC2_LLSEN_IN1: 16.1 dB
C1:SUS-MC2_SDSEN_IN1: 17.3 dB
C1:SUS-MC3_ULSEN_IN1: 15.5 dB
C1:SUS-MC3_URSEN_IN1: 17.3 dB
C1:SUS-MC3_LRSEN_IN1: 18.2 dB
C1:SUS-MC3_LLSEN_IN1: 18.7 dB
C1:SUS-MC3_SDSEN_IN1: 16.8 dB


  Whitening filter has 18dB gain at 60Hz. (It's 3Hz pole, 30Hz zero, 100Hz zero and 0dB at DC)
  So, from the result, at least MC suspensions look like they have correct switching.
  But some channels doesn't look ok.
  We have to check those.

Plan:
   - check ITMX_SDSEN, PRM_ULSEN, PRM_LLSEN, SRM_LRSEN input filters
   - check the script and see if the script can really check. maybe the script needs some adjustments (# of averaging, multiple frequency, ......)
   - make AWG(, tdssine) work
   - check output hardware filter

By the way:
  fb is back. I don't know why. With help from Joe, I just compiled c1mcs again and again changing number of RFM channels.

  3844   Tue Nov 2 11:34:53 2010 josephb, alexUpdateCDSdiagconfd running, excitations back in dtt

Problem:

Diagnostic test tools was starting with errors.

Cause:

After the reboot of the frame builder machine yesterday by Alex, the diagconfd daemon was not getting started by xinetd.  There was a sequence error in the startup where xinetd was being called before mounting drives from linux1.

Important Note:

If you do not see the "nds" line you would not have diagnostic tests enabled in the DTT:

[controls@rosalba apps]$ diag -i | grep nds
nds * * 192.168.113.202 8088 * 192.168.113.202

Solution:

Alex changed /etc/xinetd.d/diagconfd file to point to /opt/apps/gds/bin/diagconfd instead of /opt/apps/bin/diagconf.  He also ensured xinetd started after mounting from linux1.

Alex's Suggestion:
My feeling is we should get rid of this feature and have an NDS address
entry box in the "Online" tab in the DTT with the default "nds". I
mentioned this to Jim Batch and he greed with me, so maybe he is going to
implement this. So maybe you guys want to request the same thing too, send
the request to Rolf and Jim, so we can have the last demon exercised.

  3845   Tue Nov 2 13:51:40 2010 josephb, yutaUpdateCDSRFM slowdown problem

Problem:

Each RFM memory location which needs to be read by a front end model slows the model significantly.

With no RFM memory locations to be read (replaced with grounds), the c1mcs model runs around 25 microseconds per cycle.

With 1 RFM memory location (MC_L), it runs around 29-33 microseconds.

With 3 RFM memory locations (MC_L, MC1_PIT, MC1_YAW), it runs around 45 microseconds.

With 7 RFM memory locations, the code generally doesn't run at all, going past the 62 microsecond maximum required to be able to keep up with the 16 kHz sample rate.

Last night Yuta somehow got it running with 7 RFM memory locations, but in that case, all the odd numbered RFM channels (1,3,5 as counted by the ipc file) did not work.  It was running at around 55 microseconds in that case.

The c1ioo code which is writing the data to the RFM card is experiencing no such slow down.

Current CDS status:

MC damp dataviewer diaggui AWG c1ioo c1sus c1iscex RFM Sim.Plant Frame builder  ...
                     ... 
  3846   Tue Nov 2 15:24:18 2010 josephbUpdateCDSc1ioo and c1mcs only sending MC_L, MC1_PIT, MC1_YAW

In order to have the c1mcs model run, we're running with only 3 RFM channels between c1ioo and c1mcs at the moment.  This leaves the model at around 45 microseconds, and at least lets us damp.

Alex and I still need to track down why the RFM read calls are taking so much time to execute.

  3847   Tue Nov 2 16:24:07 2010 KojiUpdateAuxiliary lockingAlignment for the green in the X trans table

[Kiwamu Koji]

Today we found the green beam from the end was totally missing at the vertex.

- What we found was very weak green beam at the end. Unhappy.

- We removed the PBS. We should obtain the beam for the fiber from the rejection of the (sort of) dichroic separator although the given space is not large.

- The temperature controller was off. We turned it on again.

- We found everything was still misaligned. Aligned the crystal, aligned the Faraday for the green.

- Aligned the last two steering mirrors such that we hit the approximate center of the ETMX and the center of the ITMX.

- Made the fine alignment to have the green beam at the PSL table.

The green beam emerged from the chamber looks not so round as there is a clipping at an in-vac steering.
We will make the thorough realignment before closing the tank.

  3853   Wed Nov 3 15:13:55 2010 josephbUpdateCDSTemporary RFM slow read work around

Problem:

Each RFM read in the c1mcs model is adding ~7 microseconds to the cycle time.  Adding too many pushes it over the 62 microsecond limit.

RFM writes do not have this problem.

Temporary Solution:

The fastest fix was to create a new front end model, called c1rfm, which does nothing but read in the MC1, MC2, MC3 PIT and YAW signals from the c1ioo machine, and then passes them along to the c1mcs model via shared memory, which is fast.

This means the data being sent is 2 cycles slow, one to go over the RFM, and one to go over shared memory.  It is running at 16384 cycles/second, so it shouldn't have much impact at the frequencies we use those channels for.

MC_L is still being sent directly to the c1mcs front end code via RFM.

Current Status:

The c1mcs model is running at  30-33 microseconds for CPU time.

The c1rfm model is running at 45-47 microseconds for CPU time.

All 7 channels, MC_L, MC1_PIT, MC1_YAW, MC2_PIT, MC2_YAW, MC3_PIT, MC3_YAW are responding.

The c1rfm model was added to the /diskless/root/etc/rtsystab file on the fb machine so that it automatically starts on the reboot of c1sus.

The USR and CPU time channels for c1rfm were added to the MCS_SLOW.ini file in /opt/rtcds/caltech/c1/chans/daq/ so that the framebuilder records them, namely:

[C1:FEC-38_USR_TIME]
[C1:FEC-38_CPU_METER]

The framebuilder was restarted to take these new channels into account.

Future:

Finish implementing and debugging the "round robin" RFM reader so as to not require a seperate model to be doing RFM reads in parallel.

Look into improving read speed by either merging timestamps and data into a single  or reading time stamp once every tenth or hundreth cycle, although this at best provides a factor of 2 improvement.

Check to see if RFM card being on the IO chassis or directly in the computer chassis makes a difference.

Get Alex and Rolf to improve RFM read speed.

  3854   Wed Nov 3 16:49:31 2010 steveUpdateGeneralstorage cabinet is in place

The south end of IFO room 104 was reshuffled. The flow bench was moved all the way to the south end to create more room for the crane reach. The old  large drawing cabinet  was moved under the vacuum tube.

The new clear view through  Acrylic-plexyglass cabinet is anchored. It has powder finished coating so it will not out-gas too much.The back side shelf mounting holes are sealed off with kapton tape. The doors still needs some gaskit seals.

Attachment 1: P1070018.JPG
P1070018.JPG
  3856   Wed Nov 3 19:14:00 2010 ranaUpdatePSLPMC mode matching update

I moved the lens just before the PMC to check the mode matching landscape. The PMC trans went up from ~6.5 to ~6.8. That's 5% with ~1 hour of work.

As per the micrometer, this took ~7-8 mm of travel. Since there's so much power left in the HOMs, we we we will have to do a proper mode scan and re-calculate the solution.

The measured transmission is now ~610 mW. The power reflected from the PMC with it unlocked is ~1400 mW.

  3857   Wed Nov 3 21:19:40 2010 yutaUpdateCDSput LOCKIN to c1ioo model and checked

(Joe, Yuta)

Summary:
  LOCKIN(consists of oscillator and demodulator) is needed for A2L measurement.
  So, we put LOCKIN to c1ioo model, whose outputs goes to c1mcs ASC.
  After that, I checked the functionality of LOCKIN by directly connecting DAC output for a coil to ADC input for MCL with BNC cable.

What we did:
[Putting LOCKING to c1ioo model]
1. Copied Simulink LOCKIN stuff(cdsOsc, Product, cdsPhase ...) from /cvs/cds/caltech/cds/rward-advLigo/src/epics/simLink/omc.mdl and put it into c1ioo model.

2. Copied MEDM screen file /cvs/cds/caltech/medm/c1/omc/C1OMC_LSC_LOCKIN.adl and modified it for our use.

[Checking LOCKIN]
3. Disconnected MC2_ULCOIL input to SOS Coil driver at 1X4-1-6A and checked the signal from software oscillator at c1ioo is coming.

4. Disconnected the cable labeled "MC OUT1" at 1X2 (which is MCL signal to ADC) and put MC2_ULCOIL output directly using long BNC cable.

5. Checked the functionality of LOCKIN by StripTool.
   The cable wiring did not conflict with my expectation.
   Software mixer is working.(frequency is doubled. X_SIN has offset and X_COS doesn't)

6. Put the cables back.

Result:

  Thanks to c1rfm, c1ioo and c1sus are talking without ADC timeout.
  Also, LOCKIN is working fine.

Attachment 1: Screenshot_C1IOO_LOCKIN.png
Screenshot_C1IOO_LOCKIN.png
  3858   Wed Nov 3 23:58:45 2010 ranaUpdateElectronicsCougars

I looked at this web page: http://www.teledyne-cougar.com/Index.asp for the RF company that Rich has recently started using.

There are ~15 amplifiers that they sell which have a NF < 2 dB and work in the 10-100 MHz band. We should call them to find out if they will package some amps for us or at least sell us a few with eval. boards so that we can make our own.

  3859   Thu Nov 4 03:13:46 2010 SureshUpdateLockingFibre coupling 1064nm light at the south-end table

[Kiwamu, Suresh]

We decided to use the 1064nm beam reflected from the Y1-1037-45-P mirror after the collimation lens following the doubling crystal for coupling into the optical fiber (ref 3843 and 3847 ).

We replaced a beam dump which was blocking this beam with a Y1-1037-45-P mirror and directed the beam into the fiber coupler with another Y1-1037-45-P.  The power in this beam was about 1W.  This has been stepped down to 10mW by introducing a reflective ND filter of OD=2.  The reflected power has been dumped into a blade-stack beam dump.

Steve has ordered the The Visual Fault Locator from Fluke.  It is expected to arrive within a day or two.

 

 

  3860   Thu Nov 4 15:15:43 2010 josephbUpdateCDSModified feCodeGen.pl, fmseq.pl, and suspension screens

Feature Requested:

Have the CPU_meter change change color at various alarm levels.  These alarm levels have been set at 2/3 maximum for Minor alarm (yellow) and 9/10 maximum for Major alarm (red).

Implementation:

Rather than hand code each EPICS .db file to add the alarm files each time we rebuild the front ends, I decided to modify it at the source (since it strikes me as a generally useful alarm level for all front end codes).

First, I modified the feCodeGen.pl script.

I changed

print EPICS "OUTVARIABLE FEC\_$dcuId\_CPU_METER epicsOutput.cpuMeter int ai 0 field(HOPR,\"$rate\") field(LOPR,\"0\")\n";

to

print EPICS "OUTVARIABLE FEC\_$dcuId\_CPU_METER epicsOutput.cpuMeter int ai 0 field(HOPR,\"$rate\") field(LOPR,\"0\") field(HIGH,\"$two_thirds_rate\") field(HSV,\"MINOR\") field(HIHI,\"$     nine_tenths_rate\") field(HHSV,\"MAJOR\")\n";

I added the following two lines just before it as well:

$two_thirds_rate = int($rate * 2 / 3);

$nine_tenths_rate = int($rate * 9 / 10);

However, only the first four fields were actually added to the database file.  Apparently fmseq.pl, which populated the database, was hard coded to only handle up to 4 fields.

I modified the fmseq.pl script in /opt/rtcds/caltech/c1/core/advLigoRTS/src/epics/util/ so as to be able to handle up to 6 field values when writing EPICS .db files.

This change was accomplished by simply changing the following line

($junk, $v_name, $v_var, $v_type, $ve_type, $v_init, $v_efield1, $v_efield2, $v_efield3, $v_efield4 ) = split(/\s+/, $_);

to 

($junk, $v_name, $v_var, $v_type, $ve_type, $v_init, $v_efield1, $v_efield2, $v_efield3, $v_efield4, $v_efield5, $v_efield6 ) = split(/\s+/, $_);

everywhere it occurred.  There were something like 10 instances of it. Also, I added the two lines

        $vardb .= "    $v_efield5\n";
        $vardb .= "    $v_efield6\n";

after each set of

         $vardb .= "    $v_efield1\n";
         $vardb .= "    $v_efield2\n";
         $vardb .= "    $v_efield3\n";
         $vardb .= "    $v_efield4\n";

Lastly, I modified the CPU_METER bar graph on the C1SUS_DEFAULTNAME.adl screen (located in /opt/rtcds/caltech/c1/medm/master/) to use alarm levels, and then ran generate_master_screens.py.

 

  3861   Thu Nov 4 15:27:33 2010 josephb, yutaUpdateCDSc1ioo test points not working

Problem:

We can't access any of the c1ioo computer testpoints.  Dataviewer and DTT both fail to read any data from them.

According to diag -l (when run on Rosalba in /opt/apps), the testpoints are not being set.  Also at some point during the day when debugging, we also somehow messed up all the front end connections to the framebuilder.

Errors reported by dataviewer:

Server error 13: no data found
datasrv: DataWriteRealtime failed: daq_send: Illegal seek
Server error 12: no such net-writer
Server error 13: no data found
datasrv: DataWriteRealtime failed: daq_send: Illegal seek
Server error 12: no such net-writer
read(); errno=0
Server error 6532: invalid channel name
Server error 16080: unknown error
datasrv: DataWriteRealtime failed: daq_send: Illegal seek

Error reported by daqd.log:

[Thu Nov  4 13:29:35 2010] About to request `C1:IOO-MC1_PIT_IN1' 10022
on node 34
[Thu Nov  4 13:29:35 2010] Requesting 1 testpoints; tp[0]=10022; tp[1]=32531

[Thu Nov  4 13:29:35 2010] About to request `C1:SUS-MC2_SUSPOS_IN1'
10094 on node 36
[Thu Nov  4 13:29:35 2010] Requesting 1 testpoints; tp[0]=10094; tp[1]=32531

[Thu Nov  4 13:29:38 2010] ETIMEDOUT: test point `C1:IOO-MC1_PIT_IN1'
(tp_num=10022) was not set by the test point manager; request failed
[Thu Nov  4 13:29:38 2010] About to clear `C1:IOO-MC1_PIT_IN1' 10022 on node 34

Attempted Fixes:

Remove all daq related files: /opt/rtcds/caltech/c1/target/gds/param/tpchn_c1ioo.par and /opt/rtcds/caltech/c1/chans/daq/C1IOO.ini.  Rebuilt the front end code.

Double checked ethernet connection between c1ioo and the daq router and fb. 

Confirmed open mx was running on c1ioo. Confirmed awgtpman was running (although at one point I did find duplicate awgtpman running for c1x03, the IOP associated with c1ioo).

Rebooted the c1ioo machine. Confirmed all necessary codes came back.

Restarted the daqd process several times on the fb machine.

Current Status:

Framebuilder is running, and c1sus testpoints are available.  c1ioo test points are not.  Waiting to hear back from Alex on possible ideas.

  3862   Thu Nov 4 17:24:49 2010 steveUpdateGeneralconflat flanges for MIT

8 pieces of 10" CF blanks were shipped to MIT

Attachment 1: P1070020.JPG
P1070020.JPG
  3863   Thu Nov 4 17:53:29 2010 yutaUpdateCDSprimitive python script for A2L measurement

Summary:
  I wrote a python script for A2L measurement.
 Currently it is really primitive, but I tested the basic functionality of the script.

 We already have A2L script(at /cvs/cds/rtcds/caltech/c1/scripts/A2L) that uses ezlockin, but python is more stable and easy to read.

A2L measurement method:
  1. Dither a optic using software oscillator in LOCKIN and demodulate the length signal by that frequency.
  2. Change coil output gains to change the pivot of the dithering and do step 1.
  3. Coil output gain set that gives the smallest demodulated magnitude tells you where the current beam spot is.

  Say you are dithering the optic in PIT and changing the coil gains keeping UL=UR and LL=LL.
  If the coil gain set UL=UR=1.01, LL=LR=-0.99 gives you demodulated magnitude 0, that means the current beam spot is 1% upper than the center, compared to 1/2 of UL-LL length.
  You do the same thing for YAW to find horizontal position of the beam.

Description of the script:
  Currently, the script lives at /cvs/cds/caltech/users/yuta/scripts/A2L.py
  If you run;
     ./A2L.py MC1 PIT
  it gives you vertical position of the beam at MC1.

  It changes the TO_COIL matrix gain by "DELTAGAINS", turns on the oscillator, and get X_SIN, X_COS from C1IOO_LOCKIN.
  Plots DELTAGAINS vs X_SIN/X_COS and fit them by y=a+bx+cx^2.(Ideally, c=0)
  Rotates (X_SIN, X_COS) vectors to get I-phase and Q-phase.
    (I,Q)=R*(X_SIN,X_COS)
  Rotation angle is given by;
    rot=arctan(b(X_COS)/b(X_SIN))
  which gives Q 0 slope(Ideally, Q=0).
  x-intercept of DELTAGAINS vs I plot gives the beam position.

Checking the script:
  1. I used the same setup when I checked LOCKIN(see elog #3857). C1:SUS-MC2_ULCOIL output goes directly to C1:IOO-LOCKIN_SIG input.

  2. Set oscillator frequency to 18.13Hz, put 18.13Hz band-pass filter to C1:IOO-LOCKIN_SIG filter module, and put 1Hz low-pass filter to C1:IOO-LOCKIN_X_SIN/X_COS filter modules.
        Drive frequency 18.13Hz is same as the previous script(/cvs/cds/rtcds/caltech/c1/scripts/A2L/A2L_MC2).

  3. Ran the script. Checked that Q~0 and rot=-35deg.

  4. Put phase shifting filter to C1:IOO-LOCKIN_SIG filter module and checked Q~0 and rotation angle.
     fitler rot(deg)
     w/o    -35
     +90deg  45
     -90deg  56
     -45deg -80

  5. Put some noise in C1:SUS-MC2_ULCOIL by adding SUSPOS feedback signal and ran the script.(Attachment #1)
      During the measurement, the damping servo was off, so SUSPOS feedback signal can be treated as noise.

Conclusion:
  The result from the test measurement seems reasonable.
  I think I can apply it to the real measurement, if MCL signal is not so noisy.[status: yellow]

Plan:
  - add calculating coherence procedure, averaging procedure to the script
  - add setting checking procedure to the script
  - apply it to real A2L measurement

Bay the way:
  Computers in the control room is being so slow (rossa, allegra, op440m, rosalba). I don't know why.

Attachment 1: a2ltest.png
a2ltest.png
  3864   Thu Nov 4 17:57:27 2010 steveUpdateGeneralBeamScanner is working again

Koji, Suresh and Steve,

The beam scanner is back from repair.  Koji and Suresh helped to move the I/O address jumpers on the interface card from default position  300 to 320

It is working again.

Attachment 1: P1070024.JPG
P1070024.JPG
  3865   Thu Nov 4 19:00:57 2010 SureshUpdateLockingFibre coupling 1064nm light at the south-end table

The Fluke Visual Fault locator (Visifault) arrived and I used it to couple 1064nm light into the single mode fibre at the south-end-table.

Procedure used:

When the output end of the fiber is plugged into the Visifault the light emerges from at the south end (input side for 1064nm).  This light is collimated with the fiber coupler at that end and serves as a reference for the optical axis along which the 1064 light must be directed.  Once the two beams (red and 1064) are overlapped with the beam steering mirrors, the Visifault was disconnected from the fiber and the  fibre output ( 1064 at the PSL table) is maximized by walking the beam at the input end and adjusting the collimation at the input.

The output of the fiber has been collimated with a fiber coupler.

7.5mW are incident on the input end and 1.3mW have been measured at the output.    This output power is adequate for the observing the beats with PSL NPRO.

 

 

 

  3866   Thu Nov 4 19:26:51 2010 SureshUpdateLockingChanges to the Video MUX reversed

All the temporary changes to the video cables and the video MUX ( 3843 ) have been reversed and the system returned to its original state.

  3867   Fri Nov 5 09:08:14 2010 steveUpdateSUSepoxy

Physical Electronics: Vac-Seal #288-6000 arriving Monday. Our last bag used last week had a p/n 1002003 with expiration date   .....2009 ? and it was stored in the

refrigerator all times. We are getting 68 small bags.

We should have precision gluing notes of epoxies/procedures used on our sus upgrade.

Attachment 1: 11081001.PDF
11081001.PDF
  3868   Fri Nov 5 14:06:19 2010 yutaUpdateIOOtried to align MC by A2L measurement

(Suresh, Kiwamu, Yuta)

Summary:
  Lastnight, we locked the MC and tried angle to length(A2L) measurement using my new python script (see elog #3863).
  Although the amount of position script shows looks too big, the response seemed somewhat reasonable.
  Using the results of A2L measurement, we managed to reduce the displacement from the center of the MC optics, but we lost TEM00 mode after changing the incident beam direction and PMC lock got off .
  We restored the alignments and now it is 00, but the displacements got worse than the best we achieved last night.

  I think I have to rethink how to align MC. Even if I could somehow get exact position of the beam, how to align the beam to the center of the optics?

What we did:
  1. At first we tried to align by changing the direction of the incident beam. We found that A2L.py shows opposite direction(lower <-> upper). It was because of my misunderstanding and we agreed that the direction is opposite.

  2. Aligned MC optics without changing the direction of the incident beam. We could understand which directions decrease the displacements from the center, and managed to decrease them.

  3. There seemed to be a limit in aligning the MC optics without changing the incident beam direction. So, we started to change the incident beam direction again by steering mirrors at PSL table.

  4. During the change, PMC lock got off. We restored it, but we lost MC's 00 mode.

  5. We restored MC 00 mode, and measured the final A2L. The result was worse than we achieved by step #2.

Result:
  The final result from last night using my script was as follows;

  MC1 MC2 MC3
vertical 36% -19% 19%
horizontal 49% 6% -37%

  % is the length compared to the half of coil to coil length. Low / right are positive.
  We can see the beam position got better by looking at the monitor from MC2, and the A2L measurement result agrees with that.

  Here's some pictures from the measurement last night. Each plots are not taken at the same time.
A2LmeasurementFigures.png
   (It was painful using slow computers to make measurement. The StripTool graph shows straight lines when computers got frozen)

Plan:
 - Plan a strategy
 - The script needs self-estimation of the measurement. Now, the script fits the plot assuming every data has the same error.
 - When the beam is near the center, the signal gets smaller and the result will be unreliable. One thing I can do is to change TO_COIL gains radically so that the axis of rotation go far from the center.

  3870   Fri Nov 5 16:40:22 2010 josephb, alexUpdateCDSc1ioo now has working awgtpman

Problem:

We couldn't set testpoints on the c1ioo machine.

Cause:

Awgtpman was getting into some strange race condition.  Alex added an additional sleep statement and shifted boot order slightly in the rc.local file.  This apparently is only a problem on c1ioo, which is a Sun X4600.  It was using up 100% of a single CPU for the awgtpman process.

Status:

We now have c1ioo test points working.

Future:

Need to examine the startc1ioo script and see if needs a similar modification, as that was tried at several points but yielded a similar state of non-functioning test points. For the moment, reboot of c1ioo is probably the best choice after making modifications to the c1ioo or c1x03 models.

Current CDS status:

MC damp dataviewer diaggui AWG c1ioo c1sus c1iscex RFM Sim.Plant Frame builder  TDS
                     
  3871   Fri Nov 5 19:33:18 2010 JenneUpdateElectronicsThe beginnings of the new phase of the RF work

Joon Ho and I took a look at the RF stuff that Alberto left, and we determined that we've got most everything that we need.  On Monday, Joon Ho will list off the stuff that we're missing, and we'll have Steve order it.

Joon Ho also replaced the temporary front panel to the RF generation box with Alberto's fancy new panel.  Pics are here (although you have to sign in as foteee to see them). 

Work on the frequency distribution box will continue on Monday.

  3874   Sat Nov 6 00:49:04 2010 KojiUpdateIOOIMC table work

[Suresh, Koji]

- Removed MCT optics in the IMC chamber

- Rotated MC1 and MC3 in clock-wise to debias the YAW bias offsets (-5V and -8V to -1.5V and -0.5V).

- Adjusted insertion of the MC1 OSEMs so as to have the outputs of about 1.0V.

- Locked to TEM00. Trying to get the beams at the center of the mirror using Yuta's A2L.

  3878   Mon Nov 8 10:37:14 2010 KojiUpdateIOOThe 10% pick-off for MCREFL was replaced to a HR mirror

As MC2 Trans mon QPD is temporary removed for fixing, we needed a reference for the MC alignment.

I replaced the 10% pick-off in the MCREFL path to the HR mirror.
Now the MCREFL DC with MC unlock is ~2.2, while it is ~0.29 in lock.
i.e. The visibility is 87%.

This means that the MCWFS were disabled for the moment.

  3879   Mon Nov 8 10:48:58 2010 kiwamuUpdateGreen Locking80MHz VCO : PLL open loop looks good

I measured the open loop transfer function of the 80MHz VCO's PLL while locking it to Marconi.

 This measurement is for a health check and a characterization of the PLL

The transfer function looks good, it agrees with the designed filter shape.

 


(measurement setup) 

vco_pll.png

 The frequency of Marconi is set to 79.5MHz which is the center frequency of the VCO.

The signal from Marconi is mixed down with the VCO signal at a mixer ZLW-3SH.

Then the demodulated signal goes to a 80MHz LPF to cut off high frequency components.

And it goes through a control filter which has 1Hz pole and 40Hz zero (see this entry).

The 80MHz LPF, the controls filter, the VCO and the RF amplifier are all built in the box.

 

 In order to measure the open loop transfer function I inserted SR560 before the 80MHz LPF.

Using T-splitters the input and the output of SR560 are connected to a spectrum analyzer SR785.

 

(results)

 VCO_PLL.png

 Exciting the system using a source channel of SR785, I measured the open loop transfer function.

The unity gain frequency was measured to about 20 kHz.

It agrees with the designed filter shape (though the gain factor is a little bit underestimated).

Apparently there is a phase delay at high frequency above 10kHz, but it is okay because the phase margin is quite acceptable up to 100kHz.

 

However I found that the control range was quite narrow.

The PLL was able to be kept in only +/- 1MHz range, this fact was confirmed by shifting the frequency of Marconi during it's locked.

I will post another elog entry about this issue.

 


 (notes)

 Marconi power = 6dBm

 VCO power after RF amp. = -0.6 dBm

 Marconi frequency = 79.5 MHz

 Phase detection coefficient = 0.4 V/rad (measured by using an oscillo scope)

 

  3880   Mon Nov 8 14:30:15 2010 josephb, yutaUpdateCDSAdded LIGONDSIP setting to cshrc.40m

We added the following line to the cshrc.40m file in the 64-bit linux and 32-bit linux sections:

setenv LIGONDSIP fb

This allows codes like tdsdmd to work properly on the linux machines (seemed to already work fine on the solaris op440m without this change).

  3881   Mon Nov 8 16:03:46 2010 kiwamuUpdateGreen Locking80MHz VCO : PLL open loop looks good

Quote:

I measured the open loop transfer function of the 80MHz VCO's PLL while locking it to Marconi.

 

Bad; there should be a passive ~1 MHz LP filter between the mixer and anything that comes after. The SR560 + mixer does not equal a demodulator.

  3882   Mon Nov 8 18:30:33 2010 SureshUpdateIOOMC Trans Mon QPD gain increased by 50x

Increased the transimpedance gain of the MC-Trans-Mon QPD ckt

The gain of this QPD was insufficient to see the light transmitted through the MC2.  The resulting voltage output was about  10 steps of the 16-bit ADC card.  As the input power, which is currently held at about 40mW may be increased to the vicinity of 2W (total output of the NPRO) we would have 500 ADC steps.  But the dynamic range of the ADC is 64k and  increasing the gain of this QPD ckt by a factor of 50 would enable us to utilise this dynamic range effectively.  However as we do not need a response faster than 10Hz from this ckt its response time has been limited by increasing the feedback capacitance value.

The ckt diagram for the QPD ckt is D980325-Rev-C1  .  The particular unit we are dealing with has the Serial No. 110.  The resistors R1, R2, R3, R4 are now 499 kOhm.  As per the guidelines in the ckt diagram, we increased the capacitance values C3,C4,C5,C6 to 2.2 nFThe current cut off frequency for the MC-Trans-Mon is 145 Hz (computed).

Initially, while reassembling the QPD unit, the IDC 16 connector to the ckt board was reversed by mistake and resulted in the OP497 chip over-heating.  Consequently one of the opamps on the chip was damaged and showed monotonously increasing ouput voltage.  Todd Etzel gave us a spare OP497 and I replaced the damaged chip with this new one. The chips are also available from  Newark Stock No. 19M8991 . The connector has been marked to indicate the correct orientation. The ckt was checked by temporarily connecting it in the place of the PRM Optical lever QPD.  It worked fine and has been put back in its place at the MC2 Transmission.  The QPD was wiped with a lens tissue+Methanol  to remove dust and finger prints from its surface.

It may need to be repositioned since the beam would have shifted under the MC realignment procedure.

 

 

 

  3888   Wed Nov 10 22:29:42 2010 kiwamuUpdateIOOmisaligned the wideband EOM

For Yuta's business, I intentionally misaligned the wideband EOM slightly to Yaw direction.  Good luck.

It should show a big AM component at photo detectors.

I touched only the top right knob on the EOM mount and tweaked it by exactly  2 turns in counterclockwise direction.

  3889   Thu Nov 11 01:34:27 2010 JenneUpdateSUSNew-Old ETM towers assembled

[Suresh, Jenne]

We have put together the new-old ETM towers.  These are the ones which were hanging out on the flow bench down the arm for years and years, and have recently been re-baked.  Interestingly, these are predominantly steel, whereas the newer ones are mostly aluminum.  This caused momentary drama while we scrounged for the correct screws (we needed more silver-plated screws than anticipated, since we were screwing into steel and not aluminum), however the miscellaneous clean hardware collection came to the rescue.  We did however use up all of the 1/4-20 3/4" silver plated screws, so hopefully no one else needs more later...

We only found 5 (enough for one of the two towers) spring plungers which are used to hold the OSEMs in place.  Suresh is sending an email to Steve to ask him to buy some more, so we can get them cleaned in time for use.  This is important, but not super urgent, since we have ~ 2 weeks before the ETMs will be ready for installation. 

Koji has not yet had a chance to inspect the ETM data sheets and choose for us which pair of ETMs to use (ATF sent the 4 ETMs in matched pairs).  So we will not begin the "arts and crafts" until tomorrow-ish.

  3890   Thu Nov 11 02:17:27 2010 KevinUpdateElectronicsREFL11 Photodiode Not Working

[Koji and Kevin]

I was trying to characterize the REFL11 photodiode by shining a flashlight on the photodiode and measuring the DC voltage with an oscilloscope and the RF voltage with a spectrum analyzer. At first, I had the photodiode voltage supplied incorrectly with 15V between the +15 and -15 terminals. After correcting this error, and checking that the power was supplied correctly to the board, no voltage could be seen when light was incident on the photodiode.

We looked at the REFL55 photodiode and could see ~200 mV of DC voltage when shining a light on it but could not see any signal at 55 MHz. If the value of 50 ohm DC transimpedance is correct, this should be enough to see an RF signal. Tomorrow, we will look into fixing the REFL11 photodiode.

  3893   Thu Nov 11 07:26:03 2010 AlbertoUpdateElectronicsREFL11 Photodiode Not Working

Quote:

[Koji and Kevin]

I was trying to characterize the REFL11 photodiode by shining a flashlight on the photodiode and measuring the DC voltage with an oscilloscope and the RF voltage with a spectrum analyzer. At first, I had the photodiode voltage supplied incorrectly with 15V between the +15 and -15 terminals. After correcting this error, and checking that the power was supplied correctly to the board, no voltage could be seen when light was incident on the photodiode.

We looked at the REFL55 photodiode and could see ~200 mV of DC voltage when shining a light on it but could not see any signal at 55 MHz. If the value of 50 ohm DC transimpedance is correct, this should be enough to see an RF signal. Tomorrow, we will look into fixing the REFL11 photodiode.

I just wanted to remind you that the most up to date resource about the RF system upgrade, including photodiodes, is the SVN.

https://nodus.ligo.caltech.edu:30889/svn/trunk/alberto/40mUpgrade/RFsystem/

There you can find everything: measurements, schematics, matlab scripts to plot and fit, etc. Poke around it to find what you need.
For instance, the schematic of the modified REFL11 photodiode is at:

https://nodus.ligo.caltech.edu:30889/svn/trunk/alberto/40mUpgrade/RFsystem/RFPDs/REFL11/REFL11Schematics/40mUpgradeREFL11schematic.pdf

Because I was doing new things all the time, the wiki is not up to date. But the SVN has all I've got.

  3896   Thu Nov 11 13:54:05 2010 kiwamuUpdateGreen Locking80MHz VCO : about PLL hold-in range

The hold-in range of the PLL must be greater than +/- 4MHz in order to bring the arm cavity to its resonance. 

(Hold-in range is the range of frequencies over which the PLL can track the input signal.)

However as I mentioned in the past elog (see this entry), the PLL showed a small hold-in range of about +/- 1MHz which is insufficient.

In this entry I explain what is the limitation factor for the hold-in range and how to enlarge the range.

 


(Requirement for hold-in range )

 We have to track the frequency of the green beat signal and finally bring it to a certain frequency by controlling the cavity length of the arm.

For this purpose we must be able to track the beat signal at least over the frequency range of 2*FSR ~ +/- 4MHz.

Then we will be able to have more than two resonances, in which both the end green and the PSL green are able to resonate  to the arm at the same time. 

And if we have just two resonances in the range, either one of two resonances gives a resonance for both IR and green. At this phase we just bring it to that frequency while tracking it.

 

  Theoretically this requirement can be cleared by using our VCO because the VCO can drive the frequency up to approximately +/- 5MHz (see this entry)

 The figure below is an example of resonant condition of green and IR. The VCO range should contain at least one resonance for IR.

(In the plot L=38.4m is assumed)

 

 range_green.png

 

(an issue) 

However the measured hold-in range was about +/- 1MHz or less. This is obviously not large enough.

According to a textbook[1], this fact is easily understandable.

The hold-in range is actually limited by gains of all the components such as a phase detector's, a control filter's and a VCO's gain.

Finally it is going to be expressed by,

                         [hold-in range] = G_pd * G_filter * G_vco

PLL.png

 

 At the PD (Phase Detector which is a mixer in our case) the signal does not exceed G_pd [V] because it appears as G_pd * sin(phi).

When the input signal is at the edge of the hold-in range, the PD gives its maximum voltage of G_pd to maintain the lock.

Consequently the voltage G_pd [V] goes through to G_filter [V/V] and G_vco [Hz/V].

This chain results the maximum pushable frequency, that is, hold-in range given above equation.

In our case, the estimated hold-in range was 

                      [hold-in range] ~ 0.4 [V] * 3 [V/V] * 1 [MHz/V]

                          = 1.2 [MHz]

This number reasonably explains what I saw.

In order to enlarge the hold-in range, increase the gain by more than factor of 5. That's it.

* reference [1]  "Phase-Locked Loops 6th edition" Rolan E. Best

  3898   Thu Nov 11 17:47:36 2010 kiwamuUpdateGreen Locking80MHz VCO : improve PLL hold-in range and put a boost

In order to enlarge the hold-in range I modified the control filter and increased the gain by factor of 25 in the PLL.

It successfully enlarged the range, however the lock was easily broken by a small frequency change.

So I put a low frequency boost (LFB) and it successfully engaged the PLL stiffer.

Now it can maintain the lock even when the frequency disturbance of about 1MHz/s is applied.

 


(enlargement of the hold-in range)

I modified the control filter by replacing some resistors in the circuit to increase the gain by factor of 25.

        - R18 390 [Ohm]  => 200 [Ohm]

    - R20 1000 [Ohm] => 5000 [Ohm]

    - R41 39 [Ohm] => 10 [Ohm]

 This replacement also changes the location of the pole and the zero

    - pole 1.5 [Hz] => 0.3 [Hz]

    - zero 40 [Hz] => 159 [Hz]

 Note that this replacement doesn't so much change the UGF which was about 20 kHz before.

It becomes able to track the input frequency range of +/- 5MHz if I slowly changes the frequency of the input signal. 

However the PLL is not so strong enough to track ~ 1 kHz / 0.1s frequency step.  

 

(make the PLL stiffer : a low frequency boost)

One of the solution to make the PLL stiffer is to put a boost filter in the loop.

I used another channel to more drive the VCO at low frequency. See the figure below.

 vco_pll.png

The 80MHz VCO box originally has two input channels, one of these inputs was usually disabled by MAX333A.

This time I activated both two input channels and put the input signal to each of them.

Before signals go to the box, one of the signal path is filtered by SR560. The filter has G=20000, pole=0.3Hz. So it gives a big low frequency boost.

VCO_lfb.png

Once the PLL was achieved without the boost, I increased the filter gain of SR560 to 20000 because locking with the boost is difficult as usual.

 

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