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ID Date Author Type Category Subjectup
  12465   Thu Sep 1 19:59:22 2016 JohannesUpdateSUSIR mode flashes in Y arm

[Gautam, Lydia, Johannes]

  • After placing the irises on the ETMY and ITMY cages we found that the green beam pointing was off in YAW and corrected it to hit the center of ITMY
  • The green beam was well centered on ETMY to begin with, so we used it as a reference for the alignment of ITMY, sending it back through the ETMY iris
  • We used the green transmission to tune the pitch and yaw of ETMY
  • Using TT1 and TT2 we steered the beam IR through both irises and were hoping to see mode flashes in the IR arm transmission, which we did

The next step is the tip tilt fine alignment of the IR into the arm, using TRY, from which we removed the ND filter for the time being.

  12166   Fri Jun 10 12:09:01 2016 jamieConfigurationCDSIRIG-B debugging

Looks like we might have a problem with the IRIG-B output of the GPS receiver.

Rolf came over this morning to help debug the strange symmetricom driver behavior on fb1 with the new Spectracom card.  We restarted the machine againt and this time when we loaded the drive rit was clocking at a normal rate (second/second).  However, the overall GPS time was still wrong, showing a time in October from this year.

The IRIG-B122 output is supposed to encode the time of year via amplitude modulation of a 1kHz carrier.  The current time of year is:

controls@fb1:~ 0$ TZ=utc date +'%j day, %T'
162 day, 18:57:35
controls@fb1:~ 0$ 

The absolute year is not encoded, though, so the symmetricon driver has the year offset hard coded into the driver (yuck), to which it adds the time of year from the IRIG-B signal to get the correct GPS time.

However, loading the symmetricom module shows the following:

...
[ 1601.607403] Spectracom GPS card on bus 1; device 0
[ 1601.607408] TSYNC PIC BASE 0 address = fb500000
[ 1601.607429] Remapped 0xffffc90017012000
[ 1606.606164] TSYNC NOT receiving YEAR info, defaulting to by year patch
[ 1606.606168] date = 299 days 18:28:1161455320
[ 1606.606169] bcd time = 1161455320 sec  959 milliseconds 398 microseconds  959398630 nanosec
[ 1606.606171] Board sync = 1
[ 1606.616076] TSYNC NOT receiving YEAR info, defaulting to by year patch
[ 1606.616079] date = 299 days 18:28:1161455320
[ 1606.616080] bcd time = 1161455320 sec  969 milliseconds 331 microseconds  969331350 nanosec
[ 1606.616081] Board sync = 1
controls@fb1:~ 0$ 

Apparently the symmetricom driver thinks it's the 299nth day of the year, which of course corresponds to some time in october, which jives with the GPS time the driver is spitting out.

Rolf then noticed that the timing module in the VME crate in the adjacent rack, which also receives an IRIG-B signal from the distribution box, was also showing day 299 on it's front panel display. We checked and confirmed that the symmetricom card and the VME timing module both agree on the wrong time of year, strongly suggesting that the GPS receiver is outputing bogus data on it's IRIG-B output, even though it's showing the correct time on it's front panel.  We played around with setting in the GPS receiver to no avail.  Finally we rebooted the GPS receiver, but it seemed to come up with the same bogus IRIG-B output (again both symmetricom driver and VME timing module agree on the wrong day).

So maybe our GPS receiver is busted?  Not sure what to try now.

 

  5836   Mon Nov 7 17:27:28 2011 jamieUpdateComputersISCEX IO chassis timing slave dead

It appears that the timing slave in the c1iscex IO chassis is dead.  It's front "link" lights are dark, although there appears to be power to the board (other on-board leds are lit).  These front lights should either be on and blinking steadily if the board is talking to the timing system, or blinking fast if there is no connection to the timing distribution box.  This likely indicates that the board has had some sort of internal failure.

Unfortunately Downs has no spare timing slave boards lying around at the moment; they're all stuffed in IO chassis awaiting shipping.  I'm going to email Rolf about stealing one, and if he agrees we'll work with Todd Etzel to pull one out for a transplant

  5854   Wed Nov 9 18:02:42 2011 jamieUpdateCDSISCEX front-end working again (for the moment...)

The c1iscex IO chassis seems to be working again, and the iscex front-end is running again.

However, I can't say that I actually fixed the problem.

Originally I thought the timing slave board had died by the fact that the front LED indicators next to the fiber IO were out.  I didn't initially consider this a power supply problem since there were other leds on the board that were lit.  I finally managed to track down Rolf to give downs the OK to pull the timing boards out of a spare IO chassis for us to use.  However, when I replaced the timing boards in the chassis with the new ones, they showed the exact same behavior.

I then checked the power to the timing boards, which comes off a 2-pin connector from the backplane board in the back of the IO chassis.  Apparently it's supposed to be 12V, but it was only showing ~2.75V.  Since it was showing the same behavior for both timing boards, I assumed that the issue was on the IO chassis backplane.

I (with the help of Todd Etzel) started pulling cards out of the IO chassis (while power cycling appropriately, of course) to see if that changed anything.  After pulling out both the ADC and DAC cards, the timing system then came up fine, with full power.  The weird part is that everything then stayed fine after we started plugging all the cards back in.  We eventually got back to the fully assembled configuration with everything working.  But, nothing was changed, other than just re-seating all the cards.

Clearly there's some sort of flaky connection on the IO chassis board.  Something is prone to shorting, or something, that overloads the power supply and causes the voltage supply to the timing card to drop.

All I can do at this point is keep an eye on it and go through another round of debugging if it happens again.

If it does happen again, I ask that everyone please not touch the IO chassis and let me look at it first.  I want to try to poke around before anyone giggles any cables so I can track down where the issue might be.

  5830   Mon Nov 7 14:50:19 2011 JenneUpdateComputersISCEX is having a bad day

I clicked on the FE status screen, just to check on things, and everything on the c1iscex section was red (the IOP and c1scx).  Upon deciding that was probably a bad thing, I did a soft reboot from the control room.  Now the IOP says "NO SYNC", and the c1scx status thing is totally frozen. 

I have sent Jamie a whiny email. He promises to be here soon to fix it.

  243   Wed Jan 16 19:57:49 2008 tobinConfigurationPhotosISCT_EX
Here's a photo of the ISCT_EX table, for the purpose of planning our auxiliary laser arm locking scheme. Note the (undumped!) beam from the beamsplitter before QPDX (the leftmost gold-colored box); perhaps we could inject there.
Attachment 1: trx-annotated-small.jpg
trx-annotated-small.jpg
  5568   Wed Sep 28 21:23:23 2011 MirkoUpdateComputersISCY FE network card / cable not ok

[Mirko,Jenne]

We discovered that the left network cable is not rigidly connected to the back of the ISCY FE computer. You can easily pull it out a mm disconnecting it. It should click rigidly in place. Not clear if it's the cable or the network card.

  85   Thu Nov 8 18:44:01 2007 tobinConfigurationPSLISS
Tobin, Rob

With the Sense PD blocked, I adjusted the offset trim of the fourth stage in the ISS servo until the current shunt signal was zeroed. After this adjustment, we are able to crank the ISS gain all the way up to 30 dB without CS saturations (provided the HEPA is turned down to a very quiet level), getting about 35kHZ UGF at that gain setting. However, the current shunt mean value was still enormous.

Examining the current shunt signal on a fast scope, we saw an enormous (>2Vpp) 3.6 MHz sawtooth signal. Going up the chain of op-amps, we found that U1, as measured at the "Filter Out" testpoint, is oscillating wildly at 12 MHz (680 mVpp).
  89   Fri Nov 9 17:33:33 2007 robConfigurationPSLISS

The 3.7 MHz is actually on the light. It's the beat between the 29.5 MHz sidebands and the 33.2 MHz sidebands. There are pads in the ISS PCB for a filter to notch this frequency--John is working on it.

I also found a 1.2 ND filter on the lens which focuses the beam on the ISS diodes. I replaced it with a 0.6 ND filter, which brought the ISS DC level (on the screen) up to ~4.2 (it saturates at 5). Once John finishes the filter we should be able to crank up the gain.
  96   Mon Nov 12 15:18:34 2007 robUpdatePSLISS

After John soldered a 3.7 MHz notch filter onto the ISS board, I took a quick TF and RIN measurement. The out-of-loop RIN is attached, including a dark noise trace, and with the gain slider at 10dB. The UGF is 35kHz with a phase margin of 30deg. John is currently doing a more thorough inspection, and will detail his findings in a subentry.
Attachment 1: ISS.png
ISS.png
  97   Mon Nov 12 23:44:19 2007 JohnUpdatePSLISS

Quote:

After John soldered a 3.7 MHz notch filter onto the ISS board, I took a quick TF and RIN measurement. The out-of-loop RIN is attached, including a dark noise trace, and with the gain slider at 10dB. The UGF is 35kHz with a phase margin of 30deg. John is currently doing a more thorough inspection, and will detail his findings in a subentry.


No progress on the ISS tonight. I tried to implement a new filter (attached)to try and gain some phase before the notch. If anything this made things worse. More work is needed.

The ISS loop is off and the power is off at the chassis.
Attachment 1: ISSfilter.jpg
ISSfilter.jpg
  101   Wed Nov 14 12:47:19 2007 tobinUpdatePSLISS
John, Tobin

With John's notch filter installed and the increased light on the ISS sensing diode, we were able to get a UGF of about 60 kHz with the gain slider set to about 20 dB. This morning we met with Stefan to learn his ISS-fu.

His recommendations for the ISS include:
  • Replace the cables from the board to the front panel connectors if this hasn't already been done.
  • Replace the input opamps with 4131's. Be sure to test both positive and negative input signals.
  • Check that all the compensation capacitors are in place and are 68 pF
  • Make sure all the feedback loops have high frequency rolloff
  • The ISS board reads the PDs differentially; make sure the PD sends differentially.
  • Add a big (ie 10uF tantalum) capacitor to the PD to suppress power supply noise
  • Add bigger power supply bypass caps to the ISS
I just took sensing noise spectra (from the PD DC bnc ports) and then took the photodiodes off the table to check that they have the negative end of the differential line connected to ground. (I placed black metal beam blocks on the table in place of the ISS PD's. Also, from the ISS schematic, it looks like it sends a differential output to the PD DC bnc ports, but we have been plugging them directly into the SR785 (grounding the shield). We should make a little BNC-doodle that separates the signal+shield to go into the A and B inputs on the spectrum analyzer.) Opening up one of the photodiodes, it appears that the negative line of the differential output is not connected. Will continue later this afternoon.
  103   Wed Nov 14 17:50:00 2007 tobinUpdatePSLISS
Here's the current wiring between the ISS and its PDs:

pin cable PD ISS
1 blue +5 +5
2 red +15 +15
3 white -15 -15
4 brown OUT IN PD +
5,6,7,8 no connection no connection GND
9 black GND IN PD -


The schematics for the ISS and the PDs are linked from our wiki.

We'll connect the ISS GND to the PD GND.
  137   Wed Nov 28 21:51:52 2007 tobinConfigurationPSLISS
I replaced the front-end differential receivers for the ISS's "inner-loop" sensor and monitor diode inputs with lower-noise THS4131's (formerly THS4151's). I verified operation by taking the transfer function from the "PD+" and "PD-" inputs (separately) to the testpoint following the differential receiver; the surgery appears successful.

I measured the dark spectra at the ISS's DC PD BNC ports and found a noise floor of ~ 16 nV/rtHz, compared with a floor of ~ 22 nV/rtHz last week. This seems to add up, assuming the DC PD port has 0dB gain: the 4131 has a rated noise of 1.3 nV/rtHz and the 4151 a noise floor of 7.6 nV/rtHz, a difference of 6 nV/rtHz. The other change made in that time was to add a larger power supply bypass capacitor in the PD.

There are two of the old 4151 chips still on the ISS board on the two "outer-loop" channels that we don't use. If I dig up any more 5131's I will replace these too for completeness.

There is currently no light on the ISS diodes; I'm not sure where it's intended to come from.
  141   Thu Nov 29 15:17:53 2007 robConfigurationPSLISS

I put some ISS beam on the diode on the PSL table. In the previous layout, this was the monitor diode (and it's labeled monitor) but I plugged it into the sensor jack anyways so we can run with the loop closed for now; we can just switch the cables later. The reason the beam was unclear is because someone popped up a flipper mirror which redirects the beam from the ISS into an OSA.

With the ISS gain slider at 15 dB the UGF is around 40kHz.

Why do we have such short cables for the ISS diodes?
  162   Mon Dec 3 22:20:09 2007 tobinConfigurationPSLISS
I replaced the painfully short 1' cables on the ISS photodiodes with luxurious five foot cables, made by chopping a ten foot Amphenol cable (P/N:CS-DSPMDB09MM-010) in half and using each half for one of the diodes. All of the ISS GND connections are wired to the PD GND, as is the PD- differential signal. The diodes are installed on the PSL table, but I have not tested them beyond looking at the DC values as I blocked/unblocked the beam.
  163   Tue Dec 4 23:16:35 2007 tobinUpdatePSLISS
I was confused to find that I could increase the ISS gain slider all the way from 15dB to 30dB without seeing much of any increase in gain in the measured open-loop transfer function. While making these swept-sine measurements, the saturation indicator almost never tripped, indicating it was seemingly happy. But then I noticed an odd thing: if I disable the test ("analog excitation") input, the saturation indicator trips immediately. I hooked up a scope to the current shunt test point (TP12). With the test input enabled, the loop closed, and the analog excitation port connected to the SR785, I see a a 5 Vpkpk, 2.55 MHz triangle wave there. It is there even if I set the SR785 excitation amplitude to zero, but it disappears if I disconnect the cable from the SR785.

I found oscillations at TP20, TP30, TP36, TP41, and TP42. Many of these are in the (unused) "outer loop" circuitry and currently lack compensation capacitors.
  167   Wed Dec 5 17:49:57 2007 tobinUpdatePSLISS
Attached is a plot of the ISS RIN with a variety of gain settings.

Unfortunately the dark noise is huge now--a result of the new cables & wiring?
Attachment 1: rin.pdf
rin.pdf
  591   Sun Jun 29 11:31:52 2008 JohnSummaryPSLISS
I reduced the gain of the ISS (C1: PSL-ISS_VGAGAIN) from 5dB to 2dB. Any higher and it constantly saturates.
  595   Sun Jun 29 19:53:26 2008 JohnSummaryPSLISS

Quote:
I reduced the gain of the ISS (C1: PSL-ISS_VGAGAIN) from 5dB to 2dB. Any higher and it constantly saturates.


Seemed to go back to normal after the frame builder came back.
  8876   Thu Jul 18 21:45:36 2013 CharlesUpdateISSISS - Full Schematic

 Here I have included the full schematic (so far) of the proposed ISS. There are two sheets: the first schematic details the filter stages and their accompanying circuitry while the second schematic details the RMS threshold detection and subsequent triggering.

The first schematic is fairly self explanatory as to what different portions do, and I have annotated much of the second schematic as there are some non-traditional components etc.

I have not yet included some mechanism to adjust the threshold voltage in real time or any of the power regulation, but these should follow fairly quickly.

Attachment 1: 40mServo_v1.pdf
40mServo_v1.pdf 40mServo_v1.pdf
  8920   Wed Jul 24 22:58:03 2013 CharlesUpdateISSISS - Full Schematic - Updated

 I have made significant changes to the ISS schematic, mostly in the form of adding necessary subsystems.

Some changes I have made:

  • Added a front page with sheet symbols that are representations of the other schematic sheets.
  • Added an 'Excitation' subsystem for use in determining the closed-loop transfer function
  • Added an instrumentation amplifier (with ADA4004s at Rana's recent suggestion) to handle the differential input from the PD
  • Included a switchable inverting amplifier (Gain of 1 or -1) to ensure we have the correct polarity
  • Made it so the first filtering stage is immediately active when the ISS loop is closed
  • Added LP filters with large time constants to buffer/delay trigger signals
  • Added test points all over the board
  • Refined a few buffer amplifiers

On the front page, all inputs and outputs are currently BNC ports, although this is most likely not the final design that will be used. For instance, the ports ENABLE, INPUT GND and INVERT are supposed to be logic inputs for a MAX333a switch. These will most likely be front panel switches that either connect the switch's logic pin to GND (Logic 0) or something like a +5 V supply (Logic 1).

I also have not included power regulation for my board although I have some of the actual D1000217 Chasis Power Regulator boards and I'll incorporate those in my design soon.

Attachment 1: 40mServo_v1.pdf
40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf
  8928   Fri Jul 26 22:19:24 2013 CharlesUpdateISSISS - Full Schematic - Updated

Quote:

 I have made significant changes to the ISS schematic, mostly in the form of adding necessary subsystems.

Some changes I have made:

  • Added a front page with sheet symbols that are representations of the other schematic sheets.
  • Added an 'Excitation' subsystem for use in determining the closed-loop transfer function
  • Added an instrumentation amplifier (with ADA4004s at Rana's recent suggestion) to handle the differential input from the PD
  • Included a switchable inverting amplifier (Gain of 1 or -1) to ensure we have the correct polarity
  • Made it so the first filtering stage is immediately active when the ISS loop is closed
  • Added LP filters with large time constants to buffer/delay trigger signals
  • Added test points all over the board
  • Refined a few buffer amplifiers

On the front page, all inputs and outputs are currently BNC ports, although this is most likely not the final design that will be used. For instance, the ports ENABLE, INPUT GND and INVERT are supposed to be logic inputs for a MAX333a switch. These will most likely be front panel switches that either connect the switch's logic pin to GND (Logic 0) or something like a +5 V supply (Logic 1).

I also have not included power regulation for my board although I have some of the actual D1000217 Chasis Power Regulator boards and I'll incorporate those in my design soon.

 More changes that I've made:

  • Added daughter boards for power regulation. Currently I have ±24V going into two boards, with ±15V coming out of one and ±5V coming out of the other. Again, these are based off of LIGO-D1000217
  • Added an optional Dewhitening filter (with p=1Hz and z=100Hz, although these can easily be changed) to accommodate any PD's that have whitening
  • Added a bypass to allow the boosts (stages 2 and 3 of the filtering servo) to be enabled/disabled by a front panel switch
  • I also put in jumpers that can be used to provide Logic 1 (boost enabled) to both Boost 1 and Boost 2 without depending on the internal RMS detection/triggering
  • Changed the input grounding switch so that it's set up correctly. Before, it was taking the PD signal and sending it to GND, not actually grounding the input to the rest of the ISS 
Attachment 1: 40mServo_v1.pdf
40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf 40mServo_v1.pdf
  9016   Thu Aug 15 21:42:53 2013 CharlesUpdateISSISS - Schematic + PCB Layout

 After many, many moons of getting to know exactly how frustrating Altium can be, I have completed the PCB layout for my ISS board (final page of ISS_v3.pdf).

Before I get into detail about the PCB, there is one significant schematic change to note: the comparator circuit was changed (with significant help from Koji) so that the voltage reference for boost triggering is established in a more logical way. Instead of the somewhat convoluted topology I had before, now there are only two feedback resistors, R82 and R83. Because their resistances (500k and 50k respectively) are so much larger than the total resistance of the 1k potentiometer (used to establish a tunable threshold voltage), the current flowing through the feedback loop is negligible compared to the 5 mA current flowing through the potentiometer (the pot is rated for 2 W and with 5 mA -> 25 mW dissapation). This allows one to set the threshold voltage for my schmitt trigger, at pin 2 of both the pot and the comparator, entirely with the pot. This trigger also has hysteresis given by the relation deltaV ~ (R83/R82) * (Voh - Vol) where deltaV is the separation between threshold voltages, Voh is the high-level comparator ouput and Vol is the low-level comparator output. Koji simulated this using CircuitLab and I plan to verify the behavior by making a quick prototype circuit.

Now, on to the PCB. The board itself is of a 'standard' LIGO size (11" x 6") has 3 routing layers and 3 internal planes, one for +15 V, one for -15 V and one for GND. In the attached pdf, red is the top routing layer, blue is the bottom layer and brown is the middle routing layer (used for ±5 V exclusively). The grey circles are pads and vias (drilled through) and anything in black is silkscreen overlay. I placed each component and track by hand, attempting to minimize the signal path and following the general rules below,

  • Headers for power, ±5 V and ±15V, are at the back of the board
  • For sections of the board such as filter stages or buffers, resistors and capacitors were grouped around their respective op-amps.
  • As often as was possible, routing was confined to the top layer. Tracks on the bottom layer were placed mostly out of necessity (i.e. no possible connection on top routing layer).
  • The signal generally proceeds from left to right (directions with respect to the attached printout) in the same logical order as on the schematic sheets. Refer to the global sheet (page 1) of the attached "ISS_v3.pdf".
  • External ports such as the PD input, various monitoring ports and panel mounted switches/LEDs were all connected to the board via headers located along the front edge. These are also ordered following the schematic layout.
  • Occasionally, similar signal paths were grouped together although this was a rarity on my board

Sections of the board have been partitioned and labeled with silkscreen overlay to help in both signal pathway recognition as well as eventual troubleshooting.

On the board, I have also included holes so that it can be mounted inside of an enclosure. There is a DCC number printed as well as a 'barcode' (TrueType font: IDAutomationC39S), although they both contain filler asterisks as I haven't published this to the DCC and thus do not have a number.

Attachment 1: ISS_v3.pdf
ISS_v3.pdf ISS_v3.pdf ISS_v3.pdf ISS_v3.pdf ISS_v3.pdf ISS_v3.pdf
Attachment 2: ISS_v3-Power_Reg.pdf
ISS_v3-Power_Reg.pdf
  9379   Wed Nov 13 19:41:55 2013 JenneUpdateISSISS AOM

AOM driving from DAC:

I found that the DAC channels for TT3 and TT4 are connected up in the simulink model, but we aren't using them, since we don't actually have those tip tilts installed.  So, we hooked up the TT4 LR DAC output, which is channel 8 on the 2nd set of SMA outputs.  We put our AOM excitations into TT4_LR_EXC.

 

  10986   Sat Feb 7 13:34:11 2015 KojiSummaryPSLISS AOM driver check

I wanted to check the status of the ISS. The AOM driver response was measured on Friday night.
The beam path has not been disturbed yet.

- I found the AOM crystal was removed from the beam path. It was left so.

- The AOM crystal has +24V power supply in stead of specified +28V.
  I wanted to check the functionality of the AOM driver.

- I've inserted a 20dB directional coupler between the driver and the crystal.
  To do so, I first turned off the power supply by removing the corresponding fuse block at the side panel of the 1X1 Rack.
  Then ZFDC-20-5-S+ was inserted, the coupled output was connected to a 100MHz oscilloscope with 50Ohm termination.
  Then plugged in the fuse block again to energize the driver box.

  Note that the oscilloscope bandwidth caused reduction the amplitude by a factor of 0.78. In the result, this has already been compensated.

- First, I checked the applied offset from a signal generator (SG) and the actual voltage at the AOM input. The SG OUT
  and the AOM control input are supposed to have an impedance of 50Ohm. However, apparently the voltage seen at the
  AOM in was low. It behaved as if the input impedance of the AOM driver is 25Ohm.
  In any case, we want to use low output impedance source to drive the AOM driver, but we should keep this in mind.

- The first attachment shows the output RF amplitude as a function of the DC offset. The horizontal axis is the DC voltage AT THE AOM INPUT (not at the SG out).
  Above 0.5V offset some non linearity is seen. I wasn't sure if this is related to the lower supply voltage or not. I'd use the nominal DC of 0.5V@AOM.

  The output with the input of 1V does not reach the specified output of 2W (33dBm). I didn't touch the RF output adjustment yet. And again the suppy is not +28V but +24V.

- I decided to measure the frequency response at the offset of 0.53V@AOM, this corresponds to the DC offset of 0.8V. 0.3Vpp oscillation was given.
  i.e. The SG out seen by a high-Z scope is V_SG(t) = 1.59 + 0.3 Sin(2 pi f t) [V]. The AOM drive voltage V_AOM(t) = 0.53 + 0.099 Sin(2 pi f t).
  From the max and min amplitudes observed in the osciiloscope, the response was checked. (Attachment 2)
  The plot shows how much is the modulation depth (0~1) when the amplitude of 1Vpk is applied at the AOM input.
  The value is ~2 [1/V] at DC. This makes sense as the control amplitude is 0.5, the applied voltage swings from 0V-1V and yields 100% modulation.

  At 10MHz the first sign of reduction is seen, then the response starts dropping above 10MHz. The specification says the rise time of the driver is 12nsec.
  If the system has a single pole, there is a relationship between the rise time (t_rise) and the cut-off freq (fc) as fc*t_rise = 0.35 (cf Wikipedia "Rise Time").
  If we beieve this, the specification of fc is 30MHz. That sounds too high compared to the measurement (fc ~15MHz).
  In any case the response is pretty flat up to 3MHz.

Attachment 1: AOM_drive.pdf
AOM_drive.pdf
Attachment 2: AOM_response.pdf
AOM_response.pdf
  10988   Sun Feb 8 21:54:50 2015 ranaSummaryPSLISS AOM driver check

This is good news. It means that the driver probably won't limit the response of the loop - I expect we'll get 20-30 deg of phase lag @ 100 kHz just because of the acoustic response of the AOM PZT + crystal.

  3897   Thu Nov 11 15:27:43 2010 valera, steveConfiguration ISS AOM installed

 We installed the ISS AOM in the PSL. The AOM was placed right after the EOM. The beam diameter is ~600 um at the AOM. The AOM aperture is 3 mm.

We monitored the beam size by scanning the leakage beam through the turning mirror after the AOM. The beam diameter changed from 525 um to 515 um at a fixed point. We decided that the AOM thermal lensing is not large enough to require a  new scan of the mode going into the PMC and we can proceed with PMC mode matching using the scan that was taken without the AOM (to be posted).

  1260   Thu Jan 29 18:10:13 2009 YoichiUpdatePSLISS Bad
Kakeru, Yoichi

As we noted before, the ISS is unstable. You can see the laser power oscillation around 3Hz.
We took the open-loop transfer function of the ISS around the lower UGF.
The phase margin is almost non-existent.
It was measured with the ISS gain slider at 2dB (usually it was set to 7dB).
So if we increase it by 3dB, it is guaranteed to be unstable.

The higher UGF has also a small phase margin (about 12deg.).
With the ISS gain slider at 2dB, the upper UGF is too low, i.e. the UGF is located at the beginning of the 1/f region.
So we if we make the lower UGF stable by lowering the gain, the upper UGF becomes unstable.

We took out the ISS box from the PSL table.
Kakeru and Peter are now trying to modify the filter circuit to give more phase margin at the lower UGF.
Attachment 1: OPLTF1.png
OPLTF1.png
  1262   Fri Jan 30 19:38:57 2009 KakeruUpdatePSLISS Bad
Kakeru, Peter

We try to improve ISS bord, but there isn't circuit diagram with correct parameters.
We are to measure transfar function and guess each parameter before we desogn new circuit parameters.
  8359   Tue Mar 26 20:20:10 2013 CharlesUpdateISSISS Design Plans - Servo Noise Analysis

In order to allow other individuals besides myself to consider the proposed design of the ISS, I have created a publicly available CircuitLab drawing, which can be found here: CircuitLab Drawing. For simplicity, I have used ideal op-amps without voltage rails or their associated power supplies. In the actual implementation of the ISS, we will most likely also have trim resistors to ensure a zero offset for each op-amp. We interpret the PD as a voltage source for simplicity and I will use an actual summing amplifier in place of the summing junction used in the diagram.

The diagram linked above is simply a naive copy of a design by Rich Abbott so there are most likely mistakes and/or unnecessary elements, but it is a work in progress. I began discussing, with Jamie, the relative use of the first few filter stages in the servo. As far as my understanding goes, the first 'stage' was part of cascade of op-amps that served to convert a differential input from the PD into a single DC signal referenced to ground. Indeed, the first stage of my diagram (U1) is simply a unity-gain low-pass filter with f~5 MHz. Additionally, the second filter 'stage', U2, is also a unity-gain low-pass filter although it introduces a phase shift of 180 deg as the input to the second stage is on the inverting input of the op-amp. These characteristics were determined using LISO and examining the transfer function.

Noise analysis was also performed for the above circuit. The noise from various elements is examined at the output of the servo (labeled as 'outU6' in my LISO file). In the attached diagram, we see the voltage noise at the output from each op-amp as well as the sum of all the various noises, which includes resistor noise and current noise from the inputs of each op-amp. These are LISO's standard considerations and it is also worthwhile to note that the result is not referred to the circuit input, but as we have the transfer function of the whole servo, referring the noise to the input is trivial.

I have also included the following output for the sake of completeness.

from 1 Hz onwards noise by OP:I+ (U3) dominates.

from 38.6812 Hz onwards noise by R(R24) dominates.

from 115.478 Hz onwards noise by R(R11) dominates.

 

 

Attachment 1: ISS.pdf
ISS.pdf
  7964   Wed Jan 30 14:00:02 2013 CharlesUpdateISSISS Design and Prototyping

Attached are both the circuit diagram and the liso formatted *.fil for the main branch of the ISS, as well as the resulting transfer function when analyzed. Unfortunately, as noted in the file, not all of the elements are possible to analyze in liso, such as any type of op-amp with more than two inputs and one output (AD602 used in this design has 16 pins with two distinct amplifiers contained within).

I have begun prototyping this circuit on a breadboard.

Attachment 1: ISS.fil
## ISS Main Branch
##
## All circuit elements are named according to the circuit diagram 
## "D020241-D2.pdf" by R. Abbott.

# Stages are separated by empty lines and elements between stages are
# also separated by empty lines for easy file navigation
# Before the first stage there is a 'fully differentiable' op-amp
# that I believe serves to isolate the device from the power supply
# However, liso does not have the capability to analyze such an op-amp,
... 79 more lines ...
Attachment 2: ISS_Transfer_Function.png
ISS_Transfer_Function.png
Attachment 3: D020241-D2.pdf
D020241-D2.pdf D020241-D2.pdf D020241-D2.pdf
  7965   Wed Jan 30 14:37:01 2013 ZachUpdateISSISS Design and Prototyping

Quote:

Unfortunately, as noted in the file, not all of the elements are possible to analyze in liso, such as any type of op-amp with more than two inputs and one output (AD602 used in this design has 16 pins with two distinct amplifiers contained within).

Typically, you can still find a way to model the important parts of the stages that are not as simply added. In the case of the differential input stage, in particular, it is important to include it because it will usually set the input noise level of the circuit. In this case, the noise is the same as the second stage (U5) and it has a gain of 1, so there is essentially no difference (up to factors of sqrt(2) or 2).

You can edit the opamp.lib file and add in custom components. For the input stage, you can just pretend it is a simple non-inverting amplifier with the specified noise characteristics from the datasheet: un = 1.3n, uc = 50 Hz (see below).

For dual op amps, you can usually just model each part separately. For example, the OPA2604 is a dual op amp that is included in the opamp.lib and can be treated as a single one in a model.

Screen_Shot_2013-01-30_at_4.22.46_PM.png

 

  8110   Tue Feb 19 15:40:34 2013 CharlesUpdateISSISS Prototype

After spending a good deal of time learning how to use the SR785, I was able to characterize my prototype circuit. The transfer function from a swept sine measurement looks very similar to the theoretically calculated transfer function (both of which are attached). The frequency response of the circuit was considered over the range 10 Hz - 10 kHz, which contains the eventual working range of the ISS (at least to my knowledge).

Note that OP27 op-amps were used instead of the high-speed AD829 op-amps that will be implemented in the actual design. This was done as a result of the limitations and inherent noise characteristics of the breadboard on which the prototype was built.

Unfortunately, I saved the wrong dataset (i.e. phase of the transfer function, not magnitude) and thus the presented function here is image generated by the SR785.

RXA: One must learn to use the python-GPIB interface to not lose data in the future.

Attachment 1: Prototype_Transfer_Function.png
Prototype_Transfer_Function.png
Attachment 2: Theoretical_Transfer_Function.png
Theoretical_Transfer_Function.png
  197   Tue Dec 18 21:31:31 2007 tobinUpdatePSLISS RIN
My measurements of the ISS RIN via the SR785 and via the DAQ disagree considerably. The spectral shapes are very similar, however, so I expect that a constant factor is creeping in somewhere. Measurements taken at the PD DC monitor points using the SR785 attached. There is a lot of excess noise in the 300 Hz - 1 kHz region.
Attachment 1: iss-rin.pdf
iss-rin.pdf
  185   Mon Dec 10 18:42:20 2007 tobinUpdatePSLISS RIN script
I wrote a script to measure the ISS RIN. The script uses the "labca" interface (described in an earlier entry) to read and twiddle EPICS settings and mDV to get DAQ data. The script measures open loop RIN, closed loop RIN at each of several gain slider settings, and dark noise. The dark noise is obtained by misaligning (unlocking) the PMC. The script also compares the whitened and unwhitened spectra for an open loop measurement and performs a fit of a simple pole to find the dewhitening filter.

This is all very exciting, but I don't quite believe the results, since the closed loop RIN seems to bottom out at 2e-7/rtHz regardless of the gain slider setting.

Sample output attached. The script may be found at scripts/PSL/ISS/rin.m.
Attachment 1: rin-20071210-1831.pdf
rin-20071210-1831.pdf
  1017   Wed Oct 1 23:05:14 2008 YoichiUpdatePSLISS RIN spectra
Stefan, Yoichi

We took relative intensity noise (RIN) spectra of the ISS error point and the monitor PD (attm1).
In-loop RIN is the sensor PD and "Out of the loop RIN" is the monitor PD.
The ISS gain slider was at 8dB in this measurement.
It looks normal. 
An open loop transfer function of the ISS loop was measured (attm2). The UGF was 22kHz with the phase margin of ~22deg.
We should increase the UGF up to ~60kHz

When we increase the gain up to 14dB, the CS saturation warning comes up in the EPICS screen.
We confirmed this by monitoring the CS drive signal with an oscilloscope.
It is the output of an AD602J, which has +/-3V output range. 
By increasing the gain of AD602J, we saw that the output signal hits the rail.
There seems to be a lot of high frequency (100kHz - a few MHz) noise, out of the control band.
We also observed that AD602J itself oscillates at about 10MHz (don't remember the exact number) when the gain is increased.
(We saw this even when the loop is off. There is no such an oscillation in the input to the AD602J).
When we took wide band spectra of the CS drive signal, we saw many large harmonics of ~180kHz. We believe these peaks are limiting
our ISS gain now (causing the CS saturation). The harmonics persisted even when we disconnected the PDs. So it is not coming from the light.
We saw the same harmonics in the power lines. They may be the switching noise of the Sorensens. 
We took spectra of those harmonics, but the netgpibdata.py somehow did not save the data from AG4395A correctly. I have to debug this.

Stefan removed DC offsets from the AD829s (many of them are used in the ISS board) by turning the pots for offset adjustment.
This eliminated the problem of getting a large DC CS feedback (observable in C1:PSL-ISS_CSDRIVE_MEAN) when the gain is increased.

During the investigation, I noticed that increasing the PMC gain too much (~22dB) caused an oscillation of the PMC loop and consequently made
the ISS saturate. When the ISS is behaving bad, we should check the PMC gain.

Currently, the ISS is running OK with the gain = 8dB. I modified the mcup script to set the ISS gain to 8dB when the MC is locked.

TO DO:
Wait for Peter's answer about spare ISS boards.
Power line filtering. 
Find the cause of AD602J oscillation (Well this is the one mounted upright. So just mounting it normally might solve the problem :-). 
Attachment 1: RIN.png
RIN.png
Attachment 2: OPLTF.png
OPLTF.png
  2311   Mon Nov 23 00:46:09 2009 rana, robUpdatePSLISS RIN: Its too high by 10x

This plot shows the RIN as measured by the ISS. Its ~2 x 10^-7, whereas its supposed to be more like 3 x 10^-8.

The ISS has DC coupled RIN channels (with a _F suffix) and AC coupled RIN channels (with a _FW suffix). By using a swept sine, Rob determined that the AC coupled channels have an AC coupling pole at ~80 Hz. The attached plot uses this and then has the overall gain adjusted to match with the _F channels below 10 Hz.

The _F channels can be converted directly into RIN by just dividing the spectra by the mean value of the time series. The dark offset of these channels is small and so this only introduces a ~5-10% calibration error.

Question #1: Why is the RIN so bad? According to the MEDM screen, the photocurrent on the MON/SENS PDs is 1.9/1.3 mA. That's sort of low, but should still allow us to get 5x10^-8 in RIN.

Question #2: Does it make an effect on the current DC Readout work? IF so, should we try to fix up the ISS in a temporary way? Since the in-loop and out-of-loop detectors are completely coherent, all of the noise is likely just unsuppressed noise from the laser. We are unable to increase the gain because of the high frequency noise from the NPRO.

 

Let's remember to replace this ISS with a new one that can drive an AOM. Need a volunteer to get us a new ISS.

 

Attachment 1: Untitled.png
Untitled.png
  9332   Sun Nov 3 00:05:52 2013 CharlesSummaryISSISS Update - Bout' time

Right near the end of summer, I had an ISS board that was nominally working, but had a few problems I couldn't really sort out. Since I've been back, I've spent a lot of time just replacing parts, trying different circuit topologies and generally attempting to make the board function as I hoped it might in all those design stages. Below is a brief list of some of the problems I've been fixing as well as the first good characterization of the board transfer function that I've been able to get.

We'll start with some of the simple problems and proceed to more complicated ones.

  • The 5V reference I was using to obtain an error signal from some arbitrary DC photodiode readout was only producing ~2.5 V. 
    • Turns out I just need a FET type op-amp for the Sallen-Key Filter that I was using to clean up any noise in the reference output, as the leakage current in a AD829 was causing a significant voltage drop. I put in an OPA140 and everything worked marvelously.
  • The way I set up input grounding (i.e. send a ~0 amplitude signal through the board as an input) passed a few Amps through one of my chips causing it to burn out rather fantastically.
    • There isn't a good way to fix this on the current board (besides just getting rid of the functionality altogether) so my solution so far has just been to redesign that particular sub-system/feature and when we implement the second version of the ISS, the input grounding will be done correctly
  • One of the ICs I'm using, specifically the AD8436 RMS-to-DC converter, causes some super strange oscillations in -5V power line. When this chip is soldered onto the board, the -5V supply jumps between -3V and -10V rather sporadically and the DC power-supply used to provide that -5V says that board is drawing ~600 mA on that particular power line.
    • To date, I don't really have any idea what's going with this chip, and I've tried a lot of things to remedy the problem. My first thought was that I had some sort of short somewhere so I took the chip off the board, cleaned up all the excess solder and flux around the chip's footprint and then meticulously soldered a new chip on (when I say meticulously, it took over an hour to solder 20 little feet. I really really didn't want to short anything accidentally as the chip only comes in a package with ridicously small spacing between the leads). Lo and behold, nothing happened. I still saw the same oscillations in power supply and the board was still drawing between >500 mA on that line. Just to be sure, I soldered on a third chip taking the same amount of care and had the same problems.
    • I went over the schematic in Altium that we used to order the board, and unless the manufacturer made a mistake somewhere, there aren't any incorrectly routed signals would cause, say, two active devices to try setting the voltage of a particular node to different values.
    • I got some QSOP-to-DIP package converters so that I could mess around with the AD8436 on a breadboard to make sure it functioned correctly. I set up an identical circuit to the one on the PCB and didn't see any oscillations in the power supply, both for +-5V and +-15V as the chip can handle both supply voltages. I'm not really sure how to interpret this...
    • I'm still actively trying to figure this particular problem out, but I'm shooting in the dark at this point. 
  • Initial attempts to measure the transfer-function of the board were wrought with failure.
    • I figured out, with Nic's help, that the board needs the 'loop closed' with a significant broadband attenuator (to simulate the plant optics discussed in elog 9331) in order to not have constant railing of the high gain op-amp filter stages. Even after I did this, the measured transfer functions were not at all consistent with simulation. I wasn't sure if it was just a part issue, a design issue or a misunderstanding/bad data collection on my part so I just redesigned the whole servo and stuffed the board with entirely new components from around the 40m. Turns out the newly designed servo behaved more properly, as I will show below.

The above list encompasses all the issues I've had in making the ISS board function correctly. No other major problems exist to my knowledge.

I was able to measure both the open- and closed-loop transfer functions of the servo with the SR785. The results are shown below.

full-op-loop.png

The transfer function with the boosts on caps at a particular value set by op-amp railing, i.e. below 100 Hz, the op-amps are already putting out their max voltage. This is the usual physical limitation when measuring the transfer function of an integrator. We can also see that the measured phase follows the simulated phase above ~300 Hz. The 'phase matching' at low frequency is again do to the op-amp railing in the servo output..

The closed-loop gain is shown below,

full-cl-loop.png

The measured closed-loop gain with the boosts on again matches the LISO simulation quite well except at low frequency where we are limited by op-amp railing. We compare the measured closed-loop transfer function to the desired noise suppression stipulated in my previous elog 9331,

req-vs-meas.png

 And we might hopefully conclude that my servo functions as desired. One should note that the op-amp railing seen in these measurements is not indicative of limitations we might face in some application of the ISS for the following reason. These transfer functions were measured with a 100 mV excitation signal (it is necessary to keep this signal amplitude large enough so that the inherent signal-to-noise ratio of the excitation source is large enough for accurate measurement) which leads to somewhat prompt railing of the op-amps. When the ISS operates to actually stabilize a laser, the input error signal will be much smaller (on the order of a few 10's of mV or less) and will decrease significantly assuming correct operation of the ISS. This means we won't see the same type of gain limitations.

 

What now, you ask?

Aside from the problem with the AD8436 chip, the ISS board seems to be functioning correctly. The transfer functions we have measured are correct to within the component tolerances and all of the various subsystems are behaving as they were designed to. Moving toward the goal of having this system work in situ for the CTN experiment, I need to do the following things,

  • Design a housing for the board -> order said housing and the front panel previously designed
  • Make sure the power supply daughter PCB boards are compatible with the ISS board and can provide power correctly
  • Talk to Evan and Tara about integrating the ISS with their experiment and make sure my board can do everything it needs to in that context.

So close, or so I say all the time 

 

  15645   Tue Oct 27 23:47:53 2020 gautamUpdateGeneralISS checkout

I wanted to look into the ISS situation. Some weeks ago, I found the PD that was previously used as the in-loop photodiode. I wanted to use this and measure the open-loop RIN at a few places (to see if there's any variation and also to check its functionality). However, I didn't get very far tonight - for a start, the PD height is 3" (while our beam height is 4" everywhere outside the vacuum), and I needed to put together a circuit to supply the 5V bias and +/- 15 V since the transimpedance is done on the head. I was only able to do a low-level functionality test tonight, checked that the DC voltage output varied linearly with the incident power (calibrated against an NF1611 photodiode, data will be put up later). I didn't get to measuring any noise performance - is an incandescent light bulb still shot noise limited at ~10 Hz < f < 10kHz? Some notes:

  1. The PD is DC coupled, and has a transimpedance of 1 kohm (inverting AD829 does the transimpedance).
  2. Probably a daughter board should be made that supplies the DC power voltages and rotues the output signal to something more convenient like a BNC connector. This daughter board can then also implement a DC coupled path (for monitoring) and AC coupled path (for servoing, fc to be determined).
  3. SR560 based ISS was implemented some years ago but I think the improvement was only seen above 100 Hz, and that too was marginal, the stabilized RIN was 10^-6 (monitored on an out-of-loop photodiode I think, but unsure). We'd probably want to aim for at least an order of magnitude better. Unclear at this point why more suppression wasn't possible back then, was it just insufficient loop gain, or was the sensing noise too high? To be investigated.

Unconnected to this work - this problem reared its ugly head again (i noticed it yesterday morning already actually). I don't have the energy to embark on a fix tonight, Koji is going to be in the lab all day tomorrow and so he will fix it.

  15647   Wed Oct 28 14:01:03 2020 not gautamUpdateGeneralISS checkout

that little PD in the black mount was never very good. The AD829 is not a good opamp for transimpedance and especially not good for low frequencies. Stefan Ballmer and I were able to get 2e-8 out of these (@100 Hz) many years ago.

I wonder if we have some of Zach's M2ISS photodetectors around, perhaps in QIL or Cryo. I doubt that any of them are in use now. Those had good performance nad BNC output.

  15648   Wed Oct 28 14:07:47 2020 gautamUpdateGeneralISS checkout

Ok I was using the PD in the black mount because Rana recommended it a few weeks ago.

Regarding the M2ISS, I acquired the hardware from QIL some months ago, including a circuit board, and 2 PDs. These had LEMO outputs though (not BNC), and the mounts are not 4". These photodiodes are what I'm using as the airBHD DCPDs right now, and some photos are here - are these the photodiodes you mentioned? Or are there yet more M2ISS photodiodes? I remember Johannes had some custom mounts extruded to make them 4" high, do you mean those? Can I retrieve them his Cryo setup?

BTW, my elog scraping shows only one spectra from Stefan in the ATF elog, and the performance there is more like 1e-7/rtHz @ 100 Hz, and that’s using a dedicated high BW servo circuit, not the SR560. Am I just missing the measurement of 2e-8/rtHz?

Quote:

that little PD in the black mount was never very good. The AD829 is not a good opamp for transimpedance and especially not good for low frequencies. Stefan Ballmer and I were able to get 2e-8 out of these (@100 Hz) many years ago.

I wonder if we have some of Zach's M2ISS photodetectors around, perhaps in QIL or Cryo. I doubt that any of them are in use now. Those had good performance nad BNC output.

  169   Wed Dec 5 18:22:03 2007 tobinUpdatePSLISS dark noise
Attached is a plot of the dark noise spectrum of the ISS photodiodes (1) before fooling with them, (2) after replacing the 4151's with 4131's (improvement!), and (3) after replacing the cables and changing the wiring (disaster!).
Attachment 1: sense_noise.pdf
sense_noise.pdf
  171   Wed Dec 5 20:32:51 2007 tobinUpdatePSLISS dark noise
The ISS dark noise is not coming from the PD heads; the spectrum is essentially unchanged when the PD is unplugged from the ISS. Did the input opamps both get semi-fried in the same way? (They worked so well when they were first installed.) What else changed? I'm baffled. Frown
  177   Thu Dec 6 19:30:43 2007 tobinUpdatePSLISS dark noise - 60 Hz!
A higher resolution spectrum [attached] shows that nearly all of the excess dark noise on the ISS is in 60 Hz harmonics (with some 256 Hz harmonics too--are these from the DAQ?).

With the loop closed and the slider at 5dB, the laser light coming out has a noise floor of 10^-7 RIN or better from 40 Hz to 8 kHz.

Now to figure out why all this 60 Hz is getting in... (I tried turning off all the lights and the HEPA, and moving the SR785 further away, none of which did anything.)
Attachment 1: iss.pdf
iss.pdf
  183   Fri Dec 7 19:14:30 2007 tobinUpdatePSLISS dark noise - ground loop enlightenment
My alleged 60 Hz harmonics were all from a ground loop created by connecting the SR785 ground to the ISS circuit ground; they disappeared when I set the SR785 input to "floating ground." doh!

I modified the ISS PD's to have a 100 ohm resistor in series with the output (in place of 20 ohms). The diodes are again in place on the table, ready for action.
  10072   Thu Jun 19 14:41:00 2014 ManasaUpdatePSLISS disabled

I would like to measure the switching time of the AOM. So I have disconnected the modulation input to the AOM that comes from the ISS. I have also turned OFF the SR560's and the AWG that belong to ISS. 

Pics and cable connections of the state in which the ISS setup was left at, will be updated soon.

  1287   Mon Feb 9 19:50:48 2009 YoichiConfigurationPSLISS disconnected
We are doing measurements on ISS.
The ISS feedback connector is disconnected and the beam to the MC is blocked.
  98   Tue Nov 13 14:33:40 2007 JohnUpdatePSLISS filter
The transfer function from 'In Loop Error Point Monitor' to TP3 the filter out test point on the ISS board.

-33dB at 3.715MHz.
Attachment 1: PB130035.JPG
PB130035.JPG
Attachment 2: DSC_0165.JPG
DSC_0165.JPG
  648   Tue Jul 8 12:25:54 2008 JohnSummaryPSLISS gain set to 2dB
ELOG V3.1.3-