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ID Date Authorup Type Category Subject
  15142   Wed Jan 22 19:17:20 2020 gautamConfigurationComputersMegatron: starts up grade

upgrade was done

cronjob testing wasn't one by one 😢 

burt snapshots were gone

i brought them back home 🏠 

Quote:

Megatron is now running Ubuntu 18.04 LTS.

  15143   Wed Jan 22 20:12:36 2020 gautamUpdatePSLPMC demodulator electrical characterization

Summary:

The mixer + LPF combo used to demodulate the PMC PDH error signal seems to work as advertised.

Details:

Measurement setup --- Attachment #1. The IF signal was monitored using the scope in High-Z mode.

Results --- Attachment #2.

So the next step is to characterize the RF transimpedance of the PMC RFPD.

Attachment 1: demodChar.pdf
demodChar.pdf
Attachment 2: mixerChar.pdf
mixerChar.pdf
  15144   Thu Jan 23 14:37:05 2020 gautamUpdatePSLPMC VGA chip damaged?

[jordan, gautam]

Summary:

The AD602 chip which implements the overall servo gain for the PMC seems to be damaged. We should switch this out at the next opportunity.

Details:

  1. According to the PSL cross connect wiring diagram, the VME DAC that provides the control voltage to the VGA stage goes to pins 7/8 of cross connect J16.
    • Jordan and I verified that the voltage at this point [Vout], is related to the PMC_GAIN EPICS slider [dB] value according to the following relationship: V_{\mathrm{out}} = (10-\mathrm{dB})/2.
  2. On the PMC servo board, this voltage is scaled by a factor of -1/10. 
    • This was confirmed by peeking at this voltage using a DMM (I clipped onto R31) while the gain slider was varied.
    • This corresponds to +/- 1000 mV reaching the AD602.
    • However, the AD602 is rated to work with a control voltage varying between +/- 625 mV.
    • What this means is that the EPICS slider value is not the gain of the AD602 stage. The latter is given by the relation G [\mathrm{dB}] = 32 \times V_{\mathrm{G}} + 10.
    • @team PSL upgrade: this should be fixed in the database file for the new c1psl machine.
  3. Using TP1 and TP2 connected to the SR785, I measured the transfer function of the AD602 for various values of the EPICS slider.
    • Result is shown in Attachment #1.
    • I did this measurement with the PMC locked, so I'm using the in-loop error signal to infer the gain of the VGA stage.
    • As expected, the absolute value of the gain does not match that of the EPICS slider (note that the AD602 has an input impedance of 100 ohms. So the 499 ohm series resistor between TP1 and the input of AD602 makes a 1/5 voltage divider, so the gain seen between TP1 and TP2 has this factor folded in).
    • Moreover, the relative scaling of the gain for various slider values also doesn't appear to be liner.
    • For the highest gain setting of +15 dB, the servo began oscillating, so I think the apparent non-flatness of the gain as a function of frequency is an artefact of the measurement.
    • Nevertheless, my conclusion is that the IC should be changed.

I will pull the board and effect the change later today.

I pulled the board out at 345pm after dialling down all the HV supplies in 1X1. I will reinstall it after running some tests.

Attachment 1: VGAchar.pdf
VGAchar.pdf
  15145   Thu Jan 23 15:32:42 2020 gautamConfigurationComputersMegatron: starts up grade

The burt snapshotting is still not so reliable - for whatever reason, the number of snapshot files that actually get written looks random. For example, the 14:19 backup today got all the snaps, but 15:19 did not. There are no obvious red flags in either the cron job logs or the autoburt log files. I also don't see any clues when I run the script in a shell. It'll be good if someone can take a look at this.

  15147   Thu Jan 23 18:52:31 2020 gautamUpdatePSLPMC RFPD characterization

Summary:

The RF transimpedance of the PMC PDH RFPD was measured, and found to be 1.03 kV/A

Details:

With the new fiber coupled PDFR system, it was very easy to measure the response of this PD in-situ 🎉 . The usual transfer function measurement scheme was used, with the AG4395 RF out modulating the pump current of the diode laser, and the measured transfer function being the ratio of the response of the test PD to the reference PD.

I assume that the amount of light incident on the reference NF1611 photodiode and the test photodiode were equal - I don't know what the DC transimpedance of the PMC REFL photodiode is (can't find a schematic), but the DC voltage at the DC monitor point was 16.4 mV (c.f. -2.04 V for the NF1611). The assumption shouldn't be too crazy because assuming the reference PD has an RF transimpedance of 700 V/A (flat in the frequency range scanned), we get a reasonable shape for the PMC REFL photodiode's transimpedance.

The fitted parameters are overlaid in Attachment #1. The 2f notch is slightly mistuned it would appear, the ratio of transimpedance at f1/2*f1 is only ~10. The source files have been uploaded to the wiki.

Knowing this, the measured PDH discriminant of 0.064 GV/m is quite reasonable:

  • expected optical gain from modulation depth assuming a critically coupled cavity is 0.089 GW/m.
  • Assume 0.7 A/W responsivity for InGaAs.
  • Account for the fact that only 0.8 % of the reflected light reaches the PMC photodiode because of the pickoff window.
  • Account for a conversion loss of 4.5 dB in the mixer.
  • Account for the voltage division by a factor of 2 at the output of the BLP-1.9 filter due to the parallel 50 ohm termination.
  • Then, the expected PDH discriminant is 0.089e9 W/m * 0.7 A/W * 0.8e-2 * 1.03kV/A * 10^(-4.5/20) * 0.5 ~ 0.15 GV/m. This is now within a factor of ~2 of the measured value, and I assume the total errors in all the above assumed parameters (plus the cable transmission loss from the photodiode to the 1X1 rack) can easily add up to this. 

So why is this value so different from what Koji measured in 2015? Because the monitor point is different. I am monitoring the discriminant immediately after the mixer, whereas Koji was using the front panel monitor. The latter already amplifies the signal by a factor of x101 (see U2 in schematic). 

Conclusion:

I still haven't found anything that is obviously wrong in this system (apart from the slight nonlinearity in the VGA stage gain steps), which would explain why the PMC servo gain has to be lower now than 2018 in order to realize the same loop UGF.

So the next step is to characterize the RF transimpedance of the PMC RFPD.

Attachment 1: PDresp.pdf
PDresp.pdf
  15149   Thu Jan 23 22:10:01 2020 gautamUpdatePSLPMC servo pulled out

While I have the board out, I'll try and do a thorough investigation of TFs and noise of the various stages. There is no light into the IFO until this is done.

I pulled the board out at 345pm after dialling down all the HV supplies in 1X1. I will reinstall it after running some tests.

  15152   Fri Jan 24 15:42:08 2020 gautamUpdatePSLPMC servo restored

The PMC servo was re-installed at ~345pm. HV supplies were re-energized to their nominal values. I will update the results of the investigation shortly. The new nominal PMC servo gain is +9dB.

Quote:

While I have the board out, I'll try and do a thorough investigation of TFs and noise of the various stages. There is no light into the IFO until this is done.

I pulled the board out at 345pm after dialling down all the HV supplies in 1X1. I will reinstall it after running some tests.

  15153   Fri Jan 24 17:14:01 2020 gautamUpdateALSGain blocks installed

Jordan will write up the detailed elog but in summary,

  1. Former +24V Sorensen in the AUX OMC power rack (south of 1X2) has been reconfigured to +12V DC.
  2. The voltage was routed to a bank of fusable terminal blocks on the NW corner of 1X1.
  3. An unused cable running to the PSL table was hijacked for this purpose.
  4. The ZHL-1010+ were installed on the upper shelf of the PSL table, the two gain blocks draw a total of ~600mA of current when powered.
Quote:
 

I will install these at the next opportunity, so that we can get rid of the many attenuators in this path (the main difficulty will be sourcing the required +12V DC for operation, we only have +15V available near the PSL table).

  15155   Sun Jan 26 13:30:19 2020 gautamUpdateSUSAll watchdogs tripped, now restored

Looks like a M=4.6 earthquate in Barstow,CA tripped all the suspensions. ITMX got stuck. I restored the local damping on all the suspensions just now, and freed ITMX. Looks like all the suspensions damp okay, so I think we didn't suffer any lasting damage. IMC was re-aligned and is now locked.

Attachment 1: EQ_Jan25.pdf
EQ_Jan25.pdf
  15156   Sun Jan 26 13:47:00 2020 gautamUpdatePSLPMC servo characterization

Summary:

  1. I investigated the stage-by-stage transfer functions of the PMC servo up till the HV stage. See Attachment #1. There were no unexpected features.
  2. I replaced the AD602 used to implement the VGA capability. After the replacement, the gain of the VGA stage had the desired performance, see Attachment #2, Attachment #3.
  3. The servo board was re-installed and the OLTF of the PMC loop was measured. See Attachment #4.

​To avoid driving the PA85 without the HV rails connected, I removed R23. This was re-installed after my characterization.

Input stage:

Since we do the demodulation of the PMC PDH signal off this servo board, the I/F mixer output is connected to the "FP1test" front panel LEMO input.

  • A DG190 is used to enable/disable this path.
  • Initially I tried checking the enable/disable functionality by measuring the resistance across the IC's I/O pins. However, this method does not work - the resistance read off from a DMM varied from ~23 ohms in the "ON" state to ~123 ohms in the "OFF" state. While the former value is consistent with the spec, the latter is confusing.
  • But I confirmed that the switch does indeed isolate the input in the "OFF" state by injecting a signal with a function generator (100 Hz sine wave, 100mVpp) and monitoring the output on an oscilloscope.

Electronic TFs:

Using some Pomona mini-grabbers, I measured the electronic TFs between various points on the circuit. There were no unexpected features, the TFs all have the expected shape as per the annotations on the DCC schematic. I did not measure down to 0.1 Hz to confirm the low frequency pole implemented by U6, and I also didn't measure the RF low pass filter at the input stage (expected corner frequency is 1 MHz). 

VGA characterization:

After replacing the IC, I measured the transfer function between TP1 and TP2 for various values of the control voltage applied to pin 4A on the P1 connector, varying between +/- 5 V DC. 

  • Pin 9A on the P1 connector has to be grounded for the signal to be allowed to pass through the VGA. 
  • Note that there is an overall gain of -1/10 applied to the control voltage between pin 4A and pin #1 of the AD602, which is what actually sets the gain.
  • Furthermore, the input impedance of the AD602 is spec-ed to be 100 ohms. Because of the series resistance of 500 ohms from TP1 to the input of the AD602 (so that the upstream OP27 isn't overdrawn for current), the relation between the control voltage applied to Pin 4A and gain (measured between TP1 and TP2) is modified to G [dB] = 32*(-0.1 * V_pin4A) - 6. 
  • The gain behavior after the IC swap is as expected, both in terms of absolute gain, and the linearity w.r.t. the control voltage.
  • Note that in Attachment #2, each color corresponds to a different control voltage to the AD602, varying from -5V DC to +5V DC in 1V steps. 

PZT Capacitance measurement

I confirmed that the PZT capacitance is 225 nF. The measurement was made using an LCR meter connected to the BNC cable delivering the HV to the PZT, at the 1X1 rack end.

OLTF measurement

After re-soldering R23, I put the board back into its Eurocrate, and was able to lock the PMC. For subsequent measurements, the PSL shutter was closed.

  • I measured the OLTF using the usual IN1/IN2 prescription, implemented with the help of an SR560.
  • At the original PMC Servo gain of +12dB, I found that the feature at ~8kHz results in an OLTF with multiple unity gain crossings.
  • So I lowered it to +9dB. This yields an OLTF with ~60deg phase margin, ~2.3 kHz UGF. 
  • The feature that sets the gain margin is actually not any of the peaks fit by LISO, but is one of the high frequency features at ~40 kHz. At the new setting of +9dB gain, the gain margin is ~10 dB.
  • The measured TF (dots in Attachment #5) was fit with LISO (solid lines in Attachment #5) to allow inferring the out-of-loop servo noise by monitoring the in-loop noise (that plot to follow).
Attachment 1: elecTFs.pdf
elecTFs.pdf
Attachment 2: VGAchar_postFix.pdf
VGAchar_postFix.pdf
Attachment 3: VGAlinearity_postFix.pdf
VGAlinearity_postFix.pdf
Attachment 4: newOLTFs.pdf
newOLTFs.pdf
  15157   Sun Jan 26 14:40:55 2020 gautamUpdateALSALS OOL noise

In preparation for resuming IFO locking activities, I measured the ALS noise with the arm lengths locked to IR, AUX laser frequencies locked to the arm lengths. Looks promising (y-axis units are Hz/rtHz).

Attachment 1: ALSnoise_20200126.pdf
ALSnoise_20200126.pdf
  15159   Mon Jan 27 18:16:30 2020 gautamConfigurationComputersSluggish megatron?

I've also been noticing that the IMC Autolocker scripts are running rather sluggishly on Megatron recently. Some evidence - on Feb 11 2019, the time between the mcup script starting and finishing is ~10 seconds (I don't post the raw log output here to keep the elog short). However, post upgrade, the mean time is more like ~45-50 seconds. Rana mentioned he didn't install any of the modern LIGO software tools post upgrade, so maybe we are using some ancient EPICS binaries. I suspect the cron job for the burt snapshot is also just timing out due to the high latency in channel access. Rana is doing the software install on the new rossa, and once he verifies things are working, we will try implementing the same solution on megatron. The machine is an old Sun Microsystems one, but the system diagnostics don't signal any CPU timeouts or memory overflows, so I'm thinking the problem is software related...

Quote:

The burt snapshotting is still not so reliable - for whatever reason, the number of snapshot files that actually get written looks random. For example, the 14:19 backup today got all the snaps, but 15:19 did not. There are no obvious red flags in either the cron job logs or the autoburt log files. I also don't see any clues when I run the script in a shell. It'll be good if someone can take a look at this.

  15161   Mon Jan 27 21:48:49 2020 gautamUpdatePSLRingdown measurements

It's fine to block the WFS while doing ringdowns but please return the config to normal so I don't have to spend time every night recovering the interferometer before doing the locking. As I mention in that post, it is possible to do this in a non-invasive way without having to run any extra cables / permanently block any beams. If there is some issue with the data quality, then we can consider a new setup. But I see no reason to re-invent the wheel.

The IMC was also massively misaligned. I had to re-align both MC1 and MC2 to recover the lock. I took this opportunity to reset the WFS offsets. Please do not disturb the alignment of the existing optical layout unless you verify that everything is working as it should be after your changes.

And for whatever reason, ITMX was misaligned. If you do something with the interferometer, no matter how minor it seems, please leave a note on the ELOG. It will save many painful debugging hours.

As I fix these, the seismic activity has gone up no. I'll wait around for an hour, but not an encouraging restart to the locking 😢 

Quote:

Zeroth order IMC ringdown

Following Gautam's IMC ringdown setup, I took the the REFL PD form the PMC ringdown experiment and installed it in the IMC REFL path blocking WFS2 (Attachment 1).

Attachment 1: elevatedSeis.pdf
elevatedSeis.pdf
  15163   Tue Jan 28 14:33:24 2020 gautamUpdatePSLInferred free-running frequency noise

To conclude my PMC noise investigations: Attachment #1 shows the PMC noise inferred from the calibrations earlier in this thread and the fitted OLTF for the PMC loop. Attachment #2 compares the frequency noise (inferred from the error point of the PMC servo) when the IMC is locked / unlocked. I don't know what to make of the fact that the PMC suggests improvement from ~20 Hz onwards already - does this mean that the NPRO noise model is wrong by 1 order of magnitude at 30 Hz?

  • The IMC was locked for the measurement shown in Attachment #1.
  • The in-loop spectra of the error (at the I/F output of the mixer) and control (at TP3) signals were measured with the SR785.
  • The control signal voltage monitors don't seem to work - neither the front panel LEMO nor the signals hooked up to the CDS system show me sensible shapes for the spectra between 1-3 Hz.
  • To convert in loop to free-running, I multiplied the measured error (control) signal spectra by \left | 1-L \right | (\left | \frac{L}{1-L} \right |), where L is the OLTF. THe control signal was pre-processed by multiplying by a pole at 11.3 Hz, corresponding to the LPF formed by the 63.3 kohm series resistor and the 225 nF PZT capacitance.
  • The "NPRO noise model" curve is 10^4/f Hz/rtHz.

While I initially thought the 1/f^2 rise below ~100 Hz is attributable to the IMC cavity length fluctuations, I found that this profile is present even in the measurement with the PSL shutter closed. I am not embarking on a detailed PMC noise budgeting project for now. Note however that we are not shot noise limited anywhere in this measurement band.

  • The measured TF (dots in Attachment #5) was fit with LISO (solid lines in Attachment #5) to allow inferring the out-of-loop servo noise by monitoring the in-loop noise (that plot to follow).
Attachment 1: inLoopNoise_IMClocked.pdf
inLoopNoise_IMClocked.pdf
Attachment 2: freqNoiseComparison.pdf
freqNoiseComparison.pdf
  15164   Tue Jan 28 15:39:04 2020 gautamConfigurationComputersSluggish megatron?

There were a bunch of medm processes stalled on megatron (connected with screenshot taking). To see if they were interfering with the other scripts, I killed all of the medm processes, and commented out the line in the crontab that runs the screenshots every 10 mins. Let's see if this improves stability.

  15165   Tue Jan 28 16:01:17 2020 gautamUpdateIOOIMC WFS servos stable again

With all of the shaking (man-made and divine), it was a hard to debug this problem. Summary of fixes:

  1. The beam was misaligned on the WFS 1 and 2 heads, as well as the MC2 trans QPD. I re-aligned the former with the IMC unlocked, the latter (see Attachment) with the IMC locked (but the MC2 spot centering loops disabled).
  2. I reset the WFS DC and RF offsets, as well as the QPD offsets (once I had hand-aligned the IMC mirrors to obtain good transmission).

At least the DC indicators are telling me that the IMC locking is back to a somewhat stable state. I have not yet checked the frequency noise / RIN.

Attachment 1: QPD_recenter.png
QPD_recenter.png
  15167   Tue Jan 28 17:36:45 2020 gautamConfigurationComputersLocal EPICS7.0 installed on megatron

[Jon, gautam]

We found that the caput commands were taking much longer to execute on megatron than on pianosa (for example). Suspecting that this had something to do with the fact that megatron was using EPICS binaries from the shared NFS drive which were compiled for a much older OS, I installed the latest stable release of EPICS on megatron. The new caput commands execute much faster. I also added the local EPICS directory to the head of the $PATH variable used by the MC autolocker and FSS Slow scripts, so that they use the new caput command. But mcup is still slow - maybe my new path definition isn't picked up and it is still using the NFS binaries? To be looked into...

Quote:

There were a bunch of medm processes stalled on megatron (connected with screenshot taking). To see if they were interfering with the other scripts, I killed all of the medm processes, and commented out the line in the crontab that runs the screenshots every 10 mins. Let's see if this improves stability.

  15171   Wed Jan 29 00:27:13 2020 gautamUpdateComputer Scripts / Programsmcup / mcdown modified

To fix the apparent slowness of execution of the caput commands on megatron, I changed the "ewrite" macro in the mcup and mcdown scripts to use ezcawrite instead of caput. The old lines are simply commented out, and can be reverted to at any point if we so desire. After these changes, we saw that both scripts complete execution much faster.

  15172   Wed Jan 29 00:29:43 2020 gautamUpdateLSClocking 2020

The goal tonight was to go through the locking scripts to see if I could recover the state from November 2019, when I could have the arm lengths controlled by ALS, and sit at zero CARM offset with the PRMI remaining locked and the arm powers fluctuating between 0-300. The IR-->ALS transitions went smoothly tonight, and the PRMI locking was also fairly robust when the CARM offset was large, but was less good when reduced to 0. Nevertheless, it is good to know that the system can be restored to the state it was late last year. Next step is to figure out how to keep the PRMI locked and get the AO path engaged, this was what I was struggling with before the new year.

Attachment 1: PRFPMI_2020Jan.png
PRFPMI_2020Jan.png
  15179   Thu Jan 30 17:41:10 2020 gautamUpdatePSLErrant FSS_INOFFSET change

You can trend the data for the past few hours and see what the appropriate value. I think these tests should only be done when whoever is running a test is in the lab.

P.S. I was surprised that the IMC didn't lose lock when this step was applied. I manually stepped this voltage between +/- 10 V and didn't see any response in the FSS readbacks. Either the channel doesn't work, or there is a divide by 40 in the physical circuit or something...

Quote:

A script I was testing errantly set C1:PSL-FSS_INOFFSET => 10 V at about 5:30 pm. I manually reverted the channel value to 0, but I don't know what the value was initially. Someone please check this value if there are problems locking the FSS.

  15181   Fri Jan 31 16:04:30 2020 gautamUpdateIOOInput pointing drift

One factor which hampers locking efforts is the apparent drift of the input beam into the IFO. Over timescales of ~1 hour, I have noticed that the spot on the AS camera drifts significantly (~1 spot size) in pitch. The IPPOS QPD bears out this observation, see Attachment #1. The IMC WFS control signals do not show a correlated drift, hence my claim that the TTs are to blame.

I am able to correct this misalignment by moving TT1 in pitch (see Attachment #2, which shows some signals from a ~1 hour PRMI lock, during which time the pointing drifted, and I corrected it by moving TT1 pitch). Assuming the problem is purely TT1 pitch drifting, this corresponds to 3mm / 6m ~500urad of shift in 1 hour - seems very large. The fact that the drift is only present in pitch and doesn't really show up in yaw makes me think the problem is likely mechanical (unless the voltage to the top two coils is drifting relative to the bottom, but no LR drift, which would be very coincidental). At the moment, this is just an annoyance, but it'd be good for this problem to be fixed.

I haven't yet figured out how to make ndscope export these plots to SVG preserving the dark color theme, hence the weird light axes...

Attachment 1: IPdrift.pdf
IPdrift.pdf
Attachment 2: IPdrift_PRMI.pdf
IPdrift_PRMI.pdf
  15182   Fri Jan 31 16:57:09 2020 gautamUpdateGeneralMetal PMC parts

Jon brought over a box of parts for constructing the metal PMCs. I have stored it along the Y-arm, on top of the green optics cabinet.

I didn't do an exhaustive inventory check, but the following are the rough contents of the box:

  • 41 deg AoI flat mirrors, R=99% @ 1064nm --- 11 pcs
  • 6.8 deg AoI curved mirrors --- 5 pcs
  • PZTs --- 3pcs
  • Metal PMC body --- 2 pcs
  • "Baked PZT endcaps" --- 3 pcs
  • Ball bearings, clamps, misc hardware

I didn't inspect the optics but since we have so many, I am hoping we can find 3 good quality ones for one cavity at least. We should check that the geometry is suitable for our RF sideband frequencies.  

  15185   Tue Feb 4 02:13:02 2020 gautamUpdateLSCLocking updates

Summary:

The CARM-->RF transition remains out of reach. No systematic diagnosis scheme comes to mind.

Details:

  • Config is PRFPMI, SRM is misaligned macroscopically.
  • PRMI can easily be locked with 3f signals while CARM is offset from resonance. Aided by DAFI, I turned on the PR violin filter in the BS output section to prevent it from ringing up, making the lock much more robust.
  • When the CARM offset is reduced
    • POP22 level dips and sometimes goes negative - i don't see this in my simple simulations. POP22 is the trigger signal for MICH/PRCL loops, so to prevent the PRMI lockloss, I mix in some POPDC into the trigger matrix element.
    • Once the circulating power exceeds ~10, the ALS noise apparently increases.
    • The arms "buzz" through resonance, but the power fluctuation is nearly 0-200 in TRX/TRY, corresponding to several CARM linewidths, but all the out-of-loop ALS noise measurements have me believe that we are close to the CARM linewidth in noise. So we should only see ~factor of 2 fluctuation in power.
    • The RF error signal for CARM (=REFL 11) doesn't show any features that i can use to aid the transition / diagnose what is going on systematically.
  • Koji suggested changing the actuation for CARM from MC2 to the ETMs, and check if the MC OSEMs witness the excess motion at small CARM offsets
    • The ALS transition is scripted, so I had to make a modified version that accommodates this changed actuation scheme.
    • The usual CARM-->MC2 matrix element is -1. 
    • The frequency actuation strength of MC2 is ~3x that of the ETMs. Additionally, ETMX has 5x the series resistance of ETMY. So I used the output matrix elements shown in Attachment #1 so as to get the same loop UGF with the same loop gains elsewhere in the chain. Confirmed the actuation strength is the same using the sensing matrix infrastructure and comparing line heights.
    • Attachment #2 shows the measured UGF - both CARM and DARM look okay to me.
  • With this new ALS output matrix actuation scheme, I was able to make it to PRMI + arms on zero offset a couple of times tonight, but the drifting input alignment makes the PRMI lock not so robust anymore.

TBC. Mercifully at least the shaker stayed still tonight.

Attachment 1: modifiedOutMat.png
modifiedOutMat.png
Attachment 2: OLTFs.pdf
OLTFs.pdf
  15188   Wed Feb 5 16:35:12 2020 gautamUpdateLSCDiagnosis plan

The goal is to try and identify the source of the excess ALS noise as the CARM offset is reduced. The idea is to look at the MC_F spectrum (or the IMC error point) in a few conditions:

  1. Regular CARM --> MC2 actuation scheme, PRMI locked on 3f signals, CARM held off resonance.
  2. Regular CARM --> MC2 actuation scheme, PRMI locked on 3f signals, CARM held on resonance.
  3. Alternate CARM --> 7.5*ETMX + 1.5*ETMY, PRMI locked on 3f signals, CARM held on resonance.
  4. Control arms in X/Y basis, lock PRMI on 3f signals and bring the arms into resonance individually, look for excess ALS noise.

#1 vs #2 is like a control experiment, we expect to see the excess noise imprinted on the MC length and hence in MC_F (provided the sensing noise is low enough). #2 vs #3 will be informative of something like backscatter to the PSL increasing the frequency noise. #2/3 vs #4 will help isolate the problem to an individual arm's AUX PDH loop or some optomechanical effect.

I was looking back at some spectra from the last couple of nights but I don't really have an apple-to-apple comparison in the various actuation schemes (some ALS loops were engaged/disengaged), so I'll do a more systematic test tonight. Already, it looks like MC_F is not a good candidate to look for the excess frequency noise, I don't really see a big difference between conditions #1 and #2. According to this, we are looking for an increase at the level of a few 100Hz/rtHz @ ~40 Hz, wheras MC_F is much noisier.

Attachment 1: ALSnoise.pdf
ALSnoise.pdf
  15191   Thu Feb 6 01:16:58 2020 gautamUpdateLSCDiagnosis results

Summary:

I did some more detailed tests to see if I could isolate where the excess ALS noise at low CARM offset is coming from, by measuring the spectrum of the IMC error point (in loop). The results, shown in Attachment #1 and #2, are inconclusive.

Details:

Since MC_F didn't show any signatures of elevated noise, I decided to hook up an SR785 to the A excitation bank TEST1 input of the IMC servo board to monitor the in-loop error signal. I initially took a few measurements spanning 800 Hz in frequency, and to my surprise, I found that there was elevated noise in the frequency band we see an increase in the ALS noise, even when the CARM feedback goes to the ETMs (so the IMC cavity is in principle isolated from the main interferometer). This is Attachment #1. So I re-took a couple of measurements (this time only for the case of CARM feedback to the ETMs), with a 200 Hz frequency span, and found no significant noise elevation. This is Attachment #2. I am led to conclude that the IMC error point level changes over time for reasons other than the CARM offset - it'd be nice to have a spectrogram of the IMC error point and compare excursions relative to the median level over a few 10s of minutes, but we don't have this data stream digitized by the CDS system - maybe I will hijack the MC_L channel temporarily to record this data stream. It seems a waste that we're not able to take full advantage of the measured <10pm RMS noise of the IR ALS system.

Attachment 1: IMCspec_ALS.pdf
IMCspec_ALS.pdf
Attachment 2: IMCspec_ALS_smallSpan.pdf
IMCspec_ALS_smallSpan.pdf
  15192   Thu Feb 6 01:25:50 2020 gautamUpdateLSCLocking updates

Summary:

I managed to partially stabilize the arm citculating powers - they stay in a region in which the REFL 11 signal is hopefully approximately linear and so I can now measure some loop TFs and tweak the transition appropriately. 

Procedure:

The main change I made tonight was to look at the REFL11 signal as I swept the ALS CARM offset through 0. I found that the maximum arm powers coincided with a non-zero REFL11 signal value (i.e. a small CARM offset was required at the input to the CARM_B filter bank). Not so long ago, I had measured the PM/AM ratio for 11 MHz to be ~10^5 - so it's not entirely clear to me where this offset is coming from. Then, I was able to turn on the integrator (z:p = 20:0) in the CARM_B filter bank while maintaining high POP_DC. At this point, I ramped up the IN2 gain on the IMC servo board (= AO path), and was able to further stabilize the power. 

Attachment #shows this sequence from earlier in the evening. Note that in this state, both ALS and IR control of CARM is in effect. The circulating power is fluctuating wildly - partly this is probably the noisy ALS control path, but there is also the issue of the (lack of) angular control - although looking at the transmon QPDs and the POP QPD signals, they seem pretty stable.

The next step will be to try and turn off the ALS control path. Eventually, I hope to transition DARM control to AS55 as well. But at this point, I can at least begin to make sense of some of the time series signals, and get some insight into how to improve the lock.

Quote:

No systematic diagnosis scheme comes to mind.

Attachment 1: semiStableArms.png
semiStableArms.png
Attachment 2: armAngStability.png
armAngStability.png
  15195   Fri Feb 7 02:24:24 2020 gautamUpdateLSCSome short notes

[koji, gautam] 

Plots + interpretation tomorrow.

  • CM_Slow path can be used to stabilize the arm powers somewhat but the AO crossover remains out of reach.
  • The REFL11 (=CARM_B) path offset has to be manually determined - we found that it can change by ~20% depending on the alignment, which maybe isn't surprising given that the mode shapes seen at POP, REFL and AS look like Rorschach inkblots.
  • We saw TRX/TRY regularly hit ~150, and at times even 200 (= recycling gain of ~10). Though any conclusive statement about the PRG can only be made once the lock is stabilized.
  • I was able to take a few CARM loop TFs with an SR785 hooked up at 1Y2. Despite ramping up the AO gain, we saw no effect at high frequencies in the TF shape (the phase bubble continued to roll off at ~100 Hz and there was no visible phase lead even as the AO gain was increased). It has to be estimated what the expected crossover gain is from the experiment with the high BW POY locking (taking into account the net difference in optical gain between POY for single arm and REFL for the full IFO).
  • The fact that I was able to hold the high BW POY lock makes me think that the IMC servo board's IN2 input (and indeed the rest of the IMC locking loop) is functioning as expected. But maybe this board will benefit from a detailed checkout like Koji did for the CM board.

Getting closer... To facilitate this work, I made some convenience scripts that can be run from the CM MEDM screen.

  15199   Fri Feb 7 15:00:16 2020 gautamUpdateLSCMore high BW POY experiments

To study the evilution of the AO path TFs a bit more, I've hooked up POY11_Q Mon to IN1 of the CM board. I will revert the usual setup later in the evening.

Update 1730: I've returned the cabling at 1Y2 to the nominal config, and also reverted all EPICS settings that I modified for this test. Y-arm POY locking works. Attachment #1 shows the summary of the results of this test - note that the AO gain was kept fixed at +5dB throughout the test. I have arbitrarily trimmed the length of the frequency vector for some of these traces so that the noisy measurement doesn't impede visual interpretation of the plots so much. At first glance, the performance is as advertised. I basically followed the settings I had here to get started, and then ramped up various gains to check if the measured OLTF evolved in the way that I expected it to. The phase lead due to the AO path is clearly visible.

Some important differences between this test and the REFL11 blending is (i) in the latter case, there will also be a parallel loop, CARM_A, which is effecting some control, and (ii) the optical gain of CARM-->REFL11_I is much higher than L_Y-->POY. So the initial gain settings will have to be different. But I hope to get some insight into what the correct settings should be from this test. I think IMC servo IN2 gain and AO gain slider on the CM board are degenerate in the effect they have, modulo subtle effects like saturation.

One possibility is that the gain allocation I used yesterday was wrong for the dynamic range of the CARM error signal. In some initial trials today, when I set the CM board IN1 gain to -32dB (as in the case of attempting the CARM RF handoff) and compensated for the reduced POY PDH fringe amplitude by increasing the digital gain for the CM_Slow path, I found that there was no phase advance visible even when I ramped up the IMC IN2 gain to +10dB. So, for the CARM handoff too, I might have to start with a higher CM board IN_1 gain, compensate by reducing the CM_Slow digital gain even more, and then try upping the IMC IN2 gain.

P.S. When the excitation input to the CM board was enabled in order to make TF measurements, I saw significant increase in the RMS of the error signal. Probably some kind of ground loop issue.

Attachment 1: AO_TFs.pdf
AO_TFs.pdf
  15202   Mon Feb 10 10:07:20 2020 gautamUpdatePSLPMC re-locked

I found the PMC unlocked this morning. It was re-locked using the usual procedure. I feel like this has been happening more frequently in the last month than before. In the past, the cause seems to have been the PZT voltage drifting too close to one of the rails - however, in this case, it looks like an IMC unlock event is what triggered the PMC lockloss (admittedly the PZT voltage was somewhat close to the rail). It would be good if someone can re-connect the PMC Transmission photodiode, it was a useful diagnostic channel we had working fine before the ringdowns started.

I also tweaked the input pointing into the PMC and ran the WFS DC offset relief script.

Attachment 1: PMCunlock.png
PMCunlock.png
  15208   Wed Feb 12 12:13:37 2020 gautamUpdateLSCAO path attempts

Summary:

  1. The PRFPMI can be controlled by a mix of ALS and RF signals and circualting arm powers > 100 can be maintained for several tens of minutes at a stretch.
  2. The complete RF handoff still cannot be realized - I need to study the AO path crossover more carefully to understand what exactly is wrong and what needs to be done to rectify the problem.

Measurements:

Over the last couple of days, I've been trying to see if I can measure the phase advance due to the AO path - however, I've been unable to do so for any combination of CM board IN1 gain and MC Servo board IN2 gain I've tried. Yesterday, I tried to understand the loop shapes I was measuring a little more, and already, I think I can't explain some features.

Attachment #1 shows the TF measured (using SR785, and the EXC_A bank of the CM board) when the CM Slow path has been engaged.

  • All CARM control in this state is digital.
  • For the CM Slow path, the digital filter includes a pole at 700 Hz, pole at 5 kHz and zero at 120 Hz (the latter two for coupled cavity pole compensation).
  • In this conditions, the arm powers are somewhat stable at ~150, but still there are fluctuations of the order of 50%.
  • The "buzzing" as the arms rapidly go in and out of resonance is no longer present though.
  • The UGF of the hybrid REFL11+ALS loop is ~200 Hz, with ~45 deg of phase margin.
  • Turning off the MC2 violin filters gives some phase back. But I don't really understand the flattening of the TF gain between ~250-500 Hz.

Attachment #2 shows error signal spectra for the in-loop PRFPMI DoFs, for a few different conditions.

  • Engaging the REFL11 digital path smooths out the excess noise in the ~30-50 Hz band, which is consistent with the fact that the arm powers stabilize somewhat.
  • However, there is some gain peaking around ~400 Hz.
  • This is in turn imprinted on the vertex DoFs, making the whole system's stability marginal.

I believe that a stable crossover is hopeless under these conditions.

Next steps:

  1. Account for the measured OLTF, understand where the flattening in the few hundred Hz region is coming from.
  2. Repeat the high BW POY experiments, but with the simulated coupled cavity pole - maybe this will be a closer simulation to the PRFPMI transition.
Attachment 1: CARM_OLTF.pdf
CARM_OLTF.pdf
Attachment 2: PRFPMI_errSigs.pdf
PRFPMI_errSigs.pdf
  15209   Thu Feb 13 01:47:39 2020 gautamUpdateALSFast ALS - delay line prep

A few years ago, Koji and I setup a delay line phase shifter, which can be used to impart a (switchable) delay to a signal path. Since we talked about reviving the fast (= high bandwidth) ALS control scheme at the meeting, I reminded myself of the infrastructure available.

  • Schematic
  • Comprehensive note on theory of operation / performance.
  • Past elog threads - #11603 and #11604.
  • Attachment #1 - my modification to the ALS screen to add a slider that controls the channel C1:LSC-BO_1_0_SET. The label is a bit misleading for now - elog11604 tells you the conversion between this slider value and the actual delay in nanoseconds, but I couldn't get a soft channel set up that correctly FLNKed to this record. In the process of trying to do so, I edited the C1_ISC-AUX_ALS.db file, and also restarted the modbus and latch processes on c1iscaux a few times.
  • Attachment #2 - frequency dependent loss for some representative delays. At ~200 MHz, I find the measured loss to be > 8dB, which is ~2dB more than what the D. Sigg note tells me to expect. This is rather a lot of loss, but I guess it's okay. Measurement cable loss was calibrated out with the AG4395A.
  • Attachment #3 - confirmation of constantness of delay as a function of frequency, for some representative delays. The "undelayed" setting corresponds to a fixed delay of ~4 nsec, which is consistent with what the D. Sigg note tells me to expect. Once again, I calibrated out the delay of the measurement setup using the AG4395A.

For a beat note in the regime 10-100 MHz, we should have plenty of range in this module to add a delay such that we zero one quadrature of the ALS DFD output (for a linear error signal). 

I then proceeded to connect the single-ended front panel BNC corresponding to the ALS_X_I DFD channel to the IN2 input of the CM board (this would be what we use for high bandwidth ALS feedback). The conventional ALS system uses the differential output from a rear-panel D-sub, so in principle, both systems could run in parallel. I confirmed that I could see a signal when the IN2 path on the CM board was engaged (monitored using ndscope at the CM_Slow output), and that this signal stabilized when the green laser was locked to the X-arm length, which itself was slaved to the PSL frequency using the usual POX locking scheme. I have not yet routed the LO leg of the ALS_X beat through the delay line phase shifter - see next elog for details.

Update about the ALS MEDM screen slider: the trick was to change the OMSL field of the C1:LSC-BO_1_0 channel to "closed_loop" instead of "supervisory". Once this is done, the DOL value of the same channel can be set to the soft channel C1:ALS-DelayCalc, which sets the 16 bit binary string that controls the delay. Because arbitrary delays are not possible, I think it's more natural for the user to interact with this 16-bit binary string rather than the actual delay itself. So the MEDM screen has been slightly modified from what is shown in Attachment #1.

Attachment 1: delaySlider.png
delaySlider.png
Attachment 2: delayLineLosses.pdf
delayLineLosses.pdf
Attachment 3: delayLineCal.pdf
delayLineCal.pdf
  15210   Thu Feb 13 02:07:26 2020 gautamUpdateLSCAO path transfer function measurement

Summary:

I measured the transfer function of the AO path, and think that there are some features indicative of a problem somewhere in the IMC locking loop.

Details:

Regardless of the locking scheme used, high bandwidth control of the laser frequency relies on the fact that the laser frequency is slaved to the IMC cavity length with nearly zero error below ~50 kHz (assuming the IMC loop has a UGF > 100 kHz). In my single arm experiments, I didn't know what to make of the ripples that became apparent in the measured OLTF as the AO gain was ramped up.

Tonight, I measured the TF of the "AO path", which modifies the error point of the IMC, thereby changing the laser frequency. 

  • An SR785 was used to make the measurement.
  • The signal was injected at the "EXC B" input on the CM board.
  • The CM_SLOW path was disabled, AO gain = 0dB, IMC IN2 gain = 0dB.
  • Between "EXC B" and the IMC error point (which I measured at TP1A on the IMC board), we expect that there are 2 poles at ~ 6 Hz, and one pole at ~ 11 Hz.

Attachment #1 shows the result of the measurement. 

  • This measurement should be the "Closed Loop Gain" [= 1/(1+L) where L is the open loop gain] of the IMC locking loop. For comparison, I've overlaid the inferred CLG from a measurement of the IMC OLG I made in Jun 2019. The magnitude lines up quite well, but the phase does not 🤔 
  • Above 10 kHz, the measurement is as I expect it to be.
  • However, between 1 kHz and 10 kHz, I see some periodic features every 1 kHz, which I don't understand. In the IMC OLTF, these would be sharp dips in the OLTF gain.
  • I was careful not to overdrive the servo, so I believe these features are not a measurement artefact.
  • Combing through past elogs, I couldn't really find any measurements of the IMC OLTF in the 1 kHz - 10 kHz band.
  • I decided to measure the spectrum of the IMC error point (with no excitation input), to see if that offered any additional insight. Attachment #2 shows the result - again, periodic features at ~ 1 kHz intervals.

I didn't use POX / POY as a sensor to confirm that this is real frequency noise, I will do so tomorrow. But it may be that realizing a stable crossover is difficult with so many features in the AO path.

Previous thread with a somewhat detailed characterization of the IMC loop electronics.

Attachment 1: AOpathTF.pdf
AOpathTF.pdf
Attachment 2: IMCinLoop.pdf
IMCinLoop.pdf
  15212   Fri Feb 14 00:53:50 2020 gautamUpdateALSFast ALS - more setup

In the process of setting up some cabling at 1Y2, I must've bumped a cable to the c1lsc expansion chassis. Anyways, the c1lsc models crashed. I ran the reboot script around 530pm PDT. Usual locking behavior was recovered after this. The work at 1Y2 was:

  • Ran a cable from X Beat power splitter ("LO" leg of the analog delay line) to variable delay line. 
  • Ran cable from delay line to demodulator's LO input.
  • Set up the SR785 for some CM board TF measurements.

The IN2 to CM board was already connected to I single ended output of the ALS X demodulator. The ~100 Hz UGF digital locking using the CM_SLOW path is straightforward but I didn't have any success with the AO path tonight. I wonder how high BW this lock can be made without injecting a ton of noise into the IMC loop, given that the EX uPDH only has ~ 10 kHz UGF.

Attachment #1 shows the spectra of the ALS signal 

  • The two "CM Slow" traces are the digitized "SLOW" output of the common mode board, whose IN2 is connected to the demodulated I output of the analog delay line.
  • The delay in the LO line of the analog delay line is adjusted to zero the DC value of this signal to best effort.
  • These spectra are measured with the arm cavities POX/POY locked, and the EX laser locked to the arm cavity using the end PDH box.
  • I simultaneously monitor the output of the digital phase tracker servo, and scale the CM Slow signal such that the spectra line up. The scaling factor required was to multiply the CM_SLOW signal x10 (CM board IN2 gain was set to +6dB, to account for the x2 gain in going from single ended to differential inside the ALS demodulator box).
  • One puzzline feature is why switching on the ADC whitening makes the ALS spectrum noisier (even though it clearly changes the digitization noise floor). There is a peak that appears at ~ 8 kHz with the whitening on, and it may also be downconverted noise from some peak at higher frequencies I guess (if the AA isn't sharp enough). 

Attachment #2 is an OLTF measurement.

  • In the blue trace, the arm length is controlled by using the CM Slow signal as an error signal, applying feedback to IMC length via MC2.
  • In the red trace, I turned the digital MC2 violin notches off, and added upped the IMC IN2 gain to -12 dB (AO gain slider = 0dB).
  • This was as high as I could go before the PC drive RMS began to go crazy.
  • But still, there isn't any significant phase advance.
  • It is possible I need to tack on a low-pass filter to prevent noise injection at higher frequencies...
Attachment 1: CMSlow_ALSnoise.pdf
CMSlow_ALSnoise.pdf
Attachment 2: OLTFmeas.pdf
OLTFmeas.pdf
  15214   Fri Feb 14 14:52:41 2020 gautamUpdateALSALS OOL noise with arms locked

Unlikely, the alignment was probably just not good. I restored the alignment and now the arms can be locked to IR frequency.

Quote:

Even though we were not able to lock the the IR beat (by enabling LSC) during the day possibly because of increased seismic activity

  15227   Wed Feb 26 22:05:06 2020 gautamUpdateIOOIMC checks

Today, I did the following tests (and so was touching electronics/cables at/around 1X2):

  • Measured the IMC OLTF.
  • Measured the TF from injection at IN2 to response at the IMC error point (T-eed the I out of the IMC demodulator as there is no longer a monitor point available).
  • Measured the IMC in loop error signal with 0.25 Hz resolution from DC-2kHz.
  • Confirmed that the IMC IN2 (a.k.a. AO path) gain slider performs as advertised. This is a useful test to run post Acromag switchover on Friday.

Results to follow.

After this work, I reverted the EPICS channels to the usual values. The IMC can be locked.

  15228   Wed Feb 26 22:09:52 2020 gautamSummaryBHDProjected IFO noise budget, post-BHD upgrade

The quantum noise curves here are not correct. c.f. amplitude quadrature noise budget.

  15229   Wed Feb 26 23:50:51 2020 gautamUpdateIOOIMC checks

In the style of the KA characterization of the CM board, the AO path gain EPICS slider (IN2) of the IMC servo board was stepped by 1 dB through the full available range of -32 dB to +31 dB. For each value of the requested gain, I measured the TF from the injected signal (to IN2) to TP1A on the IMC servo board. I used the BNC connector for this test, whereas we use the LEMO connector for the AO path. The source was tee-d off at the SR785 side, with one leg going to IN2 of the IMC servo board, and the other going to CH1A of the SR785. TP1A of the IMC board was connected to CH2A of the SR785. 

Attachment #1 - Measured gain vs requested gain.

  • When debugging the CM board, it was this kind of test that revealed the faulty latch ICs.
  • -12 dB to -11 dB gain step looks anomalous, but overall the trend seems linear.
  • I was confused by why there should be a discontinuity at this stage of the gain stepping - seems like the scanning script I use changes the SR785 excitation amplitude at this point (from 300mV to 100mV). But why should the size of the excitation signal change the magnitude of the transfer function? Is this indicative of some loading issue?
  • There is an overall offset between the requested gain and measured gain of ~2-3 dB. This seems large.
  • There is nothing in the schematic which would have me expect this - there is a 1/2 divider at the positive input of the differential receiving stage, but this just cancels out the non-inverting gain of x2.

Attachment #2 - Frequency dependent transfer functions

  • There seem to be two families of curves - they correspond to <-12 dB and >-12 dB.
  • The feature at 90 kHz is strange - need to look at the schematic to see what this could be.

The motivation here is to try and figure out why I cannot engage the AO path smoothly in the CARM handoff part of lock acquisiton. I plan to use this information to do some loop modeling and project laser frequency noise coupling in various stages of the lock acquisition process.

Attachment 1: sliderCal.pdf
sliderCal.pdf
Attachment 2: AO_inputTFs.pdf
AO_inputTFs.pdf
  15230   Thu Feb 27 15:50:37 2020 gautamUpdateElectronicsFSS box power cable removed

In 1X1, there is a box labelled "FSS REF" below a KEPCO HV supply. This box had a power cable that wasn't actually connected to any power. I removed said cable.

  15231   Thu Feb 27 17:50:36 2020 gautamUpdatePSLc1psl setup setup

[many people]

in prep for the install tomorrow, we did the following:

  • Install the c1psl Supermicro in the 1X2 rack (Attachment 1). To make room we removed the anti-image filter and mounted it on the OMC rack.
  • Set up a local workstation (monitor+mouse+keyboard) for the Supermicro so we can do some local testing (Attachment 2).
  • Clear up the immediate area around the 1X1/1X2 rack, setup a cart for the Acromag.
  • Make sure there are sufficient adaptor boards cables (DB37, DB15, DB9, DB25, ethernet) etc available at the cart.
  • Label cables, connect on Acromag chassis end (Attachment 3).
  • Keep some large (A3) printouts of the channel mapping handy by the cart.
  • made sure we have open fuse-able DIN rail connectors for +/-15 V DC and +/-24 V DC for the Acromag box (we are waiting on some thinner gauge cabling for the 24V supply, once that arrives, we will power the box from the Sorensens. For now, they are powered by bench supplies on the cart).
  • made sure c1psl1 (still this name for the Supermicro) is ssh-able.

Barring objections, tomorrow (Friday 28 Feb 2020) morning I will commence the switch (I still want to work on the IFO tonight).

Attachment 1: 20200227_173535.jpg
20200227_173535.jpg
Attachment 2: 20200227_173454_HDR.jpg
20200227_173454_HDR.jpg
Attachment 3: 20200227_172659.jpg
20200227_172659.jpg
  15232   Thu Feb 27 17:59:02 2020 gautamUpdateLSCSome AO thoughts

While my checks of the AO signal path have thrown up some unanswered questions, I don't think there's any evidence in those measurements to suggest the AO crossover can't be realized. Thinking about it today though - I was wondering if it could be that the IN1 gain slider of the CM board is configured optimally. Looking back at some data, when the ALS CARM offset is zeroed, the CM_SLOW digitized data has a peak-to-peak range of ~200 cts. This is paltry. One possibility is that as I am upping the AO path gain, I'm simply injecting the electronics noise of the CM board into the IMC error point. I'd say it is safe to up the IN2 gain by 20dB to -12 dB, in which case the peak-to-peak would be ~2000 cts, still only 10% of the ADC range. It'll be straightforward to re-scale the CARM_B loop gain to account for this. Let's see if this helps.

I'd also like to measure the spectrum of the REFL11_I signal in a few different states. I think I should be able to do this using the OUT2 of the CM servo board. These are the things to try tonight:

  • Try CARM RF handoff with CM_SLOW gain starting at -12dB instead of -32dB.
  • Measure spectrum of REFL11_I when it is in the linear range.
  15233   Thu Feb 27 22:45:40 2020 gautamUpdateALSALS noise high

There was some UNELOGGED work at EX today. The DFD outputs were also hijacked for loss measurement. Unclear who the culprit was, but there is now a broad noise bump centered around ~180 Hz in the ALS X noise curve, which certainly wasn't there yesterday. Maybe let's keep the few working systems working, it is annoying to have to deal with these auxiliary issues every night. I'll push ahead with locking, hopefully the ALS noise is "good enough".

Attachment 1: ALSnoise.pdf
ALSnoise.pdf
  15234   Fri Feb 28 08:05:22 2020 gautamUpdatePSLc1psl setup setup

And so it begins.

Quote:

Barring objections, tomorrow (Friday 28 Feb 2020) morning I will commence the switch

  15235   Fri Feb 28 10:04:41 2020 gautamUpdatePSLc1psl setup setup

Summary:

There are several problems evident already.

  1. Several EPICS database entries were missing. WTF.
  2. After fixing the missing entries, the PMC could be locked. However, the IMC could not be locked.
  3. I think the FSS Interface card is not configured correctly.

For now, I've returned the old c1psl connections, the PMC and IMC are both locked. Need to do some debugging on the bench.

  15236   Fri Feb 28 19:37:18 2020 gautamUpdatePSLNew c1psl installed
  1. The new c1psl Acromag crate is now interfaced to the Eurocrate electronics in 1X1 (formerly VME c1psl) and 1X2 (formerly c1iool0).
  2. The PMC and IMC can be locked. We will investigate stability / duty cycle over the weekend.
  3. There were a few issues with the wiring - specifically, the worng kind of Acromag BIO unit (sourcing, whereas we want sinking) was used for the FSS board switches. Once Jordan fixed this issue, the IMC could be locked.
  4. I began to do the detailed tests of the IMC Servo card channels - there may be some issues with the boost stages, but I ran out of time yesterday, so tbc Monday.

On Monday, we will remove the old c1psl and c1iool0 machines from the electronics rack and install the Acromag crate in a more permanent way. We will also clean up some of the old cabling and cross connects, althoug the situation seems so complicated (some cross connects are also used by the rtcds c1ioo expansion chassis) that I am inclined not to remove any cables.

The area around 1X1/1X2 has a lot of dangling cables and general detritus. Be careful if you are walking around there. We will clean up on monday.

  15237   Mon Mar 2 16:14:47 2020 gautamUpdateCDSsome target directory cleanup

$TARGET_DIR = /cvs/cds/caltech/target

  • $TARGET_DIR/c1psl and $TARGET_DIR/c1iool0 moved to $TARGET_DIR/preAcromag_oldVME/
  • $TARGET_DIR/c1psl1 moved to $TARGET_DIR/c1psl 
  • $TARGET_DIR/c1psl/*.service and $TARGET_DIR/C1_PSL.cmd modified - i executed :%s/c1psl1/c1psl/g in vim.
  • $TARGET_DIR/preAcromag_oldVME/c1psl/autoBurt.req and $TARGET_DIR/preAcromag_oldVME/c1iool0/autoBurt.req catenated into $TARGET_DIR/c1psl/autoBurt.req. The first snapshot at 16:19 has been verified.

It remains to (Jon is taking care of these)

  • add a line to modbusIOC.service on the new c1psl machine that restores the latest burt snapshot on startup (this necessitated installation of a debian jessie libXp6 package on our debian buster machine because our shared EPICS is soooooooooooooo oooooooold)
  • change the hostname from c1psl1 to c1psl
  • update martian.hosts
  15238   Mon Mar 2 16:29:40 2020 gautamUpdateElectronicsc1psl VME crate removed, Acro-crate installed

[JV, JWR, YD, GV]

  • The old c1psl VME crate, and all the ribbon cables connected to it were removed from 1X1. They are presently dumped in the office area - we will clear these in the next few days, once the c1iool0 crate also gets removed from the rack.
  • The Acromag crate was capped on the top and bottom, had ears bolted on, and was installed on support rails in the newly cleared up space.
  • The strange orientation of the crate (with the intended backside facing the front of the rack) is to facilitate easy access to the "spare" channels we have in this box, e.g. for a future ISS or laser amplifier.
  • Remaining connections to make are (these will be done tomorrow along with the extrication of the c1iool0 VME crate):
    • PMC trans PD
    • FSS RMTEMP 
    • PSL shutter
    • 2W Mephisto diagnostic connector
    • 24 V DC from Sorensens via DIN connector (we are waiting on a new power cable to arrive).
Attachment 1: c1psl.pdf
c1psl.pdf
  15239   Mon Mar 2 16:35:12 2020 gautamUpdateCDSc1psl test status

Channel list with test status
== Test Status ==

[done] Lock PMC and IMC
[done] IMC Servo board test
[done] IMC LO Det Mon channel check
[0th order] WFS quadrant DC mon
[none] WFS I/F monitors
[0th order] WFS attenuators
[none] IOO QPD channels
[done] FSS readbacks 
[done] PMC readbacks


Some more detailed elogs about the individual tests will follow.

Basically, I have characterized the IMC Servo board in detail. The summary finding is that the IN2 (=AO gain) slider needs to be investigated. 

All other channels need to be verified in a more thorough fashion than my basic checks which were just to guarantee the core interferometer functionality, which is important to me.

  15240   Mon Mar 2 19:32:41 2020 gautamUpdateCDSc1rfm errors

Had to reboot both end machines and the c1rfm model to get the TRX and TRY signals to the LSC models. Now both arms can be locked using POX/POY respectively.

Attachment 1: RFMerrors.png
RFMerrors.png
  15242   Tue Mar 3 17:20:14 2020 gautamUpdateElectronicsMore cabling removed

Jordan and I removed another 10 kg of cabling from 1X2. The c1iool0 crate now has all cabling to it disconnected - but it remains in the rack because I can't think of a good way to remove it without disturbing a bunch of cabling to the fast c1iool0 machine. We can remove it the next time the vertex FEs crash. Cross connects have NOT been removed - we will identify which cross connects are not connected to the fast system and trash those. 

Do we want to preserve the ability to use the PZT driver in 1X2?

  15245   Tue Mar 3 19:11:48 2020 gautamUpdateLSCSome locking prep
  • Re-aligned and locked the arm cavities for IR and green.
  • Re-set trans normalization because after the c1iscex and c1iscey reboots, these didn't come back to the old values.
ELOG V3.1.3-