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  11631   Tue Sep 22 02:11:17 2015 ranaSummaryComputer Scripts / ProgramsFrequency counting algorithm

I was going to suggest using a software PLL, but perhaps averaging gives the same result. The same ADC signal can be fed to multiple blocks with different averaging times and we can just use whichever ones seems the most useful.

  11629   Mon Sep 21 23:18:55 2015 ericqSummaryComputer Scripts / ProgramsFrequency counting algorithm

I definitely think lowpassing the output is the way to go. Since this frequency readback will be used for slow control of the beatnote frequency via auxillary laser temperature, even lowpassing at tens of Hz is fine. The jitter doesn't mean its useless, though.

If we lowpass at 16Hz, we're effectively averaging over 1024 samples, bringing, for example, a +-2kHz jitter of a 6kHz signal as you post down to 2kHz/sqrt(1024) ~ 60Hz, which is 1% of the carrier. This seems ok to me. 

  11628   Mon Sep 21 18:31:06 2015 gautamSummaryComputer Scripts / ProgramsFrequency counting algorithm

I have been working on setting up a frequency counting module that can give us a readout of the beat frequency, divided by a factor of 2^14 using the Wenzel frequency dividers as described here. This is a summary of what I have thus far.

The algorithm, and simulink model

The basic idea is to pass the digitized signal through a Schmitt trigger (existing RCG module), which provides some noise immunity, and should in theory output a clean square wave with the same frequency as the input. The output of the Schmitt trigger module is either 0 (for input < lower threshold value) and 1 (for input greater than the high threshold value). By differencing this between successive samples, we can detect a "zero-crossing", and by measuring the time interval between successive zero crossings, we can take the reciprocal to get the frequency. The last bit of this operation (i.e. measuring the interval) is done using a piece of custom C code. Initially, I was trying to use the part "GPS" from CDS_PARTS to get the current GPS time and hence measure intervals between successive zero-crossings, but this didn't work out because the output of GPS is in seconds, and that doesn't give me the required precision to count frequency. I tried implementing some more precision timing using the clock_gettime() function, which is capable of giving nanosecond precision, but this didn't work for me. So I am now using a more crude way of measuring the interval, by using a counter variable that is incremented each time a zero-crossing is NOT detected, and then converting this to time using the FE_RATE macro (=16384). In any case, the ADC sampling rate limits the resolution of frequency counting using zero-crossing detection (more on this later). Attachment 1 shows the SIMULINK block diagram for this entire procedure.

Testing the model

I implemented all of this on c1tst, and followed the steps listed here to get the model up and running. I then used one of the DB37 breakout boards to send a signal to the ADC using the DS345 function generator. Attachment 2 shows some diagnostic plots - input signal was a 2.5Vpp (chosen to match the output from the Wenzel dividers) square wave at 2kHz:

  • Bottom left: digitized version of the input signal - I used this to set the upper and lower thresholds on the Schmitt trigger at +1000 counts and -1000 counts respectively.
  • Top left: Schmitt trigger output (red trace) and the difference between successive samples of the Schmitt trigger output (blue trace - this variable is used to detect a zero crossing)
  • Top right: Counter variable used to measure intervals between successive zero crossings, and hence, the frequency. The frequency output is held until the next zero crossing is detected, at which time counter is reset
  • Bottom right: frequency output in Hz.

The right column pointed me to the limitations of frequency counting using this method - even though the input frequency was constant (2kHz), the counter variable, and hence the frequency readout, was neither accurate nor precise. But this was to be expected given the limitations imposed by ADC sampling? We only get information of the state of the input signal once within each sampling interval, and hence, we cannot know if a zero crossing has occurred until the next sampling interval. Moreover, we can only count frequency in discrete steps. In attachments 3 and 4, I've plotted these discrete frequencies which can be measured - the error bars indicate the error in the frequency readout if the counter variable is 1 more or less than the "true" value - this can (and does) happen if the high and low times of the Schmitt trigger are not equal over time (see top left plot in Attachment 2, its not very obvious, but all the "low" times are not equal, and so, the interval between detected zero crossings is not equal). This becomes a problem for small values of the counter variable, i.e. at high input frequencies. I was having a look at the elogs Aidan wrote some years ago for a different digital frequency counting approach, and I guess the conclusion there was similar - for high input frequencies, the error is large. 

I further did two frequency sweeps using the DS345, to see if I could recover this in the frequency readout. Attachments 5 and 6 show the results of these sweeps. For low frequencies, i.e. 100-500 Hz, the jitter in the readout is small (though this will be multiplied by a factor of 2^14), but by the time the input frequency gets up to 2kHz, the jitter in the readout is pretty bad (and gets worse for even higher frequencies.

Bottom line

Some refinements can be made to the algorithm, perhaps by introducing some averaging (i.e. not reading out frequency for every pair of zero crossings, but every 5) which may improve the jitter in the readout, but I would think that the current approach is not very useful above 2kHz (corresponding to ~30MHz of pre-divider frequency), because of the limitations shown in attachments 3 and 4. 

Attachment 1: Simulink_model.pdf
Simulink_model.pdf
Attachment 2: diagnostic_plots.pdf
diagnostic_plots.pdf
Attachment 3: Error_high_frequency.pdf
Error_high_frequency.pdf
Attachment 4: Error_low_frequency.pdf
Error_low_frequency.pdf
Attachment 5: Frequency_sweep_100_500_Hz.pdf
Frequency_sweep_100_500_Hz.pdf
Attachment 6: Frequency_sweep_100_2000_Hz.pdf
Frequency_sweep_100_2000_Hz.pdf
  11627   Mon Sep 21 15:22:19 2015 jamieUpdateDAQworking on new fb replacement

I've been putting together a new machine that Rolf got for us as a replacement for fb.

I've installed and configured the OS, and compiled daqd and the necessary supporting software.  I want to try acquiring data with it.  This will require removing the current/old fb from the DAQ network, and adding the new machine.  It should be able to be done relatively non-invasively, such that none of the front end configuration needs to be adjusted, and the old fb can be put back in place easily.

If the test is successfully, then I'll push ahead with the rest of the replacement (such as either moving or copying the /frames RAID to the new machine).

I will do this work in the early AM tomorrow, September 22, 2015.

  11626   Mon Sep 21 11:40:30 2015 ericqUpdateGeneralMegatron maitenence

The MC autolocker and FSSslow scripts weren't running on Megtron. These were started by running the following commands on megatron:

sudo initctl start MCautolocker
sudo initctl start FSSslow

The new autoburt cronjob was failing because the .cron file was not executable (fixed by chmod +x burtnew.cron), and the new perl script didn't use the full path for ifconfig. Similarly, the simulink webview updating script was failing because the full path for matlab wasn't being given. Both of these fixes have been tested and commited to SVN. 

In general, cron scripts can be a real pain, since the cron process doesn't run our .bashrc, and so doesn't know about updates to $PATH, or other environment vairables that get updated through /ligo/cdscfg/workstationrc.sh, which is called by .bashrc. So something that manually works fine in the terminal may not play out as expected when run by cron.

  11625   Mon Sep 21 11:12:14 2015 SteveUpdateVACcold cathode is flaky

CC4 cold cathode gauge jump triggered interlock to close VM1 valve to protect the RGA.

The IFO pressure is 1e-5 Torr

Vac normal was recovered by opening VM1

 

Attachment 1: cc4jumps.png
cc4jumps.png
  11624   Mon Sep 21 00:51:36 2015 ranaUpdateGeneralop340m, autoburt cron =? megatron

I modified the perl script which does our hourly autoburt so that it can run on megatron instead of op340m (old Solaris machine). Nothing major, just some path stuff. That was the last function of op340m that I know of, so after a week of watching this we ought to be able to power it off and send it to e-waste.

Seems to work so far. It complains about some models that aren't running but mostly it reports successful snapshot taking based on the .req files.

Unfortunately, it seems that its only doing the new target directory, so its missing all of our old VME machines which still use the /cvs/cds/caltech/target area.

But I think Gautam and Jamie and Aidan have volunteered to start our slow controls upgrade by moving the EX slow controls to Acromag and into the new target area. We ought to modify the CRON to point at the old directory for now, but its a temporary fix hopefully.

  11623   Fri Sep 18 19:19:49 2015 ranaFrogsComputer Scripts / Programsremote data access: volume 1, Inferno

NDS2 restarted after hours long upgrade process; testing has begun. Let's try to get some long stretches of MC locked with MCL FF ON this weekend so's I can test out the angular FF idea.

  11622   Fri Sep 18 19:15:35 2015 ranaUpdateLSCFast ALS troubles - Noise at 36kHz

One the Wiki (https://wiki-40m.ligo.caltech.edu/40mHomePage), we have a Mech Resonance page for mechanical frequencies and a PEM page where we want to list the sources of all of our environmental lines. So please put in an entry when you find out what's at this frequency. This reminds me that I need to upload my MC2 COMSOL eigenmode analysis.

  11621   Fri Sep 18 16:08:41 2015 ericqUpdateLSCFast ALS troubles - Noise at 36kHz

 I looked at REFL11 and REFL55 during PRMI lock - the line is there.

In fact, it is even visible in REFL11 I from a single bounce off of the PRM (ITMs misaligned).

This led me to look at the IMC error point (via the OUT2 on the servo board, no compensation for the input gain). Also there!

Attachment 1: PRMIlock_REFLspectra.pdf
PRMIlock_REFLspectra.pdf
Attachment 2: IMCspectrum.pdf
IMCspectrum.pdf
  11620   Fri Sep 18 13:33:17 2015 ericqUpdateLSCFast ALS troubles - Noise at 36kHz

To get around the problems between the pomona LPF and low CM board input impedance, I've placed the LPF at the CM board fast output. This won't work as a permanent solution, since we only want to lowpass the ALS signal, but it should be fine for a single arm test. 

However, I kept getting blown out of lock when turning up the AO gain, but well before I really expect any real action from the fast path. Looking at the OLTF, I was seeing some large spike at ~36kHz nearing 0dB loop gain with unstable phase. This prompted me to look at the ALS error signal out to higher bandwidth with the SR785; before I only ever looked at it through the digital system. 

So, with the X arm locked via POX11 I, and ITMY misaligned to use AS55 as an out of loop sensor, I measured the spectrum of the I ouput of the ALS X demod board (which was set to be near a zero crossing via the delay line), and the Q Mon of the AS55 demod board. 

Both ALS and AS55 show a sharp line at around 36.5kHz, so something is really happening in the IFO at this frequency. Koji might have seen an indication of this back in March.

What's going on here? And what would be different about PRFPMI that wouldn't have made this a problem for locking?

Attachment 1: IRlock_noises.pdf
IRlock_noises.pdf
  11619   Fri Sep 18 11:59:08 2015 ericqUpdateLSCAUX X Laser Current Reverted

Once again, the transmitted X green beam was showing enormous intensity fluctuations (50x higher than normal). Last month, I reduced the AUX X laser current from 2.0A to 1.9A, which I thought had fixed it somehow.

However, when I sent to the end to check it out today, I found the SR560 which is there to amplify the green PDH error signal before being sent to the AA board was overloading. Not so surprising, since the error signal was similarly noisy as the transmitted light. 

I turned the SR560 gain down, and, after relocking, the transmitted light was stable. I've turned the AUX X laser current back up to 2.0A, it's previous nominal value, and the green transmitted light is still stable. 

I'm a little mystified that the 560 could intefere with the loop, since it is not in the feedback path. Could it be that when it is overloading, it sends garbage backwards out of the inputs? But even then, its input is not connected to the real error point, but the buffered monitor port. Could it be interfering via the power line?

Before, I had hesitated adding gain to the PDH board's monitor point for DAQ purposes, because the motivation of the port is to provide a 1:1 version of the real error signal, and I didn't want to add gain to the AA board, because we normally don't have gain in those boards, and I didn't want to surprise future people. The SR560 was meant to be temporary, but as often happens, it was forgotten. Now, I think I will add gain to the error monitor buffer stage of the PDH boards. 

  11618   Fri Sep 18 09:06:26 2015 ranaFrogsComputer Scripts / Programsremote data access: volume 1, Inferno

Trying to download some data using matlab today, I found that my ole mDV stuff doesn't work because its MEX files were built for AMD64...

Tried to rebuild the NDS1 MEX according to 7 year old instructions didn't work; our GCC is 'too' new.

From the Remote Data Access wiki (https://wiki.ligo.org/RemoteAccess/MatlabTools) I got the new 'get_data.m' and 'GWdata.m'. These didn't run, so I updated the nds2-client and matlab-nds2-client on Donatella.

Still doesn't run to get 40m data. It recognizes that we're C1, but throws some java exception error. Maybe it doesn't work on the NDS1 protocol of our framebuilder?

So then I noticed that our NDS2 server on megatron is no longer running...thought it was supposed to run via init.d. Found that the nds2 binary doesn't run because it can't find libframecpp.so.5; maybe this was blown away in some recent upgrade? We do have versions 3, 4, 6, 7, & 8 of this library installed.

So now, after an hour or two, I'm upgrading the nds2 server on megatron (plus a hundred dependencies) as well as getting a newer version of matlab to see if there's some kind of java version issue there.

Of course python still works to get data, but doesn't have any of the wiener filter calculating code that matlab has...

  11617   Fri Sep 18 08:04:09 2015 ranaUpdateLSCRF micky mouse - dodgy DIN connector blocks fixed

Steve and I turned on the box this morning so that the IMC would lock again.

For future reference, remember that one should turn off the Marconi output before turning off the RF distribution box. Don't drive the input of unpowered RF amps.

 

  11616   Fri Sep 18 08:03:53 2015 ranaUpdateLSCRF micky mouse - dodgy DIN connector blocks fixed

Steve and I turned on the box this morning so that the IMC would lock again.

For future reference, remember that one should turn off the Marconi output before turning off the RF distribution box. Don't drive the input of unpowered RF amps.

 

  11615   Thu Sep 17 19:58:06 2015 gautamSummaryComputer Scripts / ProgramsFrequency counting algorithm

I made some changes to the c1tst model running on c1iscey in order to test my algorithm for frequency counting. I followed the steps listed in elog 8909 to make, install and start the model. 

I need to debug a few things and run some more diagnostics so I am leaving the model in its edited version (Eric had committed it to the svn before I made any changes). 

  11614   Thu Sep 17 19:42:43 2015 KojiUpdateLSCRF micky mouse - dodgy DIN connector blocks fixed

1. The delay-line box is now hooked up to the cross connect +15V supply.

2. The broken RF cable was fixed.

It is actually the POP22 cable.
Therefore, we might see significant change of the signal size for POP22.
Be aware.

RG405 + SMA connector rule

- Don't bend the cable at the connector.

- Always use a cap on the connector. It is a part of the impedance matching.

- Use transparent shrink tube for strain relieving and isolation. This allow us to check the condition of the shield without removing the cover.

Attachment 1: IMG_20150917_190635033.jpg
IMG_20150917_190635033.jpg
Attachment 2: IMG_20150917_192551919.jpg
IMG_20150917_192551919.jpg
  11613   Thu Sep 17 17:27:01 2015 gautamUpdateLSCRF micky mouse - dodgy DIN connector blocks fixed

[Steve, gautam]

We fixed the problematic DIN connectors on 1Y2, by swapping out the 3 DIN connector blocks that were of the wrong type (see attached image for the difference between the types appropriate for "Live" and "Ground").

Before doing anything, Eric turned the Wenzel multiplier off. We have not turned this back on.

Then we turned off the power supply unit at the base of 1Y2, removed the connectors from the rail, swapped out the connectors, reinstalled them on the rail, and turned the power supply back on. After swapping these out, we verified with a multimeter that between each pair of "Live" and "Ground" blocks, there was ~15V. We could now use the third unused pair of blocks to power the delay line phase shifter box, though for the moment, it remains powered by the bench power supply. 

Quote:

1. POP110 RF amps are powered from the cross connect. But that +15V block has GND connections that are not connected to the ground.
    i.e. The ground potential is given by the signal ground. (Attachment 1)

    This is caused by the misuse of the DIN connector  blocks. The hod side uses an isolated block assuming a fuse is inserted.
    However, the ground sides also have the isolated blocks

2. One of the POP110 RF cable has a suspicious shiled. The rigidity of the cable is low, suggesting the broken shield. (Attachment 2)

 

Attachment 1: DIN_rail_terminal.jpg
DIN_rail_terminal.jpg
  11612   Thu Sep 17 16:04:09 2015 SteveUpdatePEMGurs

ETMY - Guralp (B-MIT) was covered with copper lined can yesterday afternoon. It's long cable is connected to ADC interface box input 1

The vertex Trillium was covered just ~2 days before Ignacio left.

ETMX - Guralp (A-Caltech) is not covered. The long 40m cable is disconnected at the the south end.

 

  11611   Thu Sep 17 13:06:05 2015 ericqSummaryLSCLow input impedance on CM board

As it turns out, our version of the common mode board does not have high input impedence. I think this is what is messing with the lowpass. 

I added photos of the PCB to our 40m DCC page about this board: D1500308, wherein you can see that we have Revision B. 

On the aLIGO wiki's CommonModeServo page, one finds that high input impedence was added in Revision E. At LIGO-D040180, one finds this was implemented via an additional dual AD829 instrumentation amplifier stage before the input amplification stage that exists on our board.

Also, I find that the boosts installed are the default 40:4k, 1k:20k, 1k:20k, 500:10k pole zero pairs. Given our 30-40kHz UGF for CARM thus far, maybe we would like to lower some of these boost corner frequencies, to actually be able to use them; so far we only use the first two.

  11610   Thu Sep 17 08:36:14 2015 SteveUpdatePEMearth quake

No damage. The BS sensor UR 0.220 V has been low for some times.

Dataviewer does not work for long term trend.

Attachment 1: Chilian_eq_8.3M.png
Chilian_eq_8.3M.png
Attachment 2: BS_UR_0.220V.png
BS_UR_0.220V.png
Attachment 3: LowSensingV_BS-UR.png
LowSensingV_BS-UR.png
  11609   Thu Sep 17 03:48:10 2015 ericqSummaryLSCsome further notes

Something odd is happening with the CM board. Measuring from either input to OUT1 (the "slow output") shows a nice flat response up until many 10s of kHz. 

However, when I connect my idependently confirmed 120Hz LPF to either input, the pole frequency gets moved up to ~360Hz and the DC gain falls some 10dB. This happens regardless if the input is used or not, I saw this shape at a tee on the output of the LPF when the other leg of the tee was connected to a CM board input. 

This has sabotaged my high bandwidth ALS efforts. I will investigate the board's input situation tomorrow.

  11608   Thu Sep 17 02:22:53 2015 SteveUpdateendtable upgradeETMY optical table feedthrough

I doubt we'll see any effect until we carefully seal the holes. If there's 1 hole in your boat it still sinks.

Quote:

ETMY optical table enclosure feedthrough- south is in. Now it is time to see how air tightness increases performance.

 

  11607   Wed Sep 16 23:07:06 2015 ranaUpdateElectronicsLSC Whitening board: LP filters added, pictures taken

I added the 0.1 uF and 47 nF caps that I mentioned so that we can now bypass the AA filters for these channels. (mistakenly installed 47 instead of 0.47 nF on the first round and we got 350 Hz poles instead of 35 kHz)

Gautam and I checked out the AA sit and it seems that the XYCOM-220 cable which ought to allow switching of the AA filter is not connected on the XYCOM side, so the LSC AA filters are always ON. In order to bypass them, we'll need to just short the bypass control pins or just set the +5V on the board to GND, by lifting the EMI3 filter and shorting C6.

I have so far only made the changes on s/n 115 (used for AS55, REFL55, and REFL165), other 2 boards to follow soon.

Before making the AA change, we want to measure the HF spectrum the ADC for each of our main signals in the PRFPMI state. In lieu of that, we'll measure the spectrum at the I/Q mon ports of the demod boards via SR785 and then use matlab to propagate the signals to the ADC to make our estimate of how much anti-aliasing we need.

Changes relative to D990694-B:

  1. R215, R216, R217, R218, R219: 4.75k -> 9.53k.  This change was made long to make the DC gain of channels 4-8 be unity, the same as channels 1-3.
  2. 0.1 uF NPO cap in parallel with R127, R128, R129, R130, R131, R132, R133, R134.
  3. R127, R128, R129, R130, R131, R132, R133, R134 all 100k (was already like this) to keep LT1128 from floating up when input cables are disconnected.
  4. C158, C159, C160, C161, C162, C163, C164, C165, C166, C167, C168, C169, C170, C171, C172, C173, all were empty, now are 0.47 nF NPO.

I also looked at the noise in a few different configurations to see what we ought to do next.

BLACK: AS55I_IN1 with 0 dB whitening gain and whitening filter OFF, so its all just ADC noise

RED: same but with +45 dB whitening gain and WF ON, so above 10 Hz this is now the noise of the PD / demod chain

BLUE: RED w/ the anti-WF applied

PURPLE: in-loop POX11_I spectrum with x-arm locked

The conversion from counts to volts 0.0006, so the black trace is ~5 uV/rHz as expected. Its clear that we would be sort of OK for most of our channels if we just had 1 stage of whitening. I think we ought to convert the input stage into a 100:20 stage and also change the other whitenings into a 100:20 instead of 150:15. Then we'll have less gain at 15 Hz, but more at 100 Hz.

We really need to buy some surface mount capacitors, Steve - we ought to have at least 100 of all the ones in that little gray cabinet.

Attachment 1: 20150916_221210.jpg
20150916_221210.jpg
Attachment 2: out.pdf
out.pdf
  11606   Wed Sep 16 15:04:33 2015 ericqSummaryLSCDC PD Whitening Board Fixed
Quote:

Tonight we noticed that the REFL_DC signal has gone bipolar, even though the whitening gain is 0 dB and the whitening filter is requested to be OFF.

Fixed! I noticed that whitening gain changes weren't having any effect on CM_SLOW. I then checked REFL_DC, where this also seemed to be the case. Since the gain is controlled via VME machine, and whitening filter switching is controlled via RCG, I figured there must be something wrong with the board. I checked all of the DC PD signals, which share a whitening filter board, and they all had the same symptoms. 

I went and peeked at the board, and it turns out the backplane cable had fallen off. frown

I plugged it in, things look ok. 

  11605   Wed Sep 16 03:44:18 2015 KojiUpdateLSCRF micky mouse

1. POP110 RF amps are powered from the cross connect. But that +15V block has GND connections that are not connected to the ground.
    i.e. The ground potential is given by the signal ground. (Attachment 1)

    This is caused by the misuse of the DIN connector  blocks. The hod side uses an isolated block assuming a fuse is inserted.
    However, the ground sides also have the isolated blocks

2. One of the POP110 RF cable has a suspicious shiled. The rigidity of the cable is low, suggesting the broken shield. (Attachment 2)

Attachment 1: IMG_20150915_231038191.jpg
IMG_20150915_231038191.jpg
Attachment 2: IMG_20150915_234257144.jpg
IMG_20150915_234257144.jpg
  11604   Wed Sep 16 03:37:06 2015 KojiSummaryGreen LockingWorkable delay line setup prepared

[Koji Gautam]

The variable delay line has been setup for practical use. The hardware and basic software are ready.

The delay time is given by [512-1-mod(C1:LSC-BO_1_0_SET, 512)]*(1/16) ns

Giving 511 (LLLL LLLH HHHH HHHH) to C1:LSC-BO_1_0_SET makes the delayline shortest (+0ns).
Giving 0 (LLLL LLLL LLLL LLLL) to C1:LSC-BO_1_0_SET makes the delayline longest (~32ns).

The SR785 was removed from the rack for our access >> Eric


DO setup

- Three CONTEC DO-32L-PE cards are found in the Yarm digital cabinet. (I brought a card from WB, but will bring it back).
- The card was installed in the C1LSC chassis.

- The models for c1x04 and c1lsc were modified to include the card. Once they are restarted, the card was recognized without problem.
  The frame builder also needed to be restarted (Attachment 1&2). The changes were committed to the repository.

- MEDM screen "CDS_BO_STATUS.adl" has been modified to include the bit monitors for the new DO card. (Attachment 3)

Epics values "C1:LSC-BO_1_0_SET" and "C1:LSC-BO_1_1_SET" are hooked up to the DO block.

Cables

- The DO board has DB37(F). I made a I/F cable with a DB37(M) crimp connector, DB25 breakout board, and a ribbon cable.
  Pin 1 is connected to pin 14 of the DB25 (GND of the delayline circuit).
  Pin 2~10 are connected to pin 1~9 of the DB25 (Switch 1~9 of the delayline circuit)
  Pin 18 is connected to X01 (external = spare) (Attachment 4)
 

- [CONFESSION] A bench +15V power supply was prepared to power the transisters of the DO (Attachment 6). The hot side is connected to X01 (not connected to the DB25),
  and the cold side is connected to pin 14 of the DB25. Once we find this is a useful setup we need to make a dedicated interface unit to convert DB37
  into DB25 (and provide more connectivities).

- A DB25 M-F cable was installed on the cable tray above the LSC racks.

Delay line unit

- The delay line box was mounted on 34H of the LSC analog rack (Attachment 5).

- The side cross connect power supply was not available (to be described later). Therefore we decided to use the same +15V supply as the one for the DO card.

- Checked the functionarity of the local switches using a function generator @30MHz and the front panel switches. The maximum (~32ns) delay was confirmed.
  (Just not enough to have 360 deg shift).

- Now the delay line function was tested with the front panel swicth at "ext". We confirmed that the delay time changes with the number given to C1:LSC-BO_1_0_SET.


What we need further

- Implement delay time slider control (511 = 0ns, 0 = 31.94ns). The delay time is given by
  [512-1-mod(C1:LSC-BO_1_0_SET, 512)]*(1/16) ns

- Some independent RF issues I found. (Next entry)

Attachment 1: 21.png
21.png
Attachment 2: 51.png
51.png
Attachment 3: 46.png
46.png
Attachment 4: IMG_20150915_222236066.jpg
IMG_20150915_222236066.jpg
Attachment 5: IMG_20150915_234222349.jpg
IMG_20150915_234222349.jpg
Attachment 6: IMG_20150915_234323363.jpg
IMG_20150915_234323363.jpg
  11603   Tue Sep 15 20:44:13 2015 gautamSummaryLSCChecking the delay line phase shifter DS050339
I checked out the delay line phase shifter D050339, (theory of operation here) this afternoon. I first checked that the power connection was functional, which it was, though the power connector is is not the usual chassis one (see image attached, do we need to change this?).

The box has two modes of operation - you can either change the delay by flipping switches on the front panel or via a 25pin D-sub connector on the back (the pin numberings for this connector on the datasheet are a little misleading, but I determined that pins 1-9 on the D-sub connector correspond to the 9 delays on the front panel in ascending order, pin 10 is the mode selector switch, should be high for remote operation, pins 11 and 13 are NC, pin 12 is VCC of 5V, and pins 14-25 are grounded). I first checked the front-panel mode of operation, using an oscilloscope to measure the delay between the direct signal from the Fluke 6061 and the output from the D050339. This corresponds to the first set of datapoints in the plot attached (signal was 100MHz sine wave).

I then used a 25 pin D sub breakout boards to check the remote operation mode as well, which corresponds to the second set of datapoints in the plot attached. For this measurement, I used the Agilent network analyzer to measure the phase lag between the direct signal (for all delays, I measured the phase lag at 100MHz, having first calibrated the "thru" path by connecting the R and A inputs of the network analyzer using a barrel BNC) and the delayed output from the box, and then converted it to a time delay.

Both sets of data are linear, with a slope nearly equal to 1 as expected. I conclude that the box is functioning as expected. Right now, Koji is checking a board which will be used to remotely control this box. On the hardware side it remains to make a cable going from the DS050339 Dsub input to the driver board output (also 25 pin Dsub).
Attachment 1: IMG_20150915_193100.jpg
IMG_20150915_193100.jpg
Attachment 2: Calibration.pdf
Calibration.pdf
  11601   Tue Sep 15 18:35:21 2015 ericqSummaryLSCsome further notes

About the analog CARM control with ALS:

We're looking at using a Sigg designed remotely switchable delay line box on the currently undelayed side of the ALS DFD beat. For a beat frequency of 50MHz, one cycle is 20ns, this thing has 24ns total delay capability, so we should be able to get pretty close to a zero crossing of the analog I or Q outputs of the demod board. This can be used as IN2 for the common mode board. 

Gautam is testing the functionality of the delay and switching, and should post a link to the DCC page of the schematic. Rana and Koji have been discussing the implementation of the remote switching (RCG vs. VME). 

I spent some time this afternoon trying to lock the X arm in this way, but instead of at IR resonance, just wherever the I output of the DFD had a zero crossing. However, I didn't give enough thought to the loop shapes; Koji helped me think it through. Tomorrow, I'll make a little pomona box to go before the CM IN2 that will give the ALS loop shape a pole where we expect the CARM coupled cavity pole to be (~120Hz), so that the REFL11 and ALS signals have a similar shape when we're trying to transition. 

The common mode board does have a filter for this kind of thing for single arm tests, but puts in a zero as well, as it expects the single arm pole, which isn't present in the ALS sensing, so maybe I'll whip up something appropriate for this, too. 

  11600   Tue Sep 15 16:49:08 2015 SteveUpdateendtable upgradeETMY optical table feedthrough

ETMY optical table enclosure feedthrough- south is in. Now it is time to see how air tightness increases performance.

Quote:

The ETMY enclosure feedthrough - north is installed. The sealing material is hard to work with.

The upper empty blocks will be replaced by something soft to make changing cables easy.

 

 

Attachment 1: ETMYsFeedt.jpg
ETMYsFeedt.jpg
  11599   Tue Sep 15 15:10:48 2015 gautam, ericq, ranaSummaryLSCPRFPMI lock & various to-do's
I was observing Eric while he was attempting to lock the PRFPMI last night. The handoff from ALS to LSC was not very smooth, and Rana suggested looking at some control signals while parked close to the PRFPMI resonance to get an idea of what frequency bands the noise dominated in. The attached power spectrum was taken while CARM and DARM were under ALS control, and the PRMI was locked using REFL_165. The arm power was fluctuating between 15 and 50. Most of the power seems to be in the 1-5Hz band and the 10-30Hz band.

Rana made a number of suggestions, which I'm listing here. Some of these may directly help the above situation, while the others are with regards to the general state of affairs.

  • Reroute both (MC and arm) FF signals to the SUS model
  • For MC, bypass LSC
  • Rethink the MC FF -
  • Leave the arm FF on all the time?
  • The positioning of the accelerometer used for MC FF has to be bettered - it should be directly below the tank
  • The IOO model is over-clocking - needs to be re-examined
  • Fix up the DC F2P - Rana mentioned an old (~10 yr) script called F2P ratio, we should look to integrate the Python scripts used for lock-in/demod at the sites with this
  • Look to calibrate MC_F
  • Implement a high BW CARM servo using ALS
  • Gray code implementation for EPICS gain-stepping

Attachment 1: powerSpec0915.pdf
powerSpec0915.pdf
  11598   Tue Sep 15 15:01:23 2015 ranaSummaryLSCdisabling the LSC AA filters + mod to whitening

While investigating the BIO situation with the LSC machine and the iscaux2 processor last night, we wondered if maybe the Anti-Aliasing filters were mistakenly disabled. But why do we need these anyway?

Our ADCs digitize at 64 kHz and there is a digital lowpass in the IOP at 5 kHz before we downsample to 16 kHz. So mainly we're trying to prevent some aliasing at the 64 kHz IOP rate. But our analog AA filter is a 8th order ELP at 7570 Hz, so its overkill.

So, I propose that we bypas the AA via hardwiring the board and implement a 10 kHz pole in the whitening board (D990694) before the whitening by turning R127, etc. into a 0.1 uF cap. Along with the 100 Ohm series resistor, this will make a pole at ~15 kHz. Probably ought to check that the input resistor is metal film. Also, if we replace C158/C159, etc. with a 0.47 nF cap, we'll get 2 poles at 35 kHz to limit the higher frequencies from saturating.

  11597   Tue Sep 15 01:14:10 2015 ranaSummaryLSCneed to check LSC Whitening switch logic ... again

Tonight we noticed that the REFL_DC signal has gone bipolar, even though the whitening gain is 0 dB and the whitening filter is requested to be OFF.

We should check out the switch operation of several ofthe LSC channels in the daytime - where is the procedure for this diagnostic posted?

  11596   Mon Sep 14 23:12:49 2015 ericqUpdateLSC55MHz modulation phase effect on PRMI

With the adjustable delay line box installed in the 55MHz modulation path, I've measured the PRMI sensing matrix as a function of delay / relative phase between the 11MHz and 55MHz modulations. The relative frequency difference of 44MHz tells us that this should be cyclical after ~23nsec of delay, but losses in the delay cable change this; see Koji's elogs about the modulation cancellation setup for details. 

TL;DR: Nothing really changes, other than REFL33 optical gain. MICH/PRCL angles remain degenerate.


The results aren't so surprising. The demod angles for the 55MHz diodes don't even change, since the same 55MHz signal is used for the modulator and demodulators, so delaying it before the split should go unnoticed. Most of these measurements were made during the same lock stretch, PRCL on REFL11 I and MICH on AS55Q.

The only signals we would expect to change much are ones that have significant contriubtions from field products influenced by both modulations. None of the 1F PDs are like this, nor is REFL165. REFL33 is the odd man out, where the +44MHz field produced as a -11MHz sideband on the +55MHz sideband beats with the +11MHz sideband (and the same with the signs flipped). I made a simulation for the 40m poster at the March 2015 LVC meeting, but I don't think it ever made it to the ELOG. 

So:

Here are the results for the 0ns and 4ns cases, as an illustration of what changes (REFL33), and what doesn't (everything else). Again, these are calibrated to Volts out of the analog demod boards per meter of DoF motion. 

 

So, since REFL33 is the only one really changing, let's just look at it by itself:

Qualitatively, the change in magnitude looks similar to the simulation result. The demod angles fall by some roughly linear amount. The angle difference is even more stationary than predicted there, though. 

Attachment 1: PRMI_CAR_0ns.pdf
PRMI_CAR_0ns.pdf
Attachment 2: PRMI_CAR_4ns.pdf
PRMI_CAR_4ns.pdf
Attachment 3: delaySweep_nominal.pdf
delaySweep_nominal.pdf
Attachment 4: 55delay_PRMI_REFL33.pdf
55delay_PRMI_REFL33.pdf
  11595   Mon Sep 14 21:42:00 2015 ranaUpdateIOOMC Wiener + Summary

I turned on the MCF FF in the OAF today (we need to fix the labeling of the 'ON' buttons on the RHS of the screen). The performance is still good; before / after attached.

Not only is the 1 Hz performance in the MC still good, but the X & Y arm noise reduction is ~1 order of magnitude. Good to know that the filters aren't changing much with time.

Can we just leave this on all the time now? Seems to be OK and there's no visible increase in the arm noise with this on.

Also did some updates to the summary pages and added a CDS FEC tab for CPU times.

Please take a look at the summary pages and bring a list of demands to the Wednesday meeting.

Attachment 1: mcf.pdf
mcf.pdf
  11594   Mon Sep 14 16:50:12 2015 ericqUpdateLSCQuick note

Just a heads up while I'm out for a bit: the delay line is currently installed in the 55MHz modulation path. 

I'll be back later, and will revert the setup.

  11593   Mon Sep 14 10:41:03 2015 SteveUpdateVACTP2 dry pump replaced

TP2 dry fore pump sn PLE10082 was replaced at pressure 717 mTorr,  TP2 50K rpm 0.33A @ 112,677 hrs

Top seal life was 8,160 hrs

Model  SH110, Sn LP1007L556 was installed. It's fore line pressure after 30 minutes of running 38 mTorr, TP2 turbo at 50K rpm 0.18A

 

 

Attachment 1: TP2_dry_pump_replaced.png
TP2_dry_pump_replaced.png
  11592   Sun Sep 13 13:26:00 2015 ranaUpdateIOOLast Wiener MCL subtractions

When making the Wiener filter OFF/ON comparisons, we want to use the median PSD estimates, not the mean (which is what pwelch gives you).

cf. Sujan's note and Evan's follow-up

The median will be less sensitive to the transients / gltiches and will show more improvement I think.

  11591   Fri Sep 11 10:56:47 2015 SteveUpdateendtable upgradeETMY optical table feedthrough

The ETMY enclosure feedthrough - north is installed. The sealing material is hard to work with.

The upper empty blocks will be replaced by something soft to make changing cables easy.

 

Attachment 1: ETMY-Nfeedt.jpg
ETMY-Nfeedt.jpg
  11590   Thu Sep 10 09:37:34 2015 IgnacioSummaryIOOFilters left on MCL static module

The following MCL filters were left loaded in the T240-X and T240-Y FF filter modules (filters go in pairs, both on):

FM7: SISO filters for MCL elog:11541

FM8: MISO v1 elog:11547

FM9: MISO v1.1 Small improvement over MISO v1

FM10 MISO v2 elog:11563

FM5 MISO v3.1 elog:11584 (best one)

FM6 MISO 3.1.1 elog:11584 (second best one)

 

  11589   Thu Sep 10 04:23:00 2015 ericqUpdateLSCMoved LSC sensing matrix notch frequencies

Frequencies are:

  • CARM: 309.21 Hz
  • DARM: 307.88 Hz
  • MICH: 311.1 Hz
  • PRCL: 313.31 Hz
  • SRCL: 315.17 Hz

POP110 and POP22 demod angles were adjusted for DRMI lock. 

Last week, I never achieved a fully 1F lock, REFL165 was used for SRCL. Tonight, we created input matrix settings for pure 1F locking, and did some signal mixing to reduce the PRCL to SRCL coupling. The PRCL to MICH coupling was already low, since AS55 is fairly insensitive to PRCL. 

Similarly, for the 3F signals, some signal mixing of REFL33I and REFL165Q was used to reduce the PRCL to MICH coupling. The PRCL to SRCL coupling in REFL165 isn't too bad, so no compensation was done. Interestingly, in this setting, the 3F MICH and SRCL signals agree with the 1F signals on their zero crossing, so no offsets are needed. REFL33 I does need an offset, however, to match the REFL11I PRCL zero crossing. 

The DRMI acquires faster with SRCL set to 165I. Once acquired, the 1F/3F can be made smoothly, and both settings are very stable. The sensing matrix in each setting is consistent with each other. (The PRCL and SRCL lines in AS55 change, but really I shouldn't even plot them, since they're not very coherent). 

For some reason, these show a sign flip relative to last week's measurements. The relative angles are consistent, though. 

Next up is finding the right coefficient for the SRM in the MICH output matrix, when actuating on the BS. 

Attachment 1: DRMI_1F.pdf
DRMI_1F.pdf
Attachment 2: DRMI_3F.pdf
DRMI_3F.pdf
  11588   Thu Sep 10 01:09:20 2015 ranaUpdateLSCMoved LSC sensing matrix notch frequencies

We looked at the DRMI noise spectrum and chose new excitation frequencies such that the lines are lower in frequency than before (~300 Hz instead of 800 Hz) and also not in some noisy region.

New filters is saved and loaded for all LSC DOFs.

Attachment 1: NewLSCnotches.png
NewLSCnotches.png
  11587   Wed Sep 9 15:45:11 2015 ericqUpdatePEMInverted STS filters in C1OAF

Our online subtraction filters for PRC angle and MC length were trained on the raw ADC signals, so I've inverted the filters that Rana installed in the PEM filter banks in the OAF signal conditioning filter banks (C1:OAF-WIT_STS1X, etc.)

It's not perfect, since the inversion would be unstable, and thus needs a low pass. I used an ELP at 800Hz. The error in the inversion is then something like half a degree at 5Hz, which is the highest frequency we really ever subtract at. It should be ok.

  11585   Wed Sep 9 11:33:58 2015 ranaUpdateSummary PagesSummary Page updates
  • Made most plots in IOO tab only plot when MC_TRANS > 10000 using Eve's MC_LOCK state definition.
  • added the 0.03 - 0.1 Hz and 10-30 Hz bands to the PEM SEIS BLRMS tab and set the y-scales to the same as SeismicRainbowSTS.stp
  • set state PMC_LOCK in PSL tab and made some of those plots only plot when PMC trans > 0.6.
  • SUS-OL page showed me that the ETM yaw spectrum was wacky, which lead me to find that it was completely uncentered. Stop leaving the room lights ON Steve!!  angry I also set the quadrant offsets by blocking the QPD with a piece of metal (teflon doesn't work).
  • set c1summary to only plot some when X or Y arms are locked
  11584   Wed Sep 9 11:00:49 2015 IgnacioUpdateIOOLast Wiener MCL subtractions

On Thursday night (sorry for the late elog) I decided to give the MCL FF one more try. 

I first remeasured the actuator transfer function because previous measurements had poor coherence ~0.5 - 0.7  at 3 Hz. I did a sine swept to measure the TF. 

Raw transfer function:

The data is attached here: TF.zip

Then I made Wiener filters by fitting the transfer function data with coherence > 0.95 (on the left). Fitting all the data (on the right). Here are the filters:

 

The offline subtractions (high coh fit on left, all data fit on right). Notice the better IIR performance when all the TF data was fitted.

 

The online results: (these were aquired by taking five DTT measurements with 15 averages each and then taking the mean of these measurements)

 

And the subtraction performance:

 

Attachment 3: TF.zip
  11583   Tue Sep 8 20:30:44 2015 ranaUpdateIOOMC WFS relief re-commissioned

I converted our MC WFS relief from CSH to BASH today. I also added 'wait' commands and 'echo' commands so that all DoFs run in parallel nicely. It can be accessed from the MC WFS screen.

I increased the overall MC WFS gain input slider from 0.02 to 0.1 (its in the mcwfson script). The MC Trans loops now have a time constant of ~30 seconds. The relief script relieves ~90% of the MC WFS control signals in the 2 minutes that its allowed to run.

On the next upgrade, we should make it python and have it kill the relief process if the MC loses lock before relief is applied via the alignment sliders.

Attachment 1: WFSrelief.png
WFSrelief.png
  11582   Mon Sep 7 19:46:46 2015 ranaUpdatePEMSeismic BLRMS filters

As it turned out, the "STS" BLRMS filters were all a mess, so I fixed them up today:

  • BP and LP filters were non-existent for the 2 low frequency bands: 0.01-0.03 & 0.03-0.1 Hz. The 0.01-0.03 is just seeing tilt noise (its big in X & Y, but not in Z), but the other band is able to cleanly see the primary microseism at 0.06 Hz.
  • There was some mixup and some BP filter banks had low pass filters while one of the LP banks had a BP filter.
  • There were different filters between the X, Y & Z directions.
  • The low pass filters had enough ringing in the impulse response that their outputs could sometimes go negative and make the SQRT block output NaN.

After tuning:

  • All bandpass filters are 4th order Butterworth bandpass with the corners at the band edges (e.g. 1- 3  Hz)
  • All low pass are the same, just scaled by the frequency band. They have a pair of real poles and a pair of 35 deg poles. The pole frequencies are set so that there is 40 dB of attenuation at twice the frequency of the low end of the bandpass. i.e. for the 1-3 Hz band, the low pass has > 40 dB atten at 2 Hz.
  • The 3-10 and 10-30 Hz bands use the same low pass as the 1-3 Hz band, since I don't want to see aliasing in the EPICS readouts. I don't think we need faster than 1 Hz readback of the RMS.
  • Confirmed with FOTON that the impulse response for the LP filters are positive for all t >0.

The "C1:PEM-SEIS_STS_1" filter banks are currently empty, so the signal is just in ADC counts. However, by amazing luck, this seems to be the right gain (within a factor of 2) to put the signal into units of microns / second. According the the schematic (D1000749), the default gain of 110 can be switched to make the whole box just have a gain of 2 (differential in, differential out). I wonder if anyone, like Jenne, knows if this is what we have? There's no elog I found about setting the gain switch.

According to the manual, the gain is ~1175 V/(m/s). Our ADC gain should be (2^16)/(40). So:

cal_gain = 1175 * 2 * 65536 / 40  ==>> 0.26 (m/s)/counts

I have put this into the STS_1_X,Y,Z filter modules in c1pem so that these channels are now calibrated. I also put the first few s-domain poles/zeros into the filter based on the manual so that the magnitude in the 10-30 Hz band is correct-ish now.

* Does anyone know how to center the masses on this thing?

Attachment 1: T240_150907.png
T240_150907.png
  11581   Mon Sep 7 18:25:16 2015 ranaConfigurationIOOAOM stage is ready

The new stage missed the right height by ~2 mm. sad

Even if I completely bottom out the (New Focus 9071) 4-axis stage, its not short enough. So I removed the AOM from the beam and re-aligned into the PMC.

Steve, please get the aluminum piece remachined to go down by 2.5 mm so we can have some height adjustment room.

Quote:

New stage can cheeky hold the correct polarization.

Also, the turning mirror mount just after the EOM and before the AOM is a U-100 and we want it to be a Suprema for stability - let's not forget to swap that after Steve gets the mount fixed.

  11580   Mon Sep 7 16:30:56 2015 ranaHowToComputer Scripts / Programsincrease of window border size on Rossa

Frustrated by the single pixel width of the windows and how hard that makes it to drag things around, I explored StackExchange:

which showed how there is a .xml file which can be edited to increase this. I've changed the border size to 4 pixels on Rossa - its nice.devil

  11579   Fri Sep 4 20:42:14 2015 gautam, ranaUpdateCDSCheckout of the Wenzel dividers

Some years ago I bought some dividers from Wenzel. For each arm, we have x256 and a x64 divider. Wired in series, that means we can divide each IR beat by 2^14.

The highest frequency we can read in our digital system is ~8100 Hz. This corresponds to an RF frequency of ~132 MHz which as much as the BBPD could go, but less than the fiber PDs.

Today we checked them out:

  1. They run on +15V power.
  2. For low RF frequencies (< 40 MHz) the signal level can be as low as -25 dBm.
  3. For frequencies up to 130 MHz, the signal should be > 0 dBm.
  4. In all cases, we get a square wave going from 0 ~ 2.5 V, so the limiter inside keeps the output amplitude roughly fixed at a high level.
  5. When the RF amplitude goes below the minimum, the output gets shaky and eventually drops to 0 V.

Since this seems promising, we're going to make a box on Monday to package both of these. There will one SMA input and output per channel.

Each channel will have a an amplifier since this need not be a low noise channel. The ZKL-1R5 seems like a good choice to me. G=40 dB and +15 dBm output.

Then Gautam will make a frequency counter module in the RCG which can do counting with square waves and not care about the wiggles in the waveform.

I think this ought to do the trick for our Coarse frequency discriminator. Then our Delay Box ought to be able to have a few MHz range and do all of the Fast ALS Carm that we need.

Attachment 1: TEK00000.PNG
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Attachment 2: TEK00001.PNG
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Attachment 3: TEK00002.PNG
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