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Entry  Fri Nov 12 10:49:34 2010, josephb, valera, Update, CDS, Test of ADC noise ADC_noise.pdf
    Reply  Fri Nov 12 19:24:56 2010, Koji, Update, CDS, Test of ADC noise 
    Reply  Sun Nov 14 11:56:59 2010, valera, Update, CDS, Test of ADC noise 
Message ID: 3906     Entry time: Fri Nov 12 10:49:34 2010     Reply to this: 3910   3915
Author: josephb, valera 
Type: Update 
Category: CDS 
Subject: Test of ADC noise 


Look at the effects of the ADC voltage range on the ADC noise floor.

ADC input was terminated with 50 ohms.  We then looked at the channel with DTT. This was at +/- 10 V range.  We used C1:SUS-PRM_SDSEN_IN1 as the test channel.

The map.c file (in /opt/rtcds/caltech/c1/core/advLigoRTS/src/fe/ ) then had two lines added at line 766.

//JCB temporary 2.5V test, remove me
  adcPtr[devNum]->BCR &= 0x84240;

This hard coded the 2.5 V range (we default to the 10 V range at the moment).

We then rebuilt the c1x02 model and reran the test.

Finally, we reverted the code change to map.c and rebuilt c1x02.

I've attached the DTT output of the two tests.

It appears the ADC is limited by 1.6 uV/rtHz.  Hence the increase in noise in counts by a factor of 4 when we drop to +/- 2.5 V from +/- 10 V.

Attachment 1: ADC_noise.pdf  10 kB  | Hide | Hide all
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