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Entry  Wed May 25 16:56:44 2022, Paco, Configuration, BHD, IFO recovery - IMC alignment 
    Reply  Wed May 25 17:34:47 2022, yuta, Configuration, BHD, IFO recovery - IFO alignment Screenshot_2022-05-25_17-47-57.png
       Reply  Thu May 26 19:55:43 2022, yuta, Configuration, BHD, Oplevs centered, BHD DCPDs are now online elog_1Y2.JPGelog_BHD.JPGelog_box.JPGScreenshot_2022-05-26_17-37-27_IFOaligned_OplevCentered.pngScreenshot_2022-05-26_20-35-02.png
          Reply  Fri May 27 17:45:53 2022, yuta, Configuration, BHD, BHD camera installed, GRY aligned 
             Reply  Thu Jun 2 20:05:37 2022, yuta, Configuration, PSL, IMC input power recovered to 1W, some alignment works Before.JPGAfter.JPG
                Reply  Fri Jun 3 12:13:58 2022, Paco, Configuration, CDS, Fix RFM channels  SoGreen.png
                   Reply  Fri Jun 3 15:22:51 2022, yuta, Update, LSC, Both arms locked with POY/POX, IR beam centered on TMs with ASS IRBeamsOnTMs.JPGScreenshot_2022-06-03_15-03-51.png
                      Reply  Fri Jun 3 17:42:50 2022, yuta, Update, LSC, MICH locks with AS55_Q Screenshot_2022-06-03_17-41-55.png
                         Reply  Sun Jun 5 19:46:40 2022, Paco, Update, LSC, Fixed IMC Trans sum issue 
                         Reply  Mon Jun 6 13:35:11 2022, Paco, Update, LSC, First calibrated spectra of MICH at AS55 Q Screenshot_2022-06-06_17-30-16_MICHOLTF.pngCalibrated_MICH_ERR.pdf
                            Reply  Fri Jun 17 16:22:21 2022, yuta, Update, LSC, Actuator calibration of BS. ITMX, ITMY, updated MICH displacement spectra from c1cal 6x
                               Reply  Thu Jul 7 18:18:19 2022, yuta, Update, LSC, Actuator calibration of ETMX and ETMX Screenshot_2022-07-05_14-52-01_OLTF.pngScreenshot_2022-07-05_14-54-03_TF.pngScreenshot_2022-07-05_14-56-41_Ratio.png
                                  Reply  Thu Jul 7 18:22:12 2022, yuta, Update, LSC, Actuator calibration of MC2 using Yarm TF.pngMC2.png
                                     Reply  Fri Jul 8 16:18:35 2022, rana, Update, LSC, Actuator calibration of MC2 using Yarm 
                                     Reply  Mon Jul 18 17:07:12 2022, yuta, Update, LSC, x4.12 added to ETMX coil outputs to balance with ETMY 
          Reply  Thu Jun 16 18:23:15 2022, Paco, Configuration, BHD, Recovering LO beam in BHD DCPDs Screenshot_2022-06-16_18-29-14_BHDLObeamISBACK.png
          Reply  Tue Jun 21 14:17:50 2022, yuta, Configuration, BHD, BHD DCPDs re-routed to c1sus2 C1X07ADC1.JPGBHDDCPDs.JPG
             Reply  Tue Jul 19 16:00:34 2022, yuta, Configuration, BHD, Fast channels for BHD DCPDs now available in c1lsc but not in c1hpc Screenshot_2022-07-19_14-26-39_c1hpc.pngScreenshot_2022-07-19_14-24-49_c1lsc.pngScreenshot_2022-07-19_15-51-25_GreenGreen.png
                Reply  Thu Jul 21 21:50:47 2022, Tega, Configuration, BHD, c1sus2 IPC update 
                   Reply  Fri Jul 22 15:05:26 2022, Tega, Configuration, BHD, c1sus2 shared memory and ADC fix Screenshot_2022-07-22_15-04-33_DCPD.pngScreenshot_2022-07-22_15-12-19_models.pngScreenshot_2022-07-22_15-15-11_ERR.pngScreenshot_2022-07-22_15-32-19_GDS.png
                      Reply  Fri Jul 22 17:46:10 2022, yuta, Configuration, BHD, c1sus2 watchdog update and DCPD ERR channels Screenshot_2022-07-22_17-48-25.png
                         Reply  Mon Jul 25 17:58:10 2022, Tega, Configuration, BHD, c1sus2 IPC dolphin issue update Screen_Shot_2022-07-25_at_5.43.28_PM.pngScreen_Shot_2022-07-25_at_5.21.10_PM.pngScreen_Shot_2022-07-25_at_5.30.58_PM.pngScreen_Shot_2022-07-25_at_5.35.19_PM.png
                            Reply  Mon Aug 1 18:42:39 2022, Tega, Configuration, BHD, c1sus2 IPC dolphin issue update c1sus2_dolphin.pngfb1_dxamin_status.pngdolphin_num_mem_init2.png
                               Reply  Tue Aug 2 17:25:18 2022, Tega, Configuration, BHD, c1sus2 dolphin IPC issue solved c1lsc_IPC_status.pngFE_lsmod_dependencies_c1sus2_b4_after_iop_unpdate.png
                      Reply  Mon Jul 25 18:09:41 2022, Tega, Configuration, BHD, BHD Homodyne Phase control MEDM screen Screen_Shot_2022-07-25_at_6.12.08_PM.pngScreen_Shot_2022-07-25_at_6.18.09_PM.png
Message ID: 17026     Entry time: Fri Jul 22 15:05:26 2022     In reply to: 17025     Reply to this: 17028   17034
Author: Tega 
Type: Configuration 
Category: BHD 
Subject: c1sus2 shared memory and ADC fix 

[Tega, Yuta]

We were able to fix the shared memory issue by updating the receiver model name from ''SUS' to 'SU2' and the ADC zero issue by including both ADC0 and ADC1 in the c1hpc and c1bac models as well as removing the grounding of the unused ADC channels (including chn#16 and chn#17 which are actually used in c1hpc) in c1su2. We also used shared memory to move the DCPD_A/B error signals (after signal conditioning and mixing A/B; now named A_ERR and B_ERR) from c1hpc to c1bac.
C1:HPC-DCPD_A_IN1 and C1:HPC-DCPD_B_IN1 are now availableangel (they are essentially the same as C1:LSC-DCPD_A_IN1 and C1:LSC-DCPD_B_IN1, except for they are ADC-ed with different ADC; see elog 40m/16954 and Attachment #1).
Dolphin IPC error in seding signal from c1hpc to c1lsc still remains.crying

Attachment 1: Screenshot_2022-07-22_15-04-33_DCPD.png  421 kB  Uploaded Fri Jul 22 16:22:51 2022  | Hide | Hide all | Show all
Screenshot_2022-07-22_15-04-33_DCPD.png
Attachment 2: Screenshot_2022-07-22_15-12-19_models.png  489 kB  Uploaded Fri Jul 22 16:29:36 2022  | Hide | Hide all | Show all
Screenshot_2022-07-22_15-12-19_models.png
Attachment 3: Screenshot_2022-07-22_15-15-11_ERR.png  162 kB  Uploaded Fri Jul 22 16:29:44 2022  | Hide | Hide all | Show all
Screenshot_2022-07-22_15-15-11_ERR.png
Attachment 4: Screenshot_2022-07-22_15-32-19_GDS.png  188 kB  Uploaded Fri Jul 22 16:34:37 2022  | Show | Hide all | Show all
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