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40m Log |
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Tue Jun 21 21:17:16 2022, yuta, Update, BHD, RTS models for BHD added but PCIE error remaining   
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Wed Jun 22 14:44:03 2022, Anchal, Update, BHD, Fixed DC error in c1su2, added new library model for suspensions
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Tue Jun 28 14:24:23 2022, yuta, Update, BHD, BHD DC PD signals now also sent to c1lsc to circumvent IPC error  
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Mon Nov 14 17:45:02 2022, yuta, Update, BHD, BHD DC PD unwhitening and removing cables to c1lsc
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Mon Nov 21 18:43:46 2022, yuta, Update, BHD, c1hpc and c1lsc modified to send BHD_DIFF and BHD_SUM
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Wed Nov 23 11:06:08 2022, Anchal, Update, BHD, c1hpc and c1sus modified to add BS dither and demodulation option
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Tue Nov 29 15:32:32 2022, Anchal, Update, BHD, c1hpc model updates to support double audio dither
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Tue Dec 6 13:09:44 2022, yuta, Update, BHD, c1cal model updates to support sensing matrix for BHD   
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Message ID: 16954
Entry time: Tue Jun 28 14:24:23 2022
In reply to: 16938
Reply to this: 17265
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Author: |
yuta |
Type: |
Update |
Category: |
BHD |
Subject: |
BHD DC PD signals now also sent to c1lsc to circumvent IPC error |
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[JC, Yuta]
To circumvent IPC error sending BHD DC PD signals from c1sus2 to c1lsc, DB9 cable from BHD DC PD box sent to c1sus2 is now split and sent also to c1lsc.
They are now available in both
c1sus2 ADC1
C1:X07-MADC1_EPICS_CH16 (DC PD A) and CH17 (DC PD B)
c1lsc ADC1
C1:X04-MADC1_EPICS_CH4 (DC PD A) and CH5 (DC PD B)
Next:
- Add battery powered SR560 to decouple c1sus2 and c1lsc to avoid the ground loop |
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