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Entry  Tue Jun 21 21:17:16 2022, yuta, Update, BHD, RTS models for BHD added but PCIE error remaining Screenshot_2022-06-21_20-12-55_C1HPC.pngScreenshot_2022-06-21_20-14-56_C1SU2.pngScreenshot_2022-06-21_20-13-38_C1LSC.pngScreenshot_2022-06-21_20-34-44_RED.png
    Reply  Wed Jun 22 14:44:03 2022, Anchal, Update, BHD, Fixed DC error in c1su2, added new library model for suspensions 
       Reply  Tue Jun 28 14:24:23 2022, yuta, Update, BHD, BHD DC PD signals now also sent to c1lsc to circumvent IPC error C1LSC.JPGC1SUS2.JPGScreenshot_2022-06-28_16-03-16_BHDDCPDcopied.png
          Reply  Mon Nov 14 17:45:02 2022, yuta, Update, BHD, BHD DC PD unwhitening and removing cables to c1lsc Screenshot_2022-11-15_13-08-17.png
             Reply  Mon Nov 21 18:43:46 2022, yuta, Update, BHD, c1hpc and c1lsc modified to send BHD_DIFF and BHD_SUM Screenshot_2022-11-21_18-42-49_BHD.png
                Reply  Wed Nov 23 11:06:08 2022, Anchal, Update, BHD, c1hpc and c1sus modified to add BS dither and demodulation option 
                   Reply  Tue Nov 29 15:32:32 2022, Anchal, Update, BHD, c1hpc model updates to support double audio dither Screenshot_2022-11-29_15-36-05.png
                      Reply  Tue Dec 6 13:09:44 2022, yuta, Update, BHD, c1cal model updates to support sensing matrix for BHD Screenshot_2022-12-06_13-02-05_c1calMEDM.pngScreenshot_2022-12-06_13-06-35_c1lsc.pngScreenshot_2022-12-06_13-07-14_c1cal.pngScreenshot_2022-12-06_13-07-50_c1caldemod.png
Message ID: 16954     Entry time: Tue Jun 28 14:24:23 2022     In reply to: 16938     Reply to this: 17265
Author: yuta 
Type: Update 
Category: BHD 
Subject: BHD DC PD signals now also sent to c1lsc to circumvent IPC error 

[JC, Yuta]

To circumvent IPC error sending BHD DC PD signals from c1sus2 to c1lsc, DB9 cable from BHD DC PD box sent to c1sus2 is now split and sent also to c1lsc.
They are now available in both

c1sus2 ADC1
C1:X07-MADC1_EPICS_CH16 (DC PD A) and CH17 (DC PD B)

c1lsc ADC1
C1:X04-MADC1_EPICS_CH4 (DC PD A) and CH5 (DC PD B)

 - Add battery powered SR560 to decouple c1sus2 and c1lsc to avoid the ground loop

Attachment 1: C1LSC.JPG  4.141 MB  Uploaded Tue Jun 28 15:26:53 2022  | Hide | Hide all
Attachment 2: C1SUS2.JPG  4.727 MB  Uploaded Tue Jun 28 15:27:06 2022  | Hide | Hide all
Attachment 3: Screenshot_2022-06-28_16-03-16_BHDDCPDcopied.png  260 kB  Uploaded Tue Jun 28 17:03:42 2022  | Hide | Hide all
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