RTS models for BHD homodyne phase control (c1hpc) and angular control (c1bac) are created and added to c1sus2.
c1su2 and c1lsc models were modified accordingly.
We still have issues with IPC PCIE connection sending DCPD A and B signals to c1lsc and DC error 0x2000 in c1su2 model.
c1hpc (host: c1sus2) Attachment #1
This model is for homodyne phase control.
It can dither LO1, LO2, AS1, AS4 in POS and demodulate mixture of DCPD A/B signals for the phase control to feedback to those optics.
It also sends DCPD A/B signals to c1lsc via cdsIPCx_PCIE.
Dither and controls signals are sent to the optics via cdsIPCx_SHMEM.
c1bac (host: c1sus2)
This model is for BHD angular control.
It is basically the same as c1hpc, but it is for PIT and YAW dithering of LO1, LO2, AS1, AS4.
c1su2 (host: c1su2) Attachment #2
LSC and ASCPIT/YAW feedback signals from c1hpc and c1bac via shared memory were added to send them to corresponding optics.
Somehow Mux/Demux didn't work to send SHMEM signals inside the subsystem in the Simulink model (this works for ADC, but probably not for IPC stuff?), and we had hard time make-install-ing this model.
c1lsc (host: c1lsc) Attachment #3
DCPD A/B signals from c1hpc via PCIE were added for our new error signals for LSC.
Starting and restarting the models
After having some troubles make-install-ing modified models (be careful of goto and from tags!), we stopped all the models in c1sus, c1ioo, c1lsc, c1sus2 and started all of them, including new c1hpc and c1bac models.
This somehow created RFM errors in c1scx and c1scy.
So, we proceeded to do the same step we did in 40m/16887 and 40m/15646, now including c1sus2 for the restart.
Initial attempt made c1lsc, c1sus, c1ioo mostly red, so scripts/cds/rebootC1LSC.sh was run again on pianosa.
RFM issues for c1scx and c1scy were solved.
Shared memory within c1sus2 seems to be working, but sending DCPD A/B signals from c1hpc to c1lsc is not working (see Attachement #4).
- Fix C1:HPC-LSC_DCPC_A/B issue
- Make/modify MEDM screens