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40m Log |
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Wed Feb 24 22:13:47 2021, Jon, Update, CDS, Planning document for front-end testing
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Fri Mar 5 17:48:25 2021, Jon, Update, CDS, Front-end testing  
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Tue Mar 9 16:52:47 2021, Jon, Update, CDS, Front-end testing
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Tue Mar 16 16:27:22 2021, Jon, Update, CDS, Front-end testing
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Tue Mar 16 19:04:20 2021, gautam, Update, CDS, Front-end testing
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Fri Mar 19 18:14:56 2021, Jon, Update, CDS, Front-end testing 
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Wed Mar 24 19:02:21 2021, Jon, Update, CDS, Front-end testing
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Mon Mar 29 17:55:50 2021, Jon, Update, CDS, Front-end testing
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Tue Mar 30 18:21:34 2021, Jon, Update, CDS, Front-end testing
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Tue Apr 6 07:19:11 2021, Jon, Update, CDS, New SimPlant cymac
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Tue Apr 6 11:13:01 2021, Jon, Update, CDS, FE testing
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Sat Apr 10 08:51:32 2021, Jon, Update, CDS, I/O Chassis Assembly
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Thu Apr 29 10:51:35 2021, Jon, Update, CDS, I/O Chassis Assembly
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Tue May 4 07:38:36 2021, Jon, Update, CDS, I/O Chassis Assembly
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Tue May 11 16:29:55 2021, Jon, Update, CDS, I/O Chassis Assembly
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Tue May 11 17:43:09 2021, Koji, Update, CDS, I/O Chassis Assembly
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Fri May 28 11:16:21 2021, Jon, Update, CDS, Front-End Assembly and Testing   
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Sun Jun 6 08:42:05 2021, Jon, Update, CDS, Front-End Assembly and Testing  
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Tue Jun 22 16:53:01 2021, Ian MacMillan, Update, CDS, Front-End Assembly and Testing
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Thu Jun 24 17:32:52 2021, Ian MacMillan, Update, CDS, Front-End Assembly and Testing  
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Fri Jun 25 14:06:10 2021, Jon, Update, CDS, Front-End Assembly and Testing
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Sat Apr 10 11:56:14 2021, Jon, Update, CDS, 40m LSC simPlant model
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Tue Apr 13 16:24:38 2021, Ian MacMillan, Update, CDS, 40m LSC simPlant model
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Mon Apr 19 13:15:20 2021, Ian MacMillan, Update, CDS, 40m LSC simPlant model
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Wed Apr 21 10:03:01 2021, Ian MacMillan, Update, CDS, 40m LSC simPlant model
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Wed Apr 21 11:01:37 2021, Rana, Update, CDS, 40m LSC simPlant model
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Fri Apr 23 15:52:19 2021, Ian MacMillan, Update, CDS, 40m LSC simPlant model  
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Sun Apr 25 21:21:02 2021, rana, Update, CDS, SUS simPlant model
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Tue Apr 27 15:15:17 2021, Ian MacMillan, Update, CDS, SUS simPlant model 
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Thu Apr 29 13:41:40 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Fri Apr 30 12:52:14 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Mon May 3 13:35:12 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Tue May 4 14:55:38 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Wed May 5 15:11:54 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Thu May 6 16:13:24 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Fri May 7 11:19:29 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Wed May 12 13:06:15 2021, Ian MacMillan, Update, CDS, SUS simPlant model   
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Fri May 21 09:44:52 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Fri May 21 14:36:20 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Thu Jun 3 13:06:47 2021, Ian MacMillan, Update, CDS, SUS simPlant model 
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Mon Jun 7 17:49:19 2021, Ian MacMillan, Update, CDS, SUS simPlant model 
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Wed Jun 9 13:50:48 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Tue Jun 15 11:46:40 2021, Ian MacMillan, Update, CDS, SUS simPlant model 
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Wed Jun 30 14:09:26 2021, Ian MacMillan, Update, CDS, SUS simPlant model 
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Mon Aug 23 15:25:59 2021, Ian MacMillan, Update, CDS, SUS simPlant model
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Message ID: 16224
Entry time: Thu Jun 24 17:32:52 2021
In reply to: 16220
Reply to this: 16225
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Author: |
Ian MacMillan |
Type: |
Update |
Category: |
CDS |
Subject: |
Front-End Assembly and Testing |
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Anchal and I ran tests on the two systems (C1-SUS2 and C1-BHD). Attached are the results and the code and data to recreate them.
We connected one DAC channel to one ADC channel and thus all of the results represent a DAC/ADC pair. We then set the offset to different values from -3000 to 3000 and recorded the measured signal. I then plotted the response curve of every DAC/ADC pair so each was tested at least once.
There are two types of plots included in the attachments
1) a summary plot found on the last pages of the pdf files. This is a quick and dirty way to see if all of the channels are working. It is NOT a replacement for the other plots. It shows all the data quickly but sacrifices precision.
2) In an in-depth look at an ADC/DAC pair. Here I show the measured value for a defined DC offset. The Gain of the system should be 0.5 (put in an offset of 100 and measure 50). I included a line to show where this should be. I also plotted the difference between the 0.5 gain line and the measured data.
As seen in the provided plots the channels get saturated after about the -2000 to 2000 mark, which is why the difference graph is only concentrated on -2000 to 2000 range.
Summary: all the channels look to be working they all report very little deviation off of the theoretical gain.
Note: ADC channel 31 is the timing signal so it is the only channel that is wildly off. It is not a measurement channel and we just measured it by mistake. |
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