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Entry  Thu Mar 12 01:33:21 2020, gautam, Update, LSC, Resuming locking activities ExcessFreqNoise_LSC.pdf
    Reply  Fri Mar 13 00:32:38 2020, gautam, Update, LSC, Some progress RFonly_CARM.pngCARMTF.pdf
       Reply  Tue Mar 17 01:22:03 2020, gautam, Update, LSC, Locking updates 
          Reply  Thu Mar 19 03:33:28 2020, gautam, Update, LSC, More locking updates PRFPMI_lock.pngCARMTF.pdfDARM_AvB.pdflockLoss.png
Message ID: 15268     Entry time: Thu Mar 12 01:33:21 2020     Reply to this: 15273
Author: gautam 
Type: Update 
Category: LSC 
Subject: Resuming locking activities 

It's been a while since I've attempted any locking, so tonight was mostly getting the various subsystems back together.

  • Reconnected SR785 at 1Y3 to CM board for TF measurements.
  • POX/POY locking work fine
  • Locked PRMI (no ETMs) with carrier resonant, fixed PRM and BS alignment.
  • ALS-X noise is still elevated - disconnected it from the switchable delay line and now I'm directly piping the 3dB coupled part of the beat to the LO input of the demod board. But the high freq contribution to the RMS is still ~x2-x3 of what it was in November 2019. But the noise should only depend on the other (delayed) part of the beat (the discriminant is set thus).
  • With arms POX/POY locked, checked that there was no elevated coherence between POX_I/POY_I signals between 800 Hz - 1.2 kHz, which is where I see the excess noise in the laser frequency control signal (see Attachment #1). So this suggests that the IMC locking loop suppresses the noise to a level that the arm cavities don't witness it. It's probably still worth checking this out and fixing it, but it wasn't a show stopper.
  • Transition from POX/POY lock to ALS lock was smooth - I forgot to use the POX/POY photodiodes as OOL sensors to measure the noise in this config to see if it was elevated, but anyway, I was able to push on.
  • PRMI 3f locking worked okay.
  • Main thing I wanted to check today is to try the AO transition with a bit more IN1 gain on the CM board - hypothesis being the high frequency part of the CARM signal is buried in the noise if we run with -32dB of IN1 gain. 
    • Set IN1 gain to -10dB instead.
    • In this config, I checked that with the CARM offset at 0 (CARM still under purely ALS control), the CM_SLOW path was registering ~4000 cts pk-pk, which is healthily within the ADC's range.
    • I was able to engage the CARM_B path and semi-stabilize the arm powers (after compensating for the increased IN1 gain by decreasing the CARM_B gain) and turn on the integrator.
    • However, before I could try any AO path action, the IMC loses lock - too tired to try more tonight, I'll try again tomrrow.
Attachment 1: ExcessFreqNoise_LSC.pdf  78 kB  Uploaded Fri Mar 13 15:31:54 2020  | Hide | Hide all
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