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Entry  Fri Aug 3 15:53:25 2018, gautam, Update, SUS, Low noise bias path idea LT1055_precOpAmp.pdf
    Reply  Fri Aug 3 16:27:40 2018, rana, Update, SUS, Low noise bias path idea 
       Reply  Sun Aug 5 15:43:50 2018, gautam, Update, SUS, Another low noise bias path idea HV_Bias_schematic.pdfTF.pdfbias.pdfHVbias_currentNoise.pdf
          Reply  Wed Aug 8 23:06:59 2018, gautam, Update, SUS, Another low noise bias path idea 
             Reply  Wed Aug 15 19:18:07 2018, gautam, Update, SUS, Another low noise bias path idea HV_Bias.pdfHVamp_TF.pdfHVamp_noises.pdfcurrentNoises.pdfHVamp.fil.zip
                Reply  Thu Aug 16 23:06:50 2018, gautam, Update, SUS, Another low noise bias path idea HVamp_schem.PDFHvamp.zip
                   Reply  Mon Oct 1 22:20:42 2018, gautam, Update, SUS, Prototyping HV Bias Circuit CoilDriverBias.pdfcurrentNoise.pdfPSRR.pdf
Message ID: 14223     Entry time: Mon Oct 1 22:20:42 2018     In reply to: 14169
Author: gautam 
Type: Update 
Category: SUS 
Subject: Prototyping HV Bias Circuit 

Summary:

I've been plugging away at Altium prototyping the high-voltage bias idea, this is meant to be a progress update.

Details:

I need to get footprints for some of the more uncommon parts (e.g. PA95) from Rich before actually laying this out on a PCB, but in the meantime, I'd like feedback on (but not restricted to) the following:

  1. The top-level diagram: this is meant to show how all this fits into the coil driver electronics chain.
    • The way I'm imagining it now, this (2U) chassis will perform the summing of the fast coil driver output to the slow bias signal using some Dsub connectors (existing slow path series resistance would simply be removed). 
    • The overall output connector (DB15) will go to the breakout board which sums in the bias voltage for the OSEM PDs and then to the satellite box.
    • The obvious flaw in summing in the two paths using a piece of conducting PCB track is that if the coil itself gets disconnected (e.g. we disconnect cable at the vacuum flange), then the full HV appears at TP3 (see pg2 of schematic). This gets divided down by the ratio of the series resistance in the fast path to slow path, but there is still the possibility of damaging the fast-path electronics. I don't know of an elegant design to protect against this.
  2. Ground loops: I asked Johannes about the Acromag DACs, and apparently they are single ended. Hopefully, because the Sorensens power Acromags, and also the eurocrates, we won't have any problems with ground loops between this unit and the fast path.
  3. High-voltage precautons: I think I've taken the necessary precautions in protecting against HV damage to the components / interfaced electronics using dual-diodes and TVSs, but someone more knowledgable should check this. Furthermore, I wonder if a Molex connector is the best way to bring in the +/- HV supply onto the board. I'd have liked to use an SHV connector but can't find a comaptible board-mountable connector.
  4.  Choice of HV OpAmp: I've chosen to stick with the PA95, but I think the PA91 has the same footprint so this shouldn't be a big deal.
  5.  Power regulation: I've adapted the power regulation scheme Rich used in D1600122 - note that the HV supply voltage doesn't undergo any regulation on the board, though there are decoupling caps close to the power pins of the PA95. Since the PA95 is inside a feedback loop, the PSRR should not be an issue, but I'll confirm with LTspice model anyways just in case.
  6. Cost: 
    • ​​Each of the metal film resistors that Rich recommended costs ~$15.
    • The voltage rating on these demand that we have 6 per channel, and if this works well, we need to make this board for 4 optics.
    • The PA95 is ~$150 each, and presumably the high voltage handling resistors and capacitors won't be cheap.
    • Steve will update about his HV supply investigations (on a secure platform, NOT the elog), but it looks like even switching supplies cost north of $1200.
    • However, as I will detail in a separate elog, my modeling suggests that among the various technical noises I've modeled so far, coil driver noise is still the largest contribution which actually seems to exceed the unsqueezed shot noise of ~ 8e-19 m/rtHz for 1W input power and PRG 40 with 20ppm RT arm losses, by a smidge (~9e-19 m/rtHz, once we take into account the fast and slow path noises, and the fact that we are not exactly Johnson noise limited).

I also don't have a good idea of what the PCB layer structure (2 layers? 3 layers? or more?) should be for this kind of circuit, I'll try and get some input from Rich.

*Updated with current noise (Attachment #2) at the output for this topology of series resistance of 25 kohm in this path. Modeling was done (in LTspice) with a noiseless 25kohm resistor, and then I included the Johnson noise contribution of the 25k in quadrature. For this choice, we are below 1pA/rtHz from this path in the band we care about. I've also tried to estimate (Attachment #3) the contribution due to (assumed flat in ASD) ripple in the HV power supply (i.e. voltage rails of the PA95) to the output current noise, seems totally negligible for any reasonable power supply spec I've seen, switching or linear.

Attachment 1: CoilDriverBias.pdf  367 kB  Uploaded Mon Oct 1 23:20:44 2018  | Hide | Hide all
CoilDriverBias.pdf CoilDriverBias.pdf CoilDriverBias.pdf
Attachment 2: currentNoise.pdf  177 kB  Uploaded Tue Oct 2 11:10:14 2018  | Hide | Hide all
currentNoise.pdf
Attachment 3: PSRR.pdf  178 kB  Uploaded Tue Oct 2 11:42:16 2018  | Hide | Hide all
PSRR.pdf
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