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 Fri Aug 3 15:53:25 2018, gautam, Update, SUS, Low noise bias path idea Fri Aug 3 16:27:40 2018, rana, Update, SUS, Low noise bias path idea Sun Aug 5 15:43:50 2018, gautam, Update, SUS, Another low noise bias path idea Wed Aug 8 23:06:59 2018, gautam, Update, SUS, Another low noise bias path idea Wed Aug 15 19:18:07 2018, gautam, Update, SUS, Another low noise bias path idea Thu Aug 16 23:06:50 2018, gautam, Update, SUS, Another low noise bias path idea Mon Oct 1 22:20:42 2018, gautam, Update, SUS, Prototyping HV Bias Circuit
Message ID: 14135     Entry time: Sun Aug 5 15:43:50 2018     In reply to: 14130     Reply to this: 14147
 Author: gautam Type: Update Category: SUS Subject: Another low noise bias path idea

• Attachment #1 shows the proposed schematic.
• It consists of a second order section with Gain x10 to map the +/-10V DC range of the DAC to +/- 100V DC such that we preserve roughly the same amount of DC actuation range.
• Corner frequency of the SOS is set to ~0.7 Hz. In hindsight, maybe this is more aggressive than necessary, we can tune this.
• DC gain is 20 dB (typo in the text where I say the DC gain is x15, though we could go with this option as well I think if we want a larger series resistance).
• A first order passive low-pass stage is added to filter out the voltage noise of the PA91, which dominates the output voltage noise (next bullet).
• Attachment #2 shows the transfer function from input to output
• The two traces compare having just a single SOS filtering stage vs the current topology of having two SOS stages.
• The passive output RC network is necessary in either case to filter the voltage noise of the PA91 OpAmp.
• For the DAC noise, I just assumed a flat noise level of $5 \mu V / \sqrt{\mathrm{Hz}}$, I don't actually know what this is for the Acromag DACs.
• Attachments #3 shows a breakdown of the top 5 noise contributions.
• The PA91 datasheet doesn't give current noise information so I just assumed $1 fA / \sqrt{\mathrm{Hz}}$, which was what was used for the PA85 in the existing opamp.lib file.
• The voltage noise is modelled as $4.5 \sqrt{1+\frac{80}{f}} nV / \sqrt{\mathrm{Hz}}$, which seems to line up okay with the plot on Pg4 of the datasheet.
• So the model suggests we will be dominated by the voltage noise of the PA91.
• Attachment #4 translates the noise into current noise seen by the actuator.
• I add the Johnson noise contribution of the series resistance for this path, which is assumed to be $10 k \Omega$.
• For comparison, I add the filtered DAC noise contribution, and Johnson noise of the proposed series resistance in the fast path.
• For the bias path, we are dominated by the Johnson noise of the series resistor from ~60 Hz upwards.
• It's not quite fair to say that the Johnson noise of the resistance in the fast path dominates, the quadrature sum of fast and bais paths will be ~1.2 times of the former alone.
• Bottom line: we will be in the regime of total current noise of ~2.2 pA/rtHz, where I think Kevin's modeling suggests we can see some squeezing.

The question still remains of how to combine the fast and bias paths in this proposed scheme. I think the following approach works for prototyping at least:

• Remove the series resistance on the existing coil driver boards' bias path, hence isolating this from the coil.
• Route the DB15 output connector from the coil driver board (which is now just the fast actuation signals) into a sub-sattelite box housing the bias path electronics.
• Sum the two signals as it is done now, by simply having a conductor (PCB trace) merge the two paths after their respective series resistances.

In the longer term, perhaps the Satellite Box revamp can accommodate a bias voltage summation connector.

 Quote: Bah! Too complex.

I have neglected many practical concerns. Some things that come to mind:

1. Is it necessary to protect the upstream DAC from some potential failure of the PA91 in which the high voltage appears at the input?
2. What is the correct OpAmp for this purpose? This chart on Apex's page suggests that PA15, PA85, PA91 and PA98 are all comparable in terms of drive capability, and the spec sheets don't suggest any dramatic differences. Some LIGO circuits use PA85, some use PA90, but I can't find any that use PA91. Perhaps Rana/Koji can comment about this.
3. What kind of protection is necessary for the PA91 power?
4. What is the correct way to do heat management? Presumably we need heatsinks, and in fact, there is a variant of the packaging style that has "formed" legs, which from what I can figure out, allow the heat sink plane on the PA91 to be parallel to the PCB surface. But I think the heat-sink wisdom suggests vertical fins are the most efficient (not sure if this holds if the PCB is inside a box though). What about the PCB itself? Are some kind of special traces needed?
5. Can we use the current-limiting resistor feature on the PA91? The datasheet seems to advice against it for G>10 configurations, which is what we need, although our requirement is only at DC so I don't know if that table is applicable to this circuit.
6. Are 3W resistors sufficient? I think we require only 10mA maximum current to preserve the current actuation range, so 100 V * 10mA = 1W, so 3W leaves some safety margin.
7. All capacitors should be rated for 500 V per the datasheet.
 Attachment 1: HV_Bias_schematic.pdf  61 kB  Uploaded Sun Aug 5 17:20:12 2018
 Attachment 2: TF.pdf  143 kB  Uploaded Sun Aug 5 17:20:24 2018
 Attachment 3: bias.pdf  153 kB  Uploaded Sun Aug 5 17:20:31 2018
 Attachment 4: HVbias_currentNoise.pdf  206 kB  Uploaded Sun Aug 5 17:20:42 2018
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