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Entry  Wed Mar 11 18:02:02 2015, Jenne, Update, LSC, CARM and DARM loops marginal CARMloop_ALSvsREFL_fcav150_fcomp150.pngCARMloop_ALSvsREFL_fcav150_fcomp80.pngDARMloop_ALSvsAS55_fcav4500_nocomp.png
    Reply  Thu Mar 12 03:47:56 2015, Jenne, Update, LSC, CARM and DARM loop adjustments 
Message ID: 11133     Entry time: Wed Mar 11 18:02:02 2015     Reply to this: 11136
Author: Jenne 
Type: Update 
Category: LSC 
Subject: CARM and DARM loops marginal 

I have looked at the CARM and DARM RF loops, assuming the loop shapes that we've been using, and it pretty much looks like a miracle that we were ever able to make the transition.  The CARM and DARM loops are very marginal.

The ALS CARM loop was already pretty close to marginal, but we lose an extra 12 degrees of phase with the REFL loop:

  • -4 deg because REFL has analog AA, but ALS does not.
  • -6 deg because FM1 is designed to have minimal phase loss at 100Hz, but the REFL integrator is not.
  • -2 deg because the cavity pole compensator must have a zero at finite frequency.

However, if our cavity pole compensator's zero frequency is too low, we get all of that phase back, at the sacrifice of 2dB of gain margin at both ends of the phase bubble.

I looked at an Optical simulation to check what the cavity pole frequencies are expected to be, with the losses that we've measured.  In both cases, I assume the Xarm has about 150ppm of loss.  The DARM cavity pole is about 4.5kHz no matter what the Yarm loss is.  The CARM cavity pole is about 172 Hz if the Yarm has 500ppm of loss, or 120 Hz if the Yarm has 200ppm of loss.

In the plots below, I use a CARM cavity pole frequency of 150 Hz, to roughly split the difference.

Edit, 13Mar2015, JCD:  Rana points out to me that I was using from Foton the analog design strings, without including the fact that these are actually digital filters. This means that I am missing some phase lag.  Eeek.

The ALS loop includes:

  • Actuator
    • 3 16kHz computation cycles (includes computer hops)
    • Pendulum
    • Analog anti-imaging
    • Digital anti-imaging
    • 1 64kHz computation cycle
    • Violin filters: ETM 1st, 2nd, 3rd order notches
  • Plant
    • Flat, not including the cavity pole at ~17kHz
  • Sensor
    • Closed loop response of phase tracker
    • Digital anti-aliasing
    • 1 64kHz computation cycle
    • 1 16kHz computation cycle
  • Servo (CARM filter bank)
    • FM1
    • FM2
    • FM3
    • FM5
    • FM6
    • 1 16kHz computation cycle

The REFL loop includes:

  • Actuator
    • 3 16kHz computation cycles (includes computer hops)
    • Pendulum
    • Analog anti-imaging
    • Digital anti-imaging
    • 1 64kHz computation cycle
    • Violin filters: ETM 1st, 2nd, 3rd order notches
  • Plant
    • 150 Hz cavity pole
  • Sensor
    • Analog anti-aliasing
    • Digital anti-aliasing
    • 1 64kHz computation cycle
  • Servo (CARM_B filter bank and CARM filter bank)
    • Cavity pole compensator
    • Integrator (20:0)
    • FM2
    • FM3
    • FM5
    • FM6
    • 1 16kHz computation cycle

The first plot is the case of perfectly matched cavity pole and compensating zero (150Hz, with compensator having 3kHz pole):

This next version is the case where the compensating zero is a little too low, which is the case I think we have now:

The last plot is a DARM loop.  Everything is the same, except that the RF plant has a 4.5kHz pole, and no compensation:

Attachment 1: CARMloop_ALSvsREFL_fcav150_fcomp150.png  572 kB  | Hide | Hide all
CARMloop_ALSvsREFL_fcav150_fcomp150.png
Attachment 2: CARMloop_ALSvsREFL_fcav150_fcomp80.png  567 kB  | Hide | Hide all
CARMloop_ALSvsREFL_fcav150_fcomp80.png
Attachment 3: DARMloop_ALSvsAS55_fcav4500_nocomp.png  570 kB  | Hide | Hide all
DARMloop_ALSvsAS55_fcav4500_nocomp.png
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